As far as you know, we can list the applets that reside in a Java Card using tools such as GlobalPlaformPro as follow:
GP: gp -list
AID: A000000003000000 (|........|)
ISD OP_READY: Security Domain, Card lock, Card terminate, Default selected
CVM (PIN) management
AID: 010203040506 (|......|)
App SELECTABLE: (none)
AID: 0102030405 (|.....|)
Exe LOADED: (none)
GP:
The questions are:
Where are these applets in the card? (in the MF? or in a DF?)
Who choose it? (the directory that applets get installed to)
Is there any way to see the AID of MF and all the other EFs and DFs of card?
What is my current directory? Can I change it?
And how I can create a DF?
I tried to create a DF with regard to the commands defined in ISO7816-part9 as below, but I receive errors only!
GP: gp -s 00e00000 -d -v
# Detected readers from SunPCSC
[*] ACS CCID USB Reader 0
SCardConnect("ACS CCID USB Reader 0", T=*) -> T=0, 3Bxxxxxxxxxxxxxxxxxxxxxx
SCardBeginTransaction("ACS CCID USB Reader 0")
Reader: ACS CCID USB Reader 0
ATR: 3Bxxxxxxxxxxxxxxxxxxxxxx
More information about your card:
http://smartcard-atr.appspot.com/parse?ATR=3Bxxxxxxxxxxxxxxxxxxxxxx
A>> T=0 (4+0000) 00A40400 00
A<< (0018+2) (60ms) 6F108408A000000003000000A5049F6501FF 9000
Auto-detected ISD AID: A000000003000000
A>> T=0 (4+0008) 80500000 08 78FF1563FF46D23B
A<< (0028+2) (166ms) 0000116001008A790AF9FF020138983B77E636B6C12237B087216130 90
00
Host challenge: 78FF1563FF46D23B
Card challenge: 0138983B77E636B6
Card reports SCP02 with version 255 keys
Master keys:
Version 0
ENC: Ver:0 ID:0 Type:DES3 Len:16 Value:404142434445464748494A4B4C4D4E4F
MAC: Ver:0 ID:0 Type:DES3 Len:16 Value:404142434445464748494A4B4C4D4E4F
KEK: Ver:0 ID:0 Type:DES3 Len:16 Value:404142434445464748494A4B4C4D4E4F
Sequnce counter: 0138
Derived session keys:
Version 0
ENC: Ver:0 ID:0 Type:DES3 Len:16 Value:4544C6282153F89C2144A2C49784FCC3
MAC: Ver:0 ID:0 Type:DES3 Len:16 Value:017010873EFEC7A838D54C06A9AC2B40
KEK: Ver:0 ID:0 Type:DES3 Len:16 Value:A719298F33D1FECCD89334BA93FC3E70
Verified card cryptogram: C12237B087216130
Calculated host cryptogram: C1CF507F2B48CAEA
A>> T=0 (4+0016) 84820100 10 C1CF507F2B48CAEA7FFA4D851F5C0B1D
A<< (0000+2) (86ms) 9000
A>> T=0 (4+0008) 04E00000 08 08C1F21746AB8A16
A<< (0000+2) (24ms) 6E00
SCardEndTransaction()
SCardDisconnect("ACS CCID USB Reader 0", false)
GP: gp -s 00e000000a003400010101ffff0080 -d -v
# Detected readers from SunPCSC
[*] ACS CCID USB Reader 0
SCardConnect("ACS CCID USB Reader 0", T=*) -> T=0, 3Bxxxxxxxxxxxxxxxxxxxxxx
SCardBeginTransaction("ACS CCID USB Reader 0")
Reader: ACS CCID USB Reader 0
ATR: 3Bxxxxxxxxxxxxxxxxxxxxxx
More information about your card:
http://smartcard-atr.appspot.com/parse?ATR=3Bxxxxxxxxxxxxxxxxxxxxxx
A>> T=0 (4+0000) 00A40400 00
A<< (0018+2) (55ms) 6F108408A000000003000000A5049F6501FF 9000
Auto-detected ISD AID: A000000003000000
A>> T=0 (4+0008) 80500000 08 1B81F8C4D44CC86A
A<< (0028+2) (166ms) 0000116001008A790AF9FF0201391213E503ADE77D8CC6A546AE3537 90
00
Host challenge: 1B81F8C4D44CC86A
Card challenge: 01391213E503ADE7
Card reports SCP02 with version 255 keys
Master keys:
Version 0
ENC: Ver:0 ID:0 Type:DES3 Len:16 Value:404142434445464748494A4B4C4D4E4F
MAC: Ver:0 ID:0 Type:DES3 Len:16 Value:404142434445464748494A4B4C4D4E4F
KEK: Ver:0 ID:0 Type:DES3 Len:16 Value:404142434445464748494A4B4C4D4E4F
Sequnce counter: 0139
Derived session keys:
Version 0
ENC: Ver:0 ID:0 Type:DES3 Len:16 Value:F02DB909386D90DA638ACA4AB92501E1
MAC: Ver:0 ID:0 Type:DES3 Len:16 Value:FD6A2A492566BDE1940C54127C022126
KEK: Ver:0 ID:0 Type:DES3 Len:16 Value:98FAA5CF01E133557688FD90E1571FAC
Verified card cryptogram: 7D8CC6A546AE3537
Calculated host cryptogram: 14C22B8CE836A4D4
A>> T=0 (4+0016) 84820100 10 14C22B8CE836A4D4C2F1C20A8CD56F8C
A<< (0000+2) (85ms) 9000
A>> T=0 (4+0018) 04E00000 12 003400010101FFFF0080B9174FA320EEC470
A<< (0000+2) (24ms) 6E00
SCardEndTransaction()
SCardDisconnect("ACS CCID USB Reader 0", false)
GP:
Why I can't create my desired file?
Where are these applets in the card? (in the MF or in a DF?)
Consider each Java Card application to be a DF directly below the MF. Though, be aware that Java Cards only make use of parts of the ISO 7816-4 file system concept and that the MF itself is not necessarily selectable by default.
Who choose it? (The directory that applets installed there)
The Java Card specifications partially define this (through the way how the SELECT (by AID) command is defined; other than that Java Cards do not make use of the file system concept).
Is there any way to see the AID of MF and all the other EFs and DFs of card?
From an API perspective, only DF names can be AIDs. Consider AIDs to be DF names that comply to a specific format. MF and EF have file IDs. However, as there is no file system concept on Java Cards, there are no addressable MF, EFs by default (you can emulate this functionality though applet code).
So the only listable components that are on a Java Card are applets and applet packages (which you already found to be listable though Global Platform card management for your card).
What is my current directory? Can I change it?
See above. No file system concept -> no notion of a "current directory". If you are within an application (selected applet), the applet can emulate a file system. In that case things like a "current" directory" depend on the applet implementation.
And how I can create a DF?
By installing (and making selectable) an applet.
Related
I am trying to start a QEMU sabrelite machine with U-Boot. I am managed to build it according to guide.
I run it as
./qemu-6.1.0/build/qemu-system-arm \
-M sabrelite \
-m 1G \
-kernel u-boot \
-drive file=disk.img,format=raw,id=mycard \
-device sd-card,drive=mycard,bus=sd-bus \
-serial null \
-serial stdio \
-nic user \
-no-reboot
Disk.img is a raw formatted file with the first vfat partition. I tried partition types 0xc 'EFI (FAT-12/16/32)' and 0xef 'W95 FAT32 (LBA)'. It starts with a bundle of errors.
U-Boot 2021.07 (Aug 24 2021 - 19:43:55 +0300)
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Reset cause: POR
Model: Freescale i.MX6 Quad SABRE Lite Board
Board: SABRE Lite
I2C: ready
DRAM: 1 GiB
force_idle_bus: sda=0 scl=0 sda.gp=0x5c scl.gp=0x55
force_idle_bus: failed to clear bus, sda=0 scl=0
force_idle_bus: sda=0 scl=0 sda.gp=0x6d scl.gp=0x6c
force_idle_bus: failed to clear bus, sda=0 scl=0
force_idle_bus: sda=0 scl=0 sda.gp=0xcb scl.gp=0x5
force_idle_bus: failed to clear bus, sda=0 scl=0
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - No block device, using default environment
In: serial
Out: serial
Err: serial
Net: using phy at 6
FEC [PRIME]
Error: FEC address not set.
, usb_ether
Error: usb_ether address not set.
starting USB...
Bus usb#2184000: usb dr_mode not found
probe failed, error -22
Bus usb#2184200: probe failed, error -22
No working controllers found
Hit any key to stop autoboot: 0
SATA Device Info:
S/N:
Product model number:
Firmware version:
Capacity: 0 sectors
Device 0: starting USB...
Bus usb#2184000: usb dr_mode not found
probe failed, error -22
Bus usb#2184200: probe failed, error -22
No working controllers found
USB is stopped. Please issue 'usb start' first.
starting USB...
Bus usb#2184000: usb dr_mode not found
probe failed, error -22
Bus usb#2184200: probe failed, error -22
No working controllers found
*** ERROR: `ethaddr' not set
missing environment variable: pxeuuid
missing environment variable: bootfile
Retrieving file: pxelinux.cfg/00000000
*** ERROR: `serverip' not set
…
=> mmcinfo
=> mmc list
FSL_SDHC: 0
FSL_SDHC: 1
The issue is that SD/MMC and USB Storage fails. So, I am not able to load an OS.
I came across a discussion. It mentions that this board have some SD controller specific and that there were SD related bug. But the fix was applied a couple years ago.
I guess there is a mismatch between QEMU and U-Boot SD controller definitions.
But I have no idea how to fix it. I would be relly happy if anyone could give me a hint.
Real i.MX6Q SABRE Lite board boots from SPI-NOR flash that is preloaded with U-Boot. QEMU emulates it as sst25vf016b device. I tried to load it with a proprietary bootloader as
-device sst25vf016b,drive=spi \
-drive if=none,file=flash.bin,format=raw,id=spi \
But it doesn’t work. Is it possible to bootload a QEMU sabrelite machine this way?
Some time later...
I built a linux kernel and started it with rootfs from an SD card. QEMU 5.1.0, 5.2.0, 6.0.0 and 6.1.0 plus linux handles SD/MMC well.
[ 10.400092] sdhci: Secure Digital Host Controller Interface driver
[ 10.401012] sdhci: Copyright(c) Pierre Ossman
[ 10.401982] sdhci-pltfm: SDHCI platform and OF driver helper
[ 10.425404] caam 2100000.crypto: device ID = 0x0000000000000000 (Era -524)
[ 10.427688] sdhci-esdhc-imx 2198000.mmc: Got CD GPIO
[ 10.427954] caam 2100000.crypto: job rings = 2, qi = 0
[ 10.429650] sdhci-esdhc-imx 2198000.mmc: Got WP GPIO
[ 10.435224] sdhci-esdhc-imx 219c000.mmc: Got CD GPIO
[ 10.459144] caam_jr 2101000.jr: failed to flush job ring 0
[ 10.472458] caam_jr: probe of 2101000.jr failed with error -5
[ 10.481084] caam_jr 2102000.jr: failed to flush job ring 1
[ 10.488221] caam_jr: probe of 2102000.jr failed with error -5
[ 10.507965] usbcore: registered new interface driver usbhid
[ 10.515781] usbhid: USB HID core driver
[ 10.571593] mmc2: SDHCI controller on 2198000.mmc [2198000.mmc] using ADMA
[ 10.583693] mmc3: SDHCI controller on 219c000.mmc [219c000.mmc] using ADMA
[ 10.590880] ipu1_csi0: Registered ipu1_csi0 capture as /dev/video0
[ 10.611980] ipu1_ic_prpenc: Registered ipu1_ic_prpenc capture as /dev/video1
[ 10.622227] ipu1_ic_prpvf: Registered ipu1_ic_prpvf capture as /dev/video2
[ 10.643235] ipu1_csi1: Registered ipu1_csi1 capture as /dev/video3
[ 10.655850] ipu2_csi0: Registered ipu2_csi0 capture as /dev/video4
[ 10.660920] ipu2_ic_prpenc: Registered ipu2_ic_prpenc capture as /dev/video5
[ 10.670717] ipu2_ic_prpvf: Registered ipu2_ic_prpvf capture as /dev/video6
[ 10.690556] ipu2_csi1: Registered ipu2_csi1 capture as /dev/video7
[ 10.702178] mmc3: host does not support reading read-only switch, assuming write-enable
[ 10.710571] mmc3: new high speed SD card at address 4567
[ 10.729816] mmcblk3: mmc3:4567 QEMU! 32.0 MiB
I bet that it is a U-Boot issue. On the other hand I believe that U-Boot works with real hardware. Probably it is worth it to use U-Boot from Boundary? Can anyone with a real board confirm what U-Boot version does it support?
So I've been interested in learning embedded programming and just got my Nucleo F103RB(stm32) board. I want to avoid IDEs and work in terminal with open-source tools. I've been trying to follow this tutorial:
https://cycling-touring.net/2018/12/flashing-and-debugging-stm32-microcontrollers-under-linux
But when I'm typing
openocd -f board/st_nucleo_f103rb.cfg
I'm only getting this:
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
srst_only separate srst_nogate srst_open_drain connect_deassert_srst
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v29 API v2 SWIM v18 VID 0x0483 PID 0x374B
Info : using stlink api v2
Info : Target voltage: 3.260766
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
It is not telling me anything about listening on some ports, and in fact I cannot interface it when using telnet on port 3333 or 4444 which are the defaults one that OpenOCD is supposed to open. I've been trying this on OSX, and in a Linux (PopOs!) Virtual Machine, and I'm getting the same results. How can I get OpenOCD to "listen"?
I know it's a bit confused, but I'm completely noob in this and am a bit lost.
Openocd should listen right the way. In order to remove uncertainties regarding the version of openocd you built, I would suggest to try an already compiled one available from here:
I just tried in a Lubuntu x86_64 18.04 virtual machine hosted on Windows using
the st_nucleo_f103rb.cfg configuration, and got:
sudo bin/openocd -f ./scripts/board/st_nucleo_f103rb.cfg
xPack OpenOCD, 64-bit Open On-Chip Debugger 0.10.0+dev (2019-07-17-11:25)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
srst_only separate srst_nogate srst_open_drain connect_deassert_srst
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : clock speed 1000 kHz
Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.387457
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : Listening on port 3333 for gdb connections
My stlink is at version 1, which does explain some differences in the messages being displayed.
If you can make it work, that means your house-built openocd may have an issue which will need to be investigated further - in the case your actual goal would be to compile openocd, and not becoming familiar with embedded systems. The exact git revision you compiled openocd from may be useful.
For now I will start with 0.9.0 that works great the same ./bootstrap ./configure make, you might have to add/enable some things in there ./configure --help
ST-Link Programmer yes (auto)
CMSIS-DAP Compliant Debugger yes (auto)
SEGGER J-Link Programmer yes (auto)
at least the stlink in your case.
I will do stlink in a later edit
jlink.cfg
#
# SEGGER J-Link
#
# http://www.segger.com/jlink.html
#
interface jlink
transport select swd
# The serial number can be used to select a specific device in case more than
# one is connected to the host.
#
# Example: Select J-Link with serial number 123456789
#
# jlink serial 123456789
target.cfg
# script for stm32f1x family
#
# stm32 devices support both JTAG and SWD transports.
#
#source [find target/swj-dp.tcl]
# ARM Debug Interface V5 (ADI_V5) utility
# ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since
# SW-DP and JTAG-DP targets don't need to switch based
# on which transport is active.
#
# declare a JTAG or SWD Debug Access Point (DAP)
# based on the transport in use with this session.
# You can't access JTAG ops when SWD is active, etc.
# params are currently what "jtag newtap" uses
# because OpenOCD internals are still strongly biased
# to JTAG .... but for SWD, "irlen" etc are ignored,
# and the internals work differently
# for now, ignore non-JTAG and non-SWD transports
# (e.g. initial flash programming via SPI or UART)
# split out "chip" and "tag" so we can someday handle
# them more uniformly irlen too...)
if [catch {transport select}] {
echo "Error: unable to select a session transport. Can't continue."
shutdown
}
proc swj_newdap {chip tag args} {
if [using_hla] {
eval hla newtap $chip $tag $args
} elseif [using_jtag] {
eval jtag newtap $chip $tag $args
} elseif [using_swd] {
eval swd newdap $chip $tag $args
}
}
#source [find mem_helper.tcl]
# Helper for common memory read/modify/write procedures
# mrw: "memory read word", returns value of $reg
proc mrw {reg} {
set value ""
mem2array value 32 $reg 1
return $value(0)
}
add_usage_text mrw "address"
add_help_text mrw "Returns value of word in memory."
proc mrb {reg} {
set value ""
mem2array value 8 $reg 1
return $value(0)
}
add_usage_text mrb "address"
add_help_text mrb "Returns value of byte in memory."
# mmw: "memory modify word", updates value of $reg
# $reg <== ((value & ~$clearbits) | $setbits)
proc mmw {reg setbits clearbits} {
set old [mrw $reg]
set new [expr ($old & ~$clearbits) | $setbits]
mww $reg $new
}
add_usage_text mmw "address setbits clearbits"
add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;"
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME stm32f1x
}
set _ENDIAN little
# Work-area is a space in RAM used for flash programming
# By default use 4kB (as found on some STM32F100s)
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x1000
}
#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
if { [using_jtag] } {
# See STM Document RM0008 Section 26.6.3
set _CPUTAPID 0x3ba00477
} {
# this is the SW-DP tap id not the jtag tap id
set _CPUTAPID 0x1ba01477
}
}
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID] } {
# FIXME this never gets used to override defaults...
set _BSTAPID $BSTAPID
} else {
# See STM Document RM0008
# Section 29.6.2
# Low density devices, Rev A
set _BSTAPID1 0x06412041
# Medium density devices, Rev A
set _BSTAPID2 0x06410041
# Medium density devices, Rev B and Rev Z
set _BSTAPID3 0x16410041
set _BSTAPID4 0x06420041
# High density devices, Rev A
set _BSTAPID5 0x06414041
# Connectivity line devices, Rev A and Rev Z
set _BSTAPID6 0x06418041
# XL line devices, Rev A
set _BSTAPID7 0x06430041
# VL line devices, Rev A and Z In medium-density and high-density value line devices
set _BSTAPID8 0x06420041
# VL line devices, Rev A
set _BSTAPID9 0x06428041
}
if {[using_jtag]} {
swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
-expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
-expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
-expected-id $_BSTAPID8 -expected-id $_BSTAPID9
}
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
adapter_khz 1000
adapter_nsrst_delay 100
if {[using_jtag]} {
jtag_ntrst_delay 100
}
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
$_TARGETNAME configure -event examine-end {
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
# DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000307 0
}
$_TARGETNAME configure -event trace-config {
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
}
Note that there is no mention of telnet nor 4444, but it defaults to being there.
window 1
sudo openocd -f jlink.cfg -f target.cfg
Open On-Chip Debugger 0.9.0 (2020-01-14-14:35)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : JLink SWD mode enabled
swd
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
cortex_m reset_config sysresetreq
Info : J-Link ARM-OB STM32 compiled Jun 30 2009 11:14:15
Info : J-Link caps 0x88ea5833
Info : J-Link hw version 70000
Info : J-Link hw type J-Link
Info : J-Link max mem block 15344
Info : J-Link configuration
Info : USB-Address: 0x0
Info : Kickstart power on JTAG-pin 19: 0x0
Info : Vref = 3.300 TCK = 1 TDI = 1 TDO = 1 TMS = 0 SRST = 1 TRST = 1
Info : J-Link JTAG Interface ready
Info : clock speed 1000 kHz
Info : SWD IDCODE 0x1ba01477
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
window 2
sudo telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
>
Then window 1 says
Info : accepting 'telnet' connection on tcp/4444
window 2
> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x41000000 pc: 0x080000d4 msp: 0x20003fe8
> mdw 0 20
0x00000000: 20004000 080000c1 080000c7 080000c7 080000c7 080000c7 080000c7 080000c7
0x00000020: 080000c7 080000c7 080000c7 080000c7 080000c7 080000c7 080000c7 080000c7
0x00000040: 080000c7 080000c7 080000c7 080000c7
>
> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x41000000 pc: 0x080000d4 msp: 0x20003fe8
> mdw 0 20
0x00000000: 20004000 080000c1 080000c7 080000c7 080000c7 080000c7 080000c7 080000c7
0x00000020: 080000c7 080000c7 080000c7 080000c7 080000c7 080000c7 080000c7 080000c7
0x00000040: 080000c7 080000c7 080000c7 080000c7
> flash write_image erase blinker.elf
auto erase enabled
device id = 0x20036410
flash size = 64kbytes
wrote 1024 bytes from file blinker.elf in 0.111541s (8.965 KiB/s)
> reset
>
And the led is blinking
Get into trouble use reset halt.
And from here replace the jlink.cfg with one of the stlinks that matches your board you can use lsusb to perhaps tell
Bus 003 Device 023: ID 1366:0101 SEGGER J-Link PLUS
Bus 003 Device 024: ID 0483:374b STMicroelectronics ST-LINK/V2.1 (Nucleo-F103RB)
grep 374b *
stlink-v2-1.cfg:hla_vid_pid 0x0483 0x374b
Sorted out the 0.10.0 issue.
So pretty much built per that pages directions...
sudo apt remove openocd
sudo apt build-dep openocd
git clone https://git.code.sf.net/p/openocd/code openocd-code
cd openocd-code
./bootstrap
./configure
make
sudo make install
(I didn't install, I don't want to trash my custom build)
jlink.cfg (for 0.10.0)
#
# SEGGER J-Link
#
# http://www.segger.com/jlink.html
#
interface jlink
transport select swd
# The serial number can be used to select a specific device in case more than
# one is connected to the host.
#
# Example: Select J-Link with serial number 123456789
#
# jlink serial 123456789
target.cfg
# script for stm32f1x family
#
# stm32 devices support both JTAG and SWD transports.
#
#source [find target/swj-dp.tcl]
# ARM Debug Interface V5 (ADI_V5) utility
# ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since
# SW-DP and JTAG-DP targets don't need to switch based
# on which transport is active.
#
# declare a JTAG or SWD Debug Access Point (DAP)
# based on the transport in use with this session.
# You can't access JTAG ops when SWD is active, etc.
# params are currently what "jtag newtap" uses
# because OpenOCD internals are still strongly biased
# to JTAG .... but for SWD, "irlen" etc are ignored,
# and the internals work differently
# for now, ignore non-JTAG and non-SWD transports
# (e.g. initial flash programming via SPI or UART)
# split out "chip" and "tag" so we can someday handle
# them more uniformly irlen too...)
if [catch {transport select}] {
echo "Error: unable to select a session transport. Can't continue."
shutdown
}
proc swj_newdap {chip tag args} {
if [using_hla] {
eval hla newtap $chip $tag $args
} elseif [using_jtag] {
eval jtag newtap $chip $tag $args
} elseif [using_swd] {
eval swd newdap $chip $tag $args
}
}
#source [find mem_helper.tcl]
# Helper for common memory read/modify/write procedures
# mrw: "memory read word", returns value of $reg
proc mrw {reg} {
set value ""
mem2array value 32 $reg 1
return $value(0)
}
add_usage_text mrw "address"
add_help_text mrw "Returns value of word in memory."
# mrh: "memory read halfword", returns value of $reg
proc mrh {reg} {
set value ""
mem2array value 16 $reg 1
return $value(0)
}
add_usage_text mrh "address"
add_help_text mrh "Returns value of halfword in memory."
# mrb: "memory read byte", returns value of $reg
proc mrb {reg} {
set value ""
mem2array value 8 $reg 1
return $value(0)
}
add_usage_text mrb "address"
add_help_text mrb "Returns value of byte in memory."
# mmw: "memory modify word", updates value of $reg
# $reg <== ((value & ~$clearbits) | $setbits)
proc mmw {reg setbits clearbits} {
set old [mrw $reg]
set new [expr ($old & ~$clearbits) | $setbits]
mww $reg $new
}
add_usage_text mmw "address setbits clearbits"
add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;"
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME stm32f1x
}
set _ENDIAN little
# Work-area is a space in RAM used for flash programming
# By default use 4kB (as found on some STM32F100s)
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x1000
}
# Allow overriding the Flash bank size
if { [info exists FLASH_SIZE] } {
set _FLASH_SIZE $FLASH_SIZE
} else {
# autodetect size
set _FLASH_SIZE 0
}
#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
if { [using_jtag] } {
# See STM Document RM0008 Section 26.6.3
set _CPUTAPID 0x3ba00477
} {
# this is the SW-DP tap id not the jtag tap id
set _CPUTAPID 0x1ba01477
}
}
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
if {[using_jtag]} {
jtag newtap $_CHIPNAME bs -irlen 5
}
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0x08000000 $_FLASH_SIZE 0 0 $_TARGETNAME
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
adapter speed 1000
adapter srst delay 100
if {[using_jtag]} {
jtag_ntrst_delay 100
}
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
$_TARGETNAME configure -event examine-end {
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
# DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000307 0
}
$_TARGETNAME configure -event trace-config {
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
}
Same commands as before
sudo ../openocd-code/src/openocd -f jlink.cfg -f stm32f1x.cfg
Open On-Chip Debugger 0.10.0+dev-01180-g10b39c3-dirty (2020-04-13-21:29)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
swd
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : J-Link ARM-OB STM32 compiled Jun 30 2009 11:14:15
Info : Hardware version: 7.00
Info : VTarget = 3.300 V
Info : clock speed 1000 kHz
Info : SWD DPIDR 0x1ba01477
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : starting gdb server for stm32f1x.cpu on 3333
Info : Listening on port 3333 for gdb connections
It does mention listening on the port, and same for the other window, and the led blinks.
So now with the debug header on a big nucleo card. lsusb shows
Bus 001 Device 016: ID 0483:374b STMicroelectronics ST-LINK/V2.1 (Nucleo-F103RB)
so
cat stlink-v2-1.cfg
echo "WARNING: interface/stlink-v2-1.cfg is deprecated, please switch to interface/stlink.cfg"
source [find interface/stlink.cfg]
so
window 1
sudo ../openocd-code/src/openocd -f stlink.cfg -f stm32f1x.cfg
Open On-Chip Debugger 0.10.0+dev-01180-g10b39c3-dirty (2020-04-13-21:29)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : clock speed 1000 kHz
Info : STLINK V2J28M18 (API v2) VID:PID 0483:374B
Info : Target voltage: 3.247989
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : starting gdb server for stm32f1x.cpu on 3333
Info : Listening on port 3333 for gdb connections
window 2
sudo telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080000ac msp: 0x20000ff0
> flash write_image erase blinker.elf
device id = 0x20036410
flash size = 64kbytes
auto erase enabled
wrote 1024 bytes from file blinker.elf in 0.100447s (9.955 KiB/s)
> reset
> halt
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x08000054 msp: 0x20000ff0
>
led blinks then with the halt led stops blinking
usually the interface is the easy part and you can swap out that config with another once you get one working. the issue I had with 0.10.0 here is that it needed
transport select swd
because it made a comment about jtag and to use transport select if you wanted a different interface, and that was the trick.
and that is what I had in my 0.9.0 jlink.cfg file.
On your mac, depending on the age you should be able to use a live thumb drive (or cdrom) of mint or ubuntu or whatever and do these things to see if it is a macos thing or something else.
apt-get install openocd (or build from sources) then create/copy the files over, seems like you have telnet issues so even if you can telnet localhost 4444 and get in that is a win, halt, mdw 0 20, things like that, win win win.
I mentioned in a comment but the first thing I do when I get a nucleo or discovery board is get the firmware updater from ST, it is Java based so works on Windows, Linux, Mac and even though the one you find may be old it checks online for the firmware I don't think it carries with it a version that stops at some point. I then update the firmware on the nucleo card. I had issues in the early days of the nucleo cards with Linux that the thumb drive would only allow one write to happen then you had to unplug and replug the card, and other similar issues that firmware fixed, these days they ship with a working version, but as a habit I do this.
Despite what the st board docs say I have used the nucleo headers on non-st chips. But I have a number of the five dollar purple jlink swd stm32 cards (type those three words in your search and increase your odds, have gotten some through Amazon even (not from Asia) as well as some on eBay from Asia), I don't have to look up the pinout when I use those and they just work. The nucleo I have to look up the pinout every time.
So if either 0.9.0 or 0.10.0 works on Linux on your laptop with a live usb (not via virtual machine!) then it is not your hardware, it is something to do with software. If it doesn't work on Linux on your computer then maybe you have a hardawre issue with your stlink or other.
What chip is on your nucleo board? That can make a difference I was mislead by yor F103RB thing that is related to the MCU that is on the debugger end, what is the complete name of your board NUCLEO-FXXXXXXX? Is it really an F103xxxx target mcu? Which is what I demonstrated here, hang on...
sudo ../openocd-code/src/openocd -f stlink.cfg -f stm32f1x.cfg
Open On-Chip Debugger 0.10.0+dev-01180-g10b39c3-dirty (2020-04-13-21:29)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : clock speed 1000 kHz
Info : STLINK V2J28M18 (API v2) VID:PID 0483:374B
Info : Target voltage: 3.248358
Warn : UNEXPECTED idcode: 0x5ba02477
Error: expected 1 of 1: 0x1ba01477
these files used against an STM32F7xxx which is whose debugger end I was using...
grep -ri 5ba02477 *
target/renesas_s7g2.cfg: set _CPU_SWD_TAPID 0x5ba02477
target/stm32f7x.cfg: set _CPUTAPID 0x5ba02477
Anyway, it is possible, using the files essentially unmodified from the repo provides telnet access on 4444 with or without it printing that fact out during the connection. you need to do something like
gdb_port 0
tcl_port 0
to disable access to those ports.
I am trying to communicate between a special board(details below) and my notebook with RS-232 protocol over USB to TTL converters (datasheet). I use GtkTerm(version 1.0) on my notebook. On board I use minicom(version 2.7).
I can send data at the beginning with no error also on GtkTerm I can send raw files which can be monitored over minicom on board. After a while I can not transfer data or get any response from minicom of board. I tried to communicate over minicom on both devices the problem is still there.
I am working with an embedded board which is special product. It has Texas Instruments AM4376BZDN80 (datasheet) microprocessor on it. Ubuntu is running on this board. Details for uname -a: Linux *companyname* 4.14.40-51464-gaf2366a-dirty #13 PREEMPT Mon Dec 2 09:43:55 +03 2019 armv7l GNU/Linux.
I am working with a notebook with Ubuntu 19.10 and details for uname -a: Linux Lenovo 5.3.0-24-generic #26-Ubuntu SMP Thu Nov 14 01:33:18 UTC 2019 x86_64 x86_64 x86_64 GNU/Linux.
Details of the driver I am using for USB to TTL converter.
Kernel Module: modinfo ftdi_sio:
filename: /lib/modules/5.3.0-24-generic/kernel/drivers/usb/serial/ftdi_sio.ko
license: GPL
description: USB FTDI Serial Converters Driver
author: Greg Kroah-Hartman <greg#kroah.com>, Bill Ryder <bryder#sgi.com>, Kuba Ober <kuba#mareimbrium.org>, Andreas Mohr, Johan Hovold <jhovold#gmail.com>
srcversion: 973CCF3AD54611DBC628693
alias: usb:v0920p7500d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0403p8348d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v22B7p150Dd*dc*dsc*dp*ic*isc*ip*in01*
alias: usb:v1C40p0477d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v1E8Ep6001d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v04B4pF900d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v04B4p009Bd*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0451pC32Ad*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0A5Cp6422d*dc*dsc*dp*ic*isc*ip*in*
...
alias: usb:v0403pD9A8d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v1901p0015d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v058Bp0043d*dc*dsc*dp*ic*isc*ip*in01*
alias: usb:v058Bp0028d*dc*dsc*dp*ic*isc*ip*in01*
alias: usb:v0403pCB08d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v05D1p8004d*dc*dsc*dp*ic*isc*ip*in*
...
alias: usb:v0C6Cp04B2d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v1514p2008d*dc*dsc*dp*ic*isc*ip*in02*
alias: usb:v04D8p000Ad*dc*dsc*dp*icFFiscFFip00in*
alias: usb:v0456pF001d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0456pF000d*dc*dsc*dp*ic*isc*ip*in*
...
alias: usb:v0403p9F80d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0403pFFA8d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0403pFF00d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0403pF60Bd*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0403pF608d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0403pF7C0d*dc*dsc*dp*ic*isc*ip*in*
alias: usb:v0403p0000d*dc*dsc*dp*ic*isc*ip*in*
depends: usbserial
retpoline: Y
intree: Y
name: ftdi_sio
vermagic: 5.3.0-24-generic SMP mod_unload
sig_id: PKCS#7
signer: Build time autogenerated kernel key
sig_key: 37:BE:2D ... 97:58:77:1C:1B
sig_hashalgo: sha512
signature: 4A:E1:50:53:10:61:08:46:4C:95:07:E7:AE:2A:22:D0:12:A1:42:DD:
09:77:73:96:6E:4A:BB:26:F4:EA:6B:DB:DB:7E:07:EA:A0:DF:E0:FF:
B3:96:11:B3:E4:33:9D:29:52:56:37:E1:1A:08:49:AE:EF:E4:30:3D:
...
78:C9:E9:84:85:23:7D:4C:64:20:8D:48:3F:C1:01:72:E1:36:14:D5:
77:C5:25:E2:4A:A5:84:1D:75:D3:2D:4B:F7:9E:94:DF:10:0F:13:54:
17:F1:3C:62:F0:3F:AD:57:26:CC:59:44:B8:71:53:B7:F4:56:32:A2:
21:C9:B8:F9:5E:63:9D:5F:A8:B6:51:F8:F6:DA:FB:97:6B:94:5D:76:
AF:50:EA:33:00:23:88:7B:BE:34:4F:E0:D0:C7:C0:0C:0C:34:44:51:
B8:E4:EC:E0:7B:36:DD:79:88:F8:E9:15
parm: ndi_latency_timer:NDI device latency timer override (int)
Right now I am testing serial console with baud rate 115200 8N1 with disabled flow controls. In future I will use higher baud rate nearly 500000 in a C program which transfers data. So I am looking for a solution independent from baud rates.
I wonder is there a special setting for buffer size or time out? I think it may be because of buffer but on minicom there is not a setting related with buffer. How can I learn about buffer limit? I am searching over equivalent settings in <termios.h>. I am using code from this post. I have tried to communicate over two C programs and still after some time data transfer is not happening.
PS: Let me know if I have mistakes with English in this text. Don't hesitate to ask for more information but I can't provide much more details about board because it is not a public device.
EDIT:
I unplugged both cables and retried the procedure this time I had to transfer a bit more data to obtain same situation. I also removed USB Hub and directly plugged converter to notebook.
dmesg on my notebook
[751114.353945] mce: CPU4: Package temperature/speed normal
[751114.353946] mce: CPU2: Package temperature/speed normal
[751114.353947] mce: CPU0: Package temperature/speed normal
[751114.353948] mce: CPU6: Package temperature/speed normal
[751114.353991] mce: CPU1: Package temperature/speed normal
[751114.353992] mce: CPU5: Package temperature/speed normal
[751114.353993] mce: CPU7: Package temperature/speed normal
[751114.353993] mce: CPU3: Package temperature/speed normal
[752203.675249] usb 1-2: clear tt 1 (9231) error -71
[752203.675361] usb 1-2: USB disconnect, device number 35
[752203.675363] usb 1-2.4: USB disconnect, device number 36
[752203.675542] usb 1-2: clear tt 1 (9231) error -71
[752203.675798] ftdi_sio ttyUSB1: FTDI USB Serial Device converter now disconnected from ttyUSB1
[752203.675824] ftdi_sio 1-2.4:1.0: device disconnected
[752206.940824] usb 1-2: new high-speed USB device number 37 using xhci_hcd
[752207.089000] usb 1-2: New USB device found, idVendor=214b, idProduct=7000, bcdDevice= 1.00
[752207.089002] usb 1-2: New USB device strings: Mfr=0, Product=1, SerialNumber=0
[752207.089004] usb 1-2: Product: USB2.0 HUB
[752207.089731] hub 1-2:1.0: USB hub found
[752207.089748] hub 1-2:1.0: 4 ports detected
[752238.960329] usb 1-2: USB disconnect, device number 37
[752245.180955] usb 1-2: new full-speed USB device number 38 using xhci_hcd
[752245.334394] usb 1-2: New USB device found, idVendor=0403, idProduct=6001, bcdDevice= 6.00
[752245.334397] usb 1-2: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[752245.334400] usb 1-2: Product: FT232R USB UART
[752245.334401] usb 1-2: Manufacturer: FTDI
[752245.334403] usb 1-2: SerialNumber: A50285BI
[752245.337563] ftdi_sio 1-2:1.0: FTDI USB Serial Device converter detected
[752245.337602] usb 1-2: Detected FT232RL
[752245.337920] usb 1-2: FTDI USB Serial Device converter now attached to ttyUSB1
dmesg on board(AM437x)
[17845.257286] usb 1-1.2: USB disconnect, device number 4
[17845.270578] ftdi_sio ttyUSB0: FTDI USB Serial Device converter now disconnected from ttyUSB0
[17845.284742] ftdi_sio 1-1.2:1.0: device disconnected
[17852.021023] usb 1-1.2: new full-speed USB device number 5 using xhci-hcd
[17852.122251] usb 1-1.2: New USB device found, idVendor=0403, idProduct=6001
[17852.129248] usb 1-1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[17852.137259] usb 1-1.2: Product: FT232R USB UART
[17852.142209] usb 1-1.2: Manufacturer: FTDI
[17852.146573] usb 1-1.2: SerialNumber: A50285BI
[17852.162378] ftdi_sio 1-1.2:1.0: FTDI USB Serial Device converter detected
[17852.177916] usb 1-1.2: Detected FT232RL
[17852.187030] usb 1-1.2: FTDI USB Serial Device converter now attached to ttyUSB0
[17928.632376] ftdi_sio ttyUSB0: usb_serial_generic_read_bulk_callback - urb stopped: -32
[17929.969381] ftdi_sio ttyUSB0: usb_serial_generic_read_bulk_callback - urb stopped: -32
[17988.165093] ftdi_sio ttyUSB0: usb_serial_generic_read_bulk_callback - urb stopped: -32
[18032.176046] ftdi_sio ttyUSB0: usb_serial_generic_read_bulk_callback - urb stopped: -32
I also recognized the statement below in dmesg.
[12191.865894] ftdi_sio ttyUSB0: failed to get modem status: -32
I've got a JTAG (J-Link more precisely) related problem.
I'm trying to connect by J-Link to raspberry pi 3b+ (bare-metal).
The probe finds the CPU and reads coresight ROM table, but there are missing information about Cross Trigger Interface (CTI). The units are available in the CPU according to ARM documentation.
There is a possibility to write a special script for J-Link, to set up CPU but documentation is poor and I do not know how to do it.
It there anyone who had or met with similar problem? Any advice how to run it?
Below is output from run of JLinkExe with attempt to connect:
./JLinkExe
SEGGER J-Link GDB Server V6.52c Command Line Version
JLinkARM.dll V6.52c (DLL compiled Oct 11 2019 15:44:50)
Command line: -if jtag -device Cortex-A53 -endian little -speed auto -port 2331 -swoport 2332 -telnetport 2333 -vd -ir -localhostonly 1 -singlerun -strict -timeout 0 -nogui -jlinkscriptfile /home/piotr/rpi.JLinkScript
-----GDB Server start settings-----
GDBInit file: none
GDB Server Listening port: 2331
SWO raw output listening port: 2332
Terminal I/O port: 2333
Accept remote connection: localhost only
Generate logfile: off
Verify download: on
Init regs on start: on
Silent mode: off
Single run mode: on
Target connection timeout: 0 ms
------J-Link related settings------
J-Link Host interface: USB
J-Link script: /home/piotr/rpi.JLinkScript
J-Link settings file: none
------Target related settings------
Target device: Cortex-A53
Target interface: JTAG
Target interface speed: auto
Target endian: little
Connecting to J-Link...
J-Link is connected.
Firmware: J-Link V10 compiled Oct 8 2019 14:57:57
Hardware: V10.10
S/N: 260111336
OEM: SEGGER-EDU
Feature(s): FlashBP, GDB
Checking target voltage...
Target voltage: 3.09 V
Listening on TCP/IP port 2331
Connecting to target...ERROR: CTI connected to core not found. Debugging not possible
ERROR: CTI connected to core not found. Debugging not possible
ERROR: Could not connect to target.
Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
Shutting down...
Could not connect to target.
Please check power, connection and settings. piotr / opt JLink ./JLinkExe
SEGGER J-Link Commander V6.52c (Compiled Oct 11 2019 15:44:58)
DLL version V6.52c, compiled Oct 11 2019 15:44:50
Connecting to J-Link via USB...O.K.
Firmware: J-Link V10 compiled Oct 8 2019 14:57:57
Hardware version: V10.10
S/N: 260111336
License(s): FlashBP, GDB
OEM: SEGGER-EDU
VTref=3.085V
Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: CORTEX-A53
Type '?' for selection dialog
Device>
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>J
Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
JTAGConf>
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "CORTEX-A53" selected.
Connecting to target via JTAG
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
Scanning AP map
AP scan stopped (required AP found)
AP[0]: APB-AP
Scanning ROMTbl # 0x80000000
[0]Comp[0] # 0x80010000: Cortex-A53
[0]Comp[1] # 0x80011000: PMU-A53
[0]Comp[2] # 0x80012000: Cortex-A53
[0]Comp[3] # 0x80013000: PMU-A53
[0]Comp[4] # 0x80014000: Cortex-A53
[0]Comp[5] # 0x80015000: PMU-A53
[0]Comp[6] # 0x80016000: Cortex-A53
[0]Comp[7] # 0x80017000: PMU-A53
End of ROM table
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
Scanning AP map
AP scan stopped (required AP found)
AP[0]: APB-AP
Scanning ROMTbl # 0x80000000
[0]Comp[0] # 0x80010000: Cortex-A53
[0]Comp[1] # 0x80011000: PMU-A53
[0]Comp[2] # 0x80012000: Cortex-A53
[0]Comp[3] # 0x80013000: PMU-A53
[0]Comp[4] # 0x80014000: Cortex-A53
[0]Comp[5] # 0x80015000: PMU-A53
[0]Comp[6] # 0x80016000: Cortex-A53
[0]Comp[7] # 0x80017000: PMU-A53
End of ROM table
****** Error: CTI connected to core not found. Debugging not possible
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
Scanning AP map
AP scan stopped (required AP found)
AP[0]: APB-AP
Scanning ROMTbl # 0x80000000
[0]Comp[0] # 0x80010000: Cortex-A53
[0]Comp[1] # 0x80011000: PMU-A53
[0]Comp[2] # 0x80012000: Cortex-A53
[0]Comp[3] # 0x80013000: PMU-A53
[0]Comp[4] # 0x80014000: Cortex-A53
[0]Comp[5] # 0x80015000: PMU-A53
[0]Comp[6] # 0x80016000: Cortex-A53
[0]Comp[7] # 0x80017000: PMU-A53
End of ROM table
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
Scanning AP map
AP scan stopped (required AP found)
AP[0]: APB-AP
Scanning ROMTbl # 0x80000000
[0]Comp[0] # 0x80010000: Cortex-A53
[0]Comp[1] # 0x80011000: PMU-A53
[0]Comp[2] # 0x80012000: Cortex-A53
[0]Comp[3] # 0x80013000: PMU-A53
[0]Comp[4] # 0x80014000: Cortex-A53
[0]Comp[5] # 0x80015000: PMU-A53
[0]Comp[6] # 0x80016000: Cortex-A53
[0]Comp[7] # 0x80017000: PMU-A53
End of ROM table
****** Error: CTI connected to core not found. Debugging not possible
Cannot connect to target.
You may find some of the information you need in this (detailed) article.
The (DBG/)CTI addresses you are looking for would then be:
set DBGBASE {0x80010000 0x80012000 0x80014000 0x80016000}
set CTIBASE {0x80018000 0x80019000 0x8001a000 0x8001b000}
Please note that you can test using OpenOCD, since it does support your J-Link EDU, by using the tcl/interface/jlink.cfg definition file, prior to resume your testing with J-Link commander.
You should use the trunk version of OpenOCD, since 0.10 does not support Armv8 form what I understand. The git repository is located here: git://repo.or.cz/openocd.git
Regarding the J-Link-specific script, you may search on the Segger support forum archives now that you know the CTI addresses, the information you are looking for may be available there. If not, just ask for help on the forum.
Update: you already asked for support on the forum I guess.
From the manual, page 218, you may just need to set CORESIGHT_Core-BaseAddr in your script - there is an example here.
How can i read sysfs attributes from user app. It is similar content from cat command. Such as I have a tag is brightness. How can i get the value of brightness tag? Because i need to read the USB infor from my app and i see they were exported to sysfs like below topology:
ls /sys/bus/usb/devices/1-1
1-1:1.0 busnum port
authorized configuration power
avoid_reset_quirk descriptors product
bConfigurationValue dev quirks
bDeviceClass devnum removable
bDeviceProtocol devpath remove
bDeviceSubClass driver serial
bMaxPacketSize0 ep_00 speed
bMaxPower idProduct subsystem
bNumConfigurations idVendor uevent
bNumInterfaces ltm_capable urbnum
bcdDevice manufacturer version
bmAttributes maxchild
Open the file using e.g. fopen("//sys/bus/usb/devices/1-1/version", "rt") and read its contents like with any other file. Not sure about brightness, you don't mention which file its in and there's no file with that name.