I have recently written numerous functions in C for microfluidic pumps which are controlled via I2C on a Raspberry Pi. They work perfectly. I made use of the O_RDWR to write and read from "/dev/i2c-1".
However, I am still wondering how exactly these file changes are implemented on a low level. How is the code, which generates the correct bit sequences to communicate with these pumps, transferred to the PINs? What tells the kernel to change the states of the 2 I2C-PINs accordingly to code?
Thank you!
In most cases, software is not directly responsible for generating each individual logic level change. Instead, it is a combination of a hardware based I2C controller, that is managed from software by a driver.
In the case of your RPi, you are most likely using this driver:
https://elixir.bootlin.com/linux/v5.19/source/drivers/i2c/busses/i2c-bcm2835.c
The hardware block that this driver is controlling is described in section 3 of this reference manual:
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
(A side note: the kernel does know how to generate all logic changes in software as well, for cases where no dedicated hardware is available. If you want to know more about that, have a look at the i2c-gpio driver)
Related
I need to develop device libraries like uBlox, IMUs, BLE, ecc.. from scratch (almost). Is there any doc or tutorial that can help me?
Question is, how to write a device library using C/C++ (Arduino style if you want) given a datasheet and a platform like STM32 or other ARMs?
Thanks so much
I've tried to read device libraries from Arduino library and various Github, but I would like to have a guide/template to follow (general rules) to write proper device libraries from a given datasheet.
I'm not asking a full definitive guide, just where to start, docs, methods approach.
I've found this one below, but is very basic and quite lite for my targets.
http://blog.atollic.com/device-driver-development-the-ultimate-guide-for-embedded-system-developers
I don't think that you can actually write libraries for STM32 in Arduino style. Most Arduino libraries you can find in the wild promote ease of usage rather than performance. For example, a simple library designed for a specific sensor works well if reading the sensor and reporting the results via serial port is the only thing that firmware must do. When you work on more complex projects where uC has lots to do and satisfy some real time constraints, the general Arduino approach doesn't solve your problems.
The problem with STM32 library development is the complex connection between peripherals, DMA and interrupts. I code them in register level without using the Cube framework and I often find myself digging the reference manual for tables that shows the connections between DMA channels or things like timer master-slave relations. Some peripherals (timers mostly) work similar but each one of them has small differences. It makes development of a hardware library that fits all scenarios practically impossible.
The tasks you need to accomplish are also more complex in STM32 projects. For example, in one of my projects, I fool SPI with a dummy/fake DMA transfer triggered by a timer, so that it can generate periodic 8-pulse trains from its clock pin (data pins are unused). No library can provide you this kind of flexibility.
Still, I believe not all is lost. I think it may be possible to build an hardware abstraction layer (HAL, but not The HAL by ST). So, it's possible to create useful libraries if you can abstract them from the hardware. A USB library can be a good example for this approach, as the STM32 devices have ~3 different USB peripheral hardware variations and it makes sense to write a separate HAL for each one of them. The upper application layer however can be the same.
Maybe that was the reason why ST created Cube framework. But as you know, Cube relies on external code generation tools which are aware of the hardware of each device. So, some of the work can be avoided in runtime. You can't achieve the same result when you write your own libraries unless you also design a similar external code generation tool. And also, the code Cube generates is bloated in most cases. You trade development time for runtime performance and code space.
I assume you will be using a cross toolchain on some platform like Linux, and that the cross toolchain is compatible with some method to load object code on the target CPU. I also assume that you already have a working STM32 board that is documented well enough to figure out how the sensors will connect to the board or to the CPU.
First, you should define what your library is supposed to provide. This part is usually surprisingly difficult. It’s a bit hard to know what it can provide, without knowing a bit about what the hardware sensors are capable of providing. Some iteration on the requirements is expected.
You will need to have access to the documentation for the sensors, usually in the form of the manufacturer’s data sheets. Using the datasheet, and knowing how the device is connected to the target CPU/board, you will need to access the STM32 peripherals that comprise the interface to the sensors. Back to the datasheets, this time for the STM32, to see how to access its peripheral interfaces. That might be simple GPIO bits and bytes, or might be how to use built-in peripherals such as SPI or I2C.
The datasheets for the sensors will detail a bunch of registers, describing the meaning of each, including the meanings of each bit, or group of bits, in certain registers. You will write code in C that accesses the STM32 peripherals, and those peripherals will access the sensors across the electrical interface that is part of the STM32 board.
The workflow usually starts out by writing to a register or three to see if there is some identifiable effect. For example, if you are exercising a digital IO port, you might wire up an LED to see if you can turn it on or off, or a switch to see if you can correctly read its state. This establishes that your code can poke or peek at IO using register level access. There may be existing helper functions to do this work as part of the cross toolchain. Or you might have to develop your own, using pointer indirection to access memory mapped IO. Or there might be specially instructions needed that can only be accessed from inline assembler code. This answer is generic as I don’t know the specifics of the STM32 processor or its typical ecosystem.
Then you move on to more complex operations that might involve sequences of operations, like cycling a bit or two to effect some communication with the device. Or it might be as simple as finding the proper sequence of registers to access for operation of a SPI interface. Often, you will find small chunks of code are complete enough to be re-used by your driver; like how to read or write an individual byte. You can then make that a reusable function to simplify the rest of the work, like accessing certain registers in sequence and printing the contents of register that you read to see if they make sense. Ultimately, you will have two important pieces of information: and understanding of the low-level register accesses needed to create a formal driver, and an understanding of what components and capabilities make up the hardware (ie, you know how the device(s) work).
Now, throw away most of what you’ve done, and develop a formal spec. Use what you now know to include everything that can be useful. Use what you now know to develop a spec that includes an appropriate interface API that your application code can use. Rewrite the driver, armed with the knowledge of how are the pieces work, and taking advantage of the blank canvas afforded you by the fresh rewrite of the spec. Only reuse code that you are completely confident is optimal and appropriate to the format dictated by the spec. Write test code for all of the modules, and use the test code to actually test that the code works and that it conforms to the spec. Re-use the test code every time you modify anything it tests.
I was wondering how I can write my C code (just one single .c with a couple of different functions) into just two functions with inputs and outputs.
I am looking for these because I am going two put some part of my code into CPU and leave the other in FPGA, they can communicate with each other via the interface in Zynq family board (e.g. ZC706).
In this regards, via the Vivado HLS, I have to have just one single Function which can be translated to e.g. VHDL via the Vivado HLS and the other function can stay in CPU.
Thanks in advance and if needed can share my code.
Not at all!
There are no pthreads or functions in FPGA.
You must think the FPGA is more like a circuit. There are physical connections like wires. Internally especially in the Zynq family you can communicate through the RAM, DMA controllers or via Registers.
There is documentation from Xilinx, what you need is AXI/AXI Stream.
But what you want to do is writing any C code and run them in the FPGA area like in a processor. And this approach is not promising.
In Vivado HLS you can write "functions" in C/C++/OpenCL/SystemC but it is only a block with inputs and outputs translated to a hardware description language (VHDL/Verilog).
You have to export it and add it in your Vivado Project to use it.
At this point maybe your IP created in HLS will do something you expect, but there is still a lot of work todo connecting the Ports in the right manner.
My advice is get familiar with the Zynq family and especially the AXI protocol. If you feel familiar with DMA/AXI4/AXI4S and how to access them from ARM and Logic then start using HLS. Otherwise you will not have the feeling how to write code HLS understands.
I am writing a linux kernel driver and am running into a strange issue which perhaps stems from my lack of understanding. The program I am writing is a kernel module that is attempting to do some communication over a GPIO. The communication protocol is simple (toggles high or low depending on what I am passing).
SITUATION There is an existing driver that is using a GPIO that I am interested in. It also uses it for communications, but only reads and does not write. My driver only does writing. The communication protocol we both use is the same. My module calls GPIO_REQUEST after the existing driver has set itself up (I do not have access to the source of the other driver).
Any attempt to get the gpio via GPIO_REQUEST will result in the driver resetting itself. I have confirmed this behaviour on the osciliscope.
QUESTION How can two drivers share a GPIO? I am assuming that my GPIO_REQUEST call somehow takes away control of the GPIO from the other driver and that calling GPIO_FREE does not fix the situation (causing the reset).
I would ideally like to "borrow" the gpio, set the direction to output, write my data, and then return it back to the other driver.
Note: Willing to modify kernel source if need be.
Cheers...
I understand that it stands for Hardware Abstraction Layer but what exactly does it do ? Is it designed for high level languages like VB to communicate with the hardware ? What about the IN/OUT instructions do these instructions call into a HAL routine or do they communicate directly with the hardware's device driver via the I/O manager ?
Thanks in advance
I understand that it stands for Hardware Abstraction Layer but what exactly does it do ?
It's essentially the "non-portable" part of the NT kernel, provided as a seperate module so that NT could be ported to multiple processor architectures. Example: interrupt routing.
Is it designed for high level languages like VB to communicate with the hardware ?
No. It is meant as support routines for the NT kernel. If you are coding in user mode (as you would be as in high level languages like VB) you have no need to know it exists.
What about the IN/OUT instructions do these instructions call into a HAL routine or do they communicate directly with the hardware's device driver via the I/O manager ?
When you use the the in and out instructions, this is talking directly to the CPU. This is entirely unrelated to the NT kernel topics you are discussing. There is no HAL there. There is no NT I/O manager. These instructions are what the x86 instruction set provides for talking to devices through an I/O address.
The HAL is designed to 'abstract' details of the hardware away from the operating system (It is a kernel component).
It provides routines to kernel for dealing with machine specific instructions (afaik includes handling of things like AVX state preservation through a context switch) as well as other details such as interrupts (Google 'Interrupts IDT' (no quotes))
Note that the HAL does not fully sit below the kernel, as the kernel still talks directly to hardware in some places, however the HAL also depends on the kernel for many of its functions (as such they often come in matched 'sets')
http://support.microsoft.com/kb/99588
The HAL is like an isolation layer, it means that things on either side of the layer can change, and (theoretically) it will have no effect on the other side.
This means various different kinds of hardware can be below the HAL, and the software that calls through the HAL doesn't care.
I have project to do. Which requires that I use FPGA. The theme is, that I need to create a circuit in FPGA using VHDL which would perform some task like multiplication or division. And then I need to send the input data from PowerPC(Built in Microcontroller in Virtex 4) to that circuit and then collect the data from output of FPGA circuit using PowerPC. I have tried looking at the manuals but failed to understand the communication between FPGA circuit and Microcontroller.
Google didn't help too..
Please let me know, if there is a book or a better tutorial which can help me in this project. Thanks in advance for your concern.
Note: I am using Virtex-4 ml403 FPGA board.
Thanks Again.
Take a look at Xapp717 from Xilinx.
http://www.xilinx.com/support/documentation/application_notes/xapp717.pdf
In the introduction it specifically mentions what you are trying to do. The APU in this context refers to the PowerPC.
This application note introduces the APU and describes the main features of an APU-enhanced
system. Included examples illustrate how the APU transfers data between the processor and
the FPGA. The two examples are:
• A simple system that moves data from memory through the processor and APU, into
registers in the FPGA, and back into memory
Source code is included (Xilinx login required)
http://www.xilinx.com/bvdocs/appnotes/xapp717.zip
Our software Impulse C will automatically make the bus connection to the PPC. You're welcome to try it for free. If you are interested send your Ethernet MAC to me or to info at ImpulseC and we'll get you started.
Best,
Brian
Do you need to implement a multiplier/divider to accelerate computing using FPGA? If so, you should design a multiplier/divider with VHDL code. Maybe using Xilinx IP core is the most convenient way. All you need to do is specify the parameter you want (e.g. input numbers are 32-bit). Synthesize your design and assign input/output pins. Then you can transfer data between PowerPC and FPGA through these pins.