why a command in makefile is always executed even of all Prerequisites is nothing change? - c

I have a C project , the struct is as the last part of this questions,
there is a main makefile in root and 3 makefile in AppCode\Comp2 AppCode\Comp3 AppCode\headlamp
I want to :
compile all c file in AppCode\Comp2 to object files , then archinve these object file to a library file (a file)
do the same step as 1 for every subdirectory in AppCode ,in this case are AppCode\Comp3 AppCode\headlamp
search all object files (*.o) in all directories expect AppCode in $(OBJ_FILES)
link all a files in AppCode $(ALL_a_in_AppCode) and o files $(OBJ_FILES) to a elf file
create hex file based on elf file
the main makefile will call the sub-dir's makefile ,
there is my main makefile in root :
include rules.mk
rwildcard=$(wildcard $1$2)$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2))
ALL_C_in_AppCode := $(call rwildcard,./AppCode,*.c)
ALL_O_in_AppCode := $(call rwildcard,./AppCode,*.o)
ALL_a_in_AppCode := $(call rwildcard,./AppCode,*.a)
AppCodeSubDirs := $(wildcard AppCode/**)
OBJPATH_IN_AppCode :=$(addsuffix /obj,$(AppCodeSubDirs))
APATH_IN_AppCode :=$(addsuffix /lib,$(AppCodeSubDirs))
APPCode_DIR = .\APPCode
CDD_dir =.\CDD
DemoAppCode_dir = .\DemoAppCode
Intergration_dir =.\Intergration
MCAL_dir=.\MCAL
VOS_BSW_dir=.\VOS\BSW
VOS_BSW_Config_dir=.\VOS\BSW_config
VOS_erika_dir=.\VOS\erika
VOS_LIB_dir=.\VOS\Lib
OBJ_FILES = $(wildcard $(CDD_dir)/*.o)
OBJ_FILES += $(wildcard $(DemoAppCode_dir)/*.o)
OBJ_FILES += $(wildcard $(Intergration_dir)/*.o)
OBJ_FILES += $(wildcard $(MCAL_dir)/*.o)
OBJ_FILES += $(wildcard $(VOS_BSW_dir)/*.o)
OBJ_FILES += $(wildcard $(VOS_BSW_Config_dir)/*.o)
OBJ_FILES += $(wildcard $(VOS_erika_dir)/*.o)
OBJ_FILES += $(wildcard $(VOS_LIB_dir)/*.o)
LDFLAGS = -mtc162 -T
all:erika3app.elf
$(OBJCOPY) --set-start 0x0000 -R .ram -R .sbRam -R .sb_fix_ram -I elf32-tricore -O ihex erika3app.elf erika3app.hex
erika3app.elf:$(OBJ_FILES) AppCodeLib
$(LD) $(LDFLAGS) .\Intergration\out\ee_tc_gcc_flash.ld -nostartfiles -Wl,--gc-sections -Wl,-Map=erika3app.map -L . -L .\Intergration\out\ -L .\Intergration\erika\mk $(OBJ_FILES) -o "erika3app.elf" -L .\Intergration\erika\lib -Wl,--start-group -lee -Wl,--end-group
AppCodeLib: $(AppCodeSubDirs)
$(AppCodeSubDirs):
make -C $#
clean:
-rm -rf $(OBJPATH_IN_AppCode) $(APATH_IN_AppCode) erika3app.hex erika3app.elf erika3app.map
print-%: ; #echo $* = $($*)
.PHONY:$(AppCodeSubDirs)
if i execute make , it seems that the command for erika3app.elf and all is always executed ,
as follow (i omit some meamless o files):
anyone can tell me why these two commands are always execute and how to fix it ?
Thanks!
PS D:\TEST\project> .\build.bat
make -C AppCode/headlamp
make[1]: Entering directory 'D:/TEST/project/AppCode/headlamp'
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-ar.exe csr lib/libheadlamp.a obj/app1.o obj/app21.o obj/app2.o
make[1]: Leaving directory 'D:/TEST/project/AppCode/headlamp'
make -C AppCode/Comp3
make[1]: Entering directory 'D:/TEST/project/AppCode/Comp3'
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-ar.exe csr lib/libComp3.a obj/33.o
make[1]: Leaving directory 'D:/TEST/project/AppCode/Comp3'
make -C AppCode/Comp2
make[1]: Entering directory 'D:/TEST/project/AppCode/Comp2'
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-ar.exe csr lib/libComp2.a obj/22.o
make[1]: Leaving directory 'D:/TEST/project/AppCode/Comp2'
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-gcc.exe -mtc162 -T .\Intergration\out\ee_tc_gcc_flash.ld -nostartfiles -Wl,--gc-sections -Wl,-Map=erika3app.map -L . -L .\Intergration\out\ -L .\Intergration\erika\mk .\DemoAppCode/Rte_Chas_SA_FDD_IBCInfo.c.o .\VOS\Lib/qn_strcpy.c.o -o "erika3app.elf" -L .\Intergration\erika\lib -Wl,--start-group -lee -Wl,--end-group
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-objcopy.exe --set-start 0x0000 -R .ram -R .sbRam -R .sb_fix_ram -I elf32-tricore -O ihex erika3app.elf erika3app.hex
PS D:\TEST\project>
PS D:\TEST\project>
PS D:\TEST\project>
PS D:\TEST\project> .\build.bat
make -C AppCode/headlamp
make[1]: Entering directory 'D:/TEST/project/AppCode/headlamp'
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-ar.exe csr lib/libheadlamp.a obj/app1.o obj/app21.o obj/app2.o
make[1]: Leaving directory 'D:/TEST/project/AppCode/headlamp'
make -C AppCode/Comp3
make[1]: Entering directory 'D:/TEST/project/AppCode/Comp3'
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-ar.exe csr lib/libComp3.a obj/33.o
make[1]: Leaving directory 'D:/TEST/project/AppCode/Comp3'
make -C AppCode/Comp2
make[1]: Entering directory 'D:/TEST/project/AppCode/Comp2'
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-ar.exe csr lib/libComp2.a obj/22.o
make[1]: Leaving directory 'D:/TEST/project/AppCode/Comp2'
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-gcc.exe -mtc162 -T .\Intergration\out\ee_tc_gcc_flash.ld -nostartfiles -Wl,--gc-sections -Wl,-Map=erika3app.map -L . -L .\Intergration\out\ -L .\Intergration\erika\mk .\DemoAppCode/Rte_Chas_SA_FDD_IBCInfo.c.o .\DemoAppCode/Rte_EN_SA_FDD_WaterTemp1Info.c.o ..\VOS\Lib/qn_strnlen.c.o .\VOS\Lib/qn_memset.c.o .\VOS\Lib/qn_strncpy.c.o .\VOS\Lib/qn_strlen.c.o .\VOS\Lib/qn_strcpy.c.o -o "erika3app.elf" -L .\Intergration\erika\lib -Wl,--start-group -lee -Wl,--end-group
C:\VOS_tools_repo\hightec_ifx\v4.9.2.0\bin\tricore-objcopy.exe --set-start 0x0000 -R .ram -R .sbRam -R .sb_fix_ram -I elf32-tricore -O ihex erika3app.elf erika3app.hex
PS D:\TEST\project>
here is my project struct:
D:.
| build.bat
| clean.bat
| makefile
| rules.mk
|
+---AppCode
| +---Comp2
| | | 22.c
| | | makefile
| | |
| |
| +---Comp3
| | | 33.c
| | | makefile
| | |
| |
| \---headlamp
| | makefile
| |
| +---left
| | app1.c
| | app1.h
| |
| \---right
| | app2.c
| | app2.h
| |
| \---rightright
| app21.c
|
+---CDD
| \---include
+---DemoAppCode
| Rte_Chas_SA_FDD_IBCInfo.c.o
|
+---Intergration
| | applSignature.oil
| | Dcm_CallOut.c.o
| |
| +---erika
| | +---lib
| | | libee.a
| | |
| | \---mk
| | ee.mk
| | ee_arch_cfg.mk
| |
| \---out
| ee_applcfg.h
|
+---MCAL
| Can_17_McmCan.c.o
| Wdg_17_Scu_PBcfg.c.o
|
+---other
\---VOS
+---BSW
| api_standalone.c.o
|
+---BSW_Config
| BswMBswMConfig_0_CommonPBcfg.c.o
| WdgM_PBcfg.c.o
|
+---erika
| ee_bss_data_init.c.o
| ee_oscfg.c.o
| osSignature.oil
|
\---LIB
libee.a
qn_memcpy.c.o

The command for all is executed because it does not create a file named all. That's why it will always be executed.
To prevent this you should not use any command for the all target but only for targets that correspond to a file of the same name.
The problem with erika3app.elf is probably related to AppCodeLib which also seems to be a phony target. make does not know what files might get updated by the rules to build AppCodeLib. You should use this as a dependency for the files that will actually be created/updated by this target. Or maybe AppCodeLib updates any of the object files?
The example below assumes that the rules for AppCodeLib will create/update the object files in $(OBJ_FILES).
Example:
# ...
.PHONY: all AppCodeLib
all: erika3app.hex
erika3app.hex: erika3app.elf
$(OBJCOPY) --set-start 0x0000 -R .ram -R .sbRam -R .sb_fix_ram -I elf32-tricore -O ihex erika3app.elf
erika3app.elf: $(OBJ_FILES)
$(LD) $(LDFLAGS) .\Intergration\out\ee_tc_gcc_flash.ld -nostartfiles -Wl,--gc-sections -Wl,-Map=erika3app.map -L . -L .\Intergration\out\ -L .\Intergration\erika\mk $(OBJ_FILES) -o "erika3app.elf" -L .\Intergration\erika\lib -Wl,--start-group -lee -Wl,--end-group
$(OBJ_FILES): AppCodeLib
AppCodeLib: $(AppCodeSubDirs)
# ...
If you create libraries for code in the subdirectories and link these libraries to your application you might need dependencies for the libraies as well.
You might consider using CMake for such a complex project.

Your targets all/AppCodeLib/$(AppCodeSubDirs) are phony targets, which means they are not files on disk, so their rules will be executed every time you make, so as targets depend on them. For example, your $(OBJCOPY) command will not generate a file named "all", and your erika3app.elf depends on AppCodeLib which is not a file so nowhere to know it is "ready" or not.
all:erika3app.elf
$(OBJCOPY) --set-start 0x0000 -R .ram -R .sbRam -R .sb_fix_ram -I elf32-tricore -O ihex erika3app.elf erika3app.hex
erika3app.elf:$(OBJ_FILES) AppCodeLib
$(LD) $(LDFLAGS) .\Intergration\out\ee_tc_gcc_flash.ld -nostartfiles -Wl,--gc-sections -Wl,-Map=erika3app.map -L . -L .\Intergration\out\ -L .\Intergration\erika\mk $(OBJ_FILES) -o "erika3app.elf" -L .\Intergration\erika\lib -Wl,--start-group -lee -Wl,--end-group
AppCodeLib: $(AppCodeSubDirs)
$(AppCodeSubDirs):
make -C $#
To fix this, you need to put your commands under non-phony targets, for example, if your $(OBJCOPY) command generates a file named "ihex" (I'm not sure about this), you could:
all: erika3app.elf ihex
ihex:
$(OBJCOPY) --set-start 0x0000 -R .ram -R .sbRam -R .sb_fix_ram -I elf32-tricore -O ihex erika3app.elf erika3app.hex
And make AppCodeLib depends on actual files, for example
AppCodeLib: AppCode\Comp2\22.a AppCode\Comp3\33.a ...
AppCode\Comp2\22.a:
make -C AppCode\Comp2
AppCode\Comp3\33.a:
make -C AppCode\Comp3
# Use `%` to make a pattern
The main point is that you need to depend on actual files.
EDIT:
A simple example:
CC = gcc
CFLAGS = -W -Wall -g
LFLAGS = -lm
all: AppCodeLib main.x
AppCodeSubDirs = AppCode/Comp2 AppCode/Comp3
Libs = AppCode/Comp2/22.o AppCode/Comp3/33.o # tested with .o, make it .a
main.x: main_c.c $(Libs) # depends on real files
$(CC) $(CFLAGS) -o $# $< $(LFLAGS)
AppCodeLib: $(AppCodeSubDirs)
$(AppCodeSubDirs):
make -C $#
.PHONY: all AppCodeLib $(AppCodeSubDirs)

Related

riscv64-linux-gnu-ld: undefined reference to `fseek'

Recently,I met with this problem under vmware ubuntu 22.04:
riscv64-linux-gnu-ld: loader.c:(.text.naive_uload+0x4c): undefined reference to fseek' riscv64-linux-gnu-ld: loader.c:(.text.naive_uload+0x78): undefined reference to fread'
riscv64-linux-gnu-ld: loader.c:(.text.naive_uload+0xbc): undefined reference to fseek' riscv64-linux-gnu-ld: loader.c:(.text.naive_uload+0xe0): undefined reference to fread'
I was using crossing compiler
My makefile is:
# Makefile for AbstractMachine Kernels and Libraries
### *Get a more readable version of this Makefile* by `make html` (requires python-markdown)
html:
cat Makefile | sed 's/^\([^#]\)/ \1/g' | markdown_py > Makefile.html
.PHONY: html
## 1. Basic Setup and Checks
### Default to create a bare-metal kernel image
ifeq ($(MAKECMDGOALS),)
MAKECMDGOALS = image
.DEFAULT_GOAL = image
endif
### Override checks when `make clean/clean-all/html`
ifeq ($(findstring $(MAKECMDGOALS),clean|clean-all|html),)
### Print build info message
$(info # Building $(NAME)-$(MAKECMDGOALS) [$(ARCH)])
### Check: environment variable `$AM_HOME` looks sane
ifeq ($(wildcard $(AM_HOME)/am/include/am.h),)
$(error $$AM_HOME must be an AbstractMachine repo)
endif
### Check: environment variable `$ARCH` must be in the supported list
ARCHS = $(basename $(notdir $(shell ls $(AM_HOME)/scripts/*.mk)))
ifeq ($(filter $(ARCHS), $(ARCH)), )
$(error Expected $$ARCH in {$(ARCHS)}, Got "$(ARCH)")
endif
### Extract instruction set architecture (`ISA`) and platform from `$ARCH`. Example: `ARCH=x86_64-qemu -> ISA=x86_64; PLATFORM=qemu`
ARCH_SPLIT = $(subst -, ,$(ARCH))
ISA = $(word 1,$(ARCH_SPLIT))
PLATFORM = $(word 2,$(ARCH_SPLIT))
### Check if there is something to build
ifeq ($(flavor SRCS), undefined)
$(error Nothing to build)
endif
### Checks end here
endif
## 2. General Compilation Targets
### Create the destination directory (`build/$ARCH`)
WORK_DIR = $(shell pwd)
DST_DIR = $(WORK_DIR)/build/$(ARCH)
$(shell mkdir -p $(DST_DIR))
### Compilation targets (a binary image or archive)
IMAGE_REL = build/$(NAME)-$(ARCH)
IMAGE = $(abspath $(IMAGE_REL))
ARCHIVE = $(WORK_DIR)/build/$(NAME)-$(ARCH).a
### Collect the files to be linked: object files (`.o`) and libraries (`.a`)
OBJS = $(addprefix $(DST_DIR)/, $(addsuffix .o, $(basename $(SRCS))))
LIBS := $(sort $(LIBS) am klib) # lazy evaluation ("=") causes infinite recursions
LINKAGE = $(OBJS) \
$(addsuffix -$(ARCH).a, $(join \
$(addsuffix /build/, $(addprefix $(AM_HOME)/, $(LIBS))), \
$(LIBS) ))
## 3. General Compilation Flags
### (Cross) compilers, e.g., mips-linux-gnu-g++
AS = $(CROSS_COMPILE)gcc
CC = $(CROSS_COMPILE)gcc
CXX = $(CROSS_COMPILE)g++
LD = $(CROSS_COMPILE)ld
OBJDUMP = $(CROSS_COMPILE)objdump
OBJCOPY = $(CROSS_COMPILE)objcopy
READELF = $(CROSS_COMPILE)readelf
### Compilation flags
INC_PATH += $(WORK_DIR)/include $(addsuffix /include/, $(addprefix $(AM_HOME)/, $(LIBS)))
INCFLAGS += $(addprefix -I, $(INC_PATH))
CFLAGS += -O2 -MMD -Wall -Werror $(INCFLAGS) \
-D__ISA__=\"$(ISA)\" -D__ISA_$(shell echo $(ISA) | tr a-z A-Z)__ \
-D__ARCH__=$(ARCH) -D__ARCH_$(shell echo $(ARCH) | tr a-z A-Z | tr - _) \
-D__PLATFORM__=$(PLATFORM) -D__PLATFORM_$(shell echo $(PLATFORM) | tr a-z A-Z | tr - _) \
-DARCH_H=\"arch/$(ARCH).h\" \
-fno-asynchronous-unwind-tables -fno-builtin -fno-stack-protector \
-Wno-main -U_FORTIFY_SOURCE
CXXFLAGS += $(CFLAGS) -ffreestanding -fno-rtti -fno-exceptions
ASFLAGS += -MMD $(INCFLAGS)
LDFLAGS += -z noexecstack
## 4. Arch-Specific Configurations
### Paste in arch-specific configurations (e.g., from `scripts/x86_64-qemu.mk`)
-include $(AM_HOME)/scripts/$(ARCH).mk
### Fall back to native gcc/binutils if there is no cross compiler
ifeq ($(wildcard $(shell which $(CC))),)
$(info # $(CC) not found; fall back to default gcc and binutils)
CROSS_COMPILE :=
endif
## 5. Compilation Rules
### Rule (compile): a single `.c` -> `.o` (gcc)
$(DST_DIR)/%.o: %.c
#mkdir -p $(dir $#) && echo + CC $<
#$(CC) -std=gnu11 $(CFLAGS) -c -o $# $(realpath $<)
### Rule (compile): a single `.cc` -> `.o` (g++)
$(DST_DIR)/%.o: %.cc
#mkdir -p $(dir $#) && echo + CXX $<
#$(CXX) -std=c++17 $(CXXFLAGS) -c -o $# $(realpath $<)
### Rule (compile): a single `.cpp` -> `.o` (g++)
$(DST_DIR)/%.o: %.cpp
#mkdir -p $(dir $#) && echo + CXX $<
#$(CXX) -std=c++17 $(CXXFLAGS) -c -o $# $(realpath $<)
### Rule (compile): a single `.S` -> `.o` (gcc, which preprocesses and calls as)
$(DST_DIR)/%.o: %.S
#mkdir -p $(dir $#) && echo + AS $<
#$(AS) $(ASFLAGS) -c -o $# $(realpath $<)
### Rule (recursive make): build a dependent library (am, klib, ...)
$(LIBS): %:
#$(MAKE) -s -C $(AM_HOME)/$* archive
### Rule (link): objects (`*.o`) and libraries (`*.a`) -> `IMAGE.elf`, the final ELF binary to be packed into image (ld)
$(IMAGE).elf: $(OBJS) am $(LIBS)
#echo + LD "->" $(IMAGE_REL).elf
#$(LD) $(LDFLAGS) -o $(IMAGE).elf --start-group $(LINKAGE) --end-group
### Rule (archive): objects (`*.o`) -> `ARCHIVE.a` (ar)
$(ARCHIVE): $(OBJS)
#echo + AR "->" $(shell realpath $# --relative-to .)
#ar rcs $(ARCHIVE) $(OBJS)
### Rule (`#include` dependencies): paste in `.d` files generated by gcc on `-MMD`
-include $(addprefix $(DST_DIR)/, $(addsuffix .d, $(basename $(SRCS))))
## 6. Miscellaneous
### Build order control
image: image-dep
archive: $(ARCHIVE)
image-dep: $(OBJS) am $(LIBS)
#echo \# Creating image [$(ARCH)]
.PHONY: image image-dep archive run $(LIBS)
### Clean a single project (remove `build/`)
clean:
rm -rf Makefile.html $(WORK_DIR)/build/
.PHONY: clean
### Clean all sub-projects within depth 2 (and ignore errors)
CLEAN_ALL = $(dir $(shell find . -mindepth 2 -name Makefile))
clean-all: $(CLEAN_ALL) clean
$(CLEAN_ALL):
-#$(MAKE) -s -C $# clean
.PHONY: clean-all $(CLEAN_ALL)
#HAS_NAVY = 1
RAMDISK_FILE = build/ramdisk.img
NAME = nanos-lite
SRCS = $(shell find -L ./src/ -name "*.c" -o -name "*.cpp" -o -name "*.S")
include $(AM_HOME)/Makefile
ifeq ($(ARCH),native)
ISA = am_native
else
INC_PATH += include $(NAVY_HOME)/libs/libc/include
endif
./src/resources.S: $(RAMDISK_FILE)
#touch $#
ifeq ($(HAS_NAVY),)
files = $(RAMDISK_FILE) src/files.h src/syscall.h
# create an empty file if it does not exist
$(foreach f,$(files),$(if $(wildcard $f),, $(shell touch $f)))
else
ifeq ($(wildcard $(NAVY_HOME)/libs/libos/src/syscall.h),)
$(error $$NAVY_HOME must be a Navy-apps repo)
endif
update:
$(MAKE) -s -C $(NAVY_HOME) ISA=$(ISA) ramdisk
#ln -sf $(NAVY_HOME)/build/ramdisk.img $(RAMDISK_FILE)
#ln -sf $(NAVY_HOME)/build/ramdisk.h src/files.h
#ln -sf $(NAVY_HOME)/libs/libos/src/syscall.h src/syscall.h
.PHONY: update
endif
I was fully unaware of what was happening.Who can help me,please!!!
Solve the cross compile link error

How can I make my Makefile build to the obj/ folder, not the src/ folder?

I am extending an old school project, and I have the Makefile the course staff made for us. I have reorganized the directory structure of the project like this.
+-----obj
|
+-----src
| |
| +-Makefile
| +-allocator.h
| +-debug_break.h
| +-rbtree_clrs.c
| +-rbtree_linked.c
| +-rbtree_stack.c
| +-rbtree_topdown.c
| +-rbtree_unified.c
| +-segment.c
| +-segment.h
| +-test_harness.c
| +-my_optional_program.c
|
+------scripts
The Makefile currently prepends the heap allocators I wrote (files starting with rbtree_) with either test_ or my_optional_program and puts them in the same directory as the Makefile. I can then run my different heap allocator implementations on the scripts in the scripts folder. Instead, I want this:
+-----obj
| +-my_optional_program_rbtree_clrs
| +-my_optional_program_rbtree_linked
| +-my_optional_program_rbtree_stack
| +-my_optional_program_rbtree_topdown
| +-my_optional_program_rbtree_unified
| +-test_rbtree_clrs
| +-test_rbtree_linked
| +-test_rbtree_stack
| +-test_rbtree_topdown
| +-test_rbtree_unified
|
+-----src
| |
| +-Makefile
| +-allocator.h
| +-debug_break.h
| +-rbtree_clrs.c
| +-rbtree_linked.c
| +-rbtree_stack.c
| +-rbtree_topdown.c
| +-rbtree_unified.c
| +-segment.c
| +-segment.h
| +-test_harness.c
| +-my_optional_program.c
|
+------scripts
What do I need to add or change in the Makefile so that it will build to the obj/ folder?
# They had us try different optimization levels here (-O0, -O2, etc).
rbtree_clrs.o: CFLAGS += -O0
rbtree_unified.o: CFLAGS += -O0
rbtree_linked.o: CFLAGS += -O0
rbtree_stack.o: CFLAGS += -O0
rbtree_topdown.o: CFLAGS += -O0
ALLOCATORS = rbtree_clrs rbtree_unified rbtree_stack rbtree_linked rbtree_topdown
PROGRAMS = $(ALLOCATORS:%=test_%)
MY_PROGRAMS = $(ALLOCATORS:%=my_optional_program_%)
all:: $(PROGRAMS) $(MY_PROGRAMS)
# I had to use gcc-11 on mac to be able to build this project.
UNAME := $(shell uname)
ifeq ($(UNAME),Darwin)
CC = gcc-11
else
CC = gcc
endif
CFLAGS = -g3 -std=gnu99 -Wall $$warnflags -fcf-protection=none -fno-pic -no-pie
export warnflags = -Wfloat-equal -Wtype-limits -Wpointer-arith -Wlogical-op -Wshadow -Winit-self -fno-diagnostics-show-option
LDFLAGS =
LDLIBS =
$(PROGRAMS): test_%:%.o segment.c test_harness.c
$(CC) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $#
$(MY_PROGRAMS): my_optional_program_%:my_optional_program.c %.o segment.c
$(CC) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $#
clean::
rm -f $(PROGRAMS) $(MY_PROGRAMS) *.o callgrind.out.*
.PHONY: clean all
.INTERMEDIATE: $(ALLOCATORS:%=%.o)
Update: This Makefile has solved the issue. I took Renaud Pacalet's Makefile (thanks!) and adjusted the paths to achieve the desired result. It seems not going up one level in the directories was an issue. Then I had to add the path I wanted to the ALLOCATORS in the PROGRAMS variable. I have no idea if this is how it should be done but it worked. I can update this if there is a better way.
SRCDIR = ../src
OBJDIR = ../obj
SRC := $(wildcard $(SRCDIR)/*.c)
OBJ := $(patsubst $(SRCDIR)/%.c, $(OBJDIR)/%.o,$(SRC))
# They had us try different optimization levels here (-O0, -O2, etc).
$(filter $(OBJDIR)/rbtree_%.o,$(OBJ)): CFLAGS += -O0
ALLOCATORS = rbtree_clrs rbtree_unified rbtree_stack rbtree_linked rbtree_topdown
PROGRAMS = $(addprefix $(OBJDIR)/test_,$(ALLOCATORS))
MY_PROGRAMS = $(addprefix $(OBJDIR)/my_optional_program_,$(ALLOCATORS))
all:: $(PROGRAMS) $(MY_PROGRAMS)
# I had to use gcc-11 on mac to be able to build this project.
UNAME := $(shell uname)
ifeq ($(UNAME),Darwin)
CC = gcc-11
else
CC = gcc
endif
CFLAGS = -g3 -std=gnu99 -Wall $$warnflags -fcf-protection=none -fno-pic -no-pie
export warnflags = -Wfloat-equal -Wtype-limits -Wpointer-arith -Wlogical-op -Wshadow -Winit-self -fno-diagnostics-show-option
LDFLAGS =
LDLIBS =
$(OBJ): $(OBJDIR)/%.o: $(SRCDIR)/%.c
$(CC) $(CFLAGS) -c -o $# $<
$(PROGRAMS): $(OBJDIR)/test_%: $(OBJDIR)/%.o segment.c test_harness.c
$(CC) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $#
$(MY_PROGRAMS): $(OBJDIR)/my_optional_program_%: my_optional_program.c $(OBJDIR)/%.o segment.c
$(CC) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $#
clean::
rm -f $(PROGRAMS) $(MY_PROGRAMS) $(OBJ) callgrind.out.*
You don't have a compilation rule so make uses its implicit rule for compilation which puts the object files in the same directory as the source files.
Simply add a rule of your own and rework a bit all references to object files:
OBJDIR := ../obj
SRC := $(wildcard *.c)
OBJ := $(patsubst %.c,$(OBJDIR)/%.o,$(SRC))
# They had us try different optimization levels here (-O0, -O2, etc).
$(filter $(OBJDIR)/rbtree_%.o,$(OBJ)): CFLAGS += -O0
ALLOCATORS = rbtree_clrs rbtree_unified rbtree_stack rbtree_linked rbtree_topdown
PROGRAMS = $(ALLOCATORS:%=$(OBJDIR)/test_%)
MY_PROGRAMS = $(ALLOCATORS:%=$(OBJDIR)/my_optional_program_%)
all:: $(PROGRAMS) $(MY_PROGRAMS)
# I had to use gcc-11 on mac to be able to build this project.
UNAME := $(shell uname)
ifeq ($(UNAME),Darwin)
CC = gcc-11
else
CC = gcc
endif
CFLAGS = -g3 -std=gnu99 -Wall $$warnflags -fcf-protection=none -fno-pic -no-pie
export warnflags = -Wfloat-equal -Wtype-limits -Wpointer-arith -Wlogical-op -Wshadow -Winit-self -fno-diagnostics-show-option
LDFLAGS =
LDLIBS =
$(OBJ): $(OBJDIR)/%.o: %.c
$(CC) $(CFLAGS) -c -o '$#' '$<'
$(PROGRAMS): $(OBJDIR)/test_%: $(OBJDIR)/%.o segment.c test_harness.c
$(CC) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $#
$(MY_PROGRAMS): $(OBJDIR)/my_optional_program_%: my_optional_program.c $(OBJDIR)/%.o segment.c
$(CC) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $#
clean::
rm -f $(PROGRAMS) $(MY_PROGRAMS) $(OBJ) callgrind.out.*
Note that you should also manage the dependencies between object and header files (which the above does not, just like the original version). If it's simple enough you'll easily modify the proposed Makefile. Else consider reading this very interesting post about Auto-Dependency Generation by the current GNU make main maintainer.

Multi target makefile with subfolders

My project has the following structure:
\---Project
+ Makefile
|
+---source
| +---target1
| | t1_lib.c
| | t1_main.c
| |
| +---target2
| | t2_lib.c
| | t2_main.c
| |
| \---common
| common_lib.c
|
+---headers
+---target1
| t1_lib.h
|
+---target2
| t2_lib.h
|
\---common
common_lib.h
I am trying to write a makefile which allows me to run 'make target1' or 'make target2' and compile target1 source code with common source code or compile target2 source code with common source code respectively.
In my project, target1 is call 'ue' and target2 is call 'enb'.
This is what I have in my current makefile:
# Author: j0lama
# COMPILER
CC = gcc
#FLAGS
CFLAGS = -c -Wall -ansi -g -std=c99 -D_DEBUG
#LIB FLAGS
LIBFLAGS = -lgc -rdynamic -lcrypto -lpthread
#LINK FLAGS
LINKFLAGS = -lsctp
# PATHS
UE_SOURCE_DIRECTORY = source/ue/
UE_INCLUDE_DIRECTORY = headers/ue/
ENB_SOURCE_DIRECTORY = source/enb/
ENB_INCLUDE_DIRECTORY = headers/enb/
COMMON_SRC_DIRECTORY = source/common/
COMMON_HDR_DIRECTORY = headers/common/
OBJECT_DIRECTORY = objects/
BUILD_DIRECTORY = build/
COMMON_CFILES= $(wildcard $(COMMON_SRC_DIRECTORY)*.c)
COMMON_OBJECTS= $(patsubst $(COMMON_SRC_DIRECTORY)%.c, $(OBJECT_DIRECTORY)%.o, $(COMMON_CFILES))
CFILES = $(COMMON_CFILES)
OBJECTS = $(COMMON_OBJECTS)
all: clean ue enb
ue: setup_ue $(OBJECT_DIRECTORY) $(TARGET) ue_emulator
enb: setup_enb $(OBJECT_DIRECTORY) $(TARGET) enb_emulator
setup_ue:
$(eval CFILES += $(wildcard $(UE_SOURCE_DIRECTORY)*.c))
$(eval OBJECTS += $(patsubst $(UE_SOURCE_DIRECTORY)%.c, $(OBJECT_DIRECTORY)%.o, $(wildcard $(UE_SOURCE_DIRECTORY)*.c)))
$(eval INCLUDE_DIRECTORY = $(UE_INCLUDE_DIRECTORY))
setup_enb:
$(eval CFILES += $(wildcard $(ENB_SOURCE_DIRECTORY)*.c))
$(eval OBJECTS += $(patsubst $(ENB_SOURCE_DIRECTORY)%.c, $(OBJECT_DIRECTORY)%.o, $(wildcard $(ENB_SOURCE_DIRECTORY)*.c)))
$(eval INCLUDE_DIRECTORY = $(ENB_INCLUDE_DIRECTORY))
$(OBJECT_DIRECTORY):
#mkdir $(OBJECT_DIRECTORY)
#echo "Building objects directory..."
ue_emulator: $(OBJECTS)
#echo "Building $#..."
#$(CC) $(OBJECTS) $(LIBFLAGS) $(LINKFLAGS) -o $#
enb_emulator: $(OBJECTS)
#echo "Building $#..."
#$(CC) $(OBJECTS) $(LIBFLAGS) $(LINKFLAGS) -o $#
$(OBJECT_DIRECTORY)%.o: $(SOURCE_DIRECTORY)%.c $(COMMON_SRC_DIRECTORY)%.c
#echo "Building $#..."
#$(CC) -I $(COMMON_HDR_DIRECTORY) -I $(INCLUDE_DIRECTORY) $(CFLAGS) $(LIBFLAGS) $< -o $#
.PHONY: clean
clean:
#echo "Removing objects files"
#rm -rf $(OBJECT_DIRECTORY) $(TARGET)
Somehow this makefile does not compile any file.

clang makefile "ar: no archive members specified"

I refactor some C code and I try to compile it as a lib on clang on mac instead of gcc on linux.
First of all if I just run make command I got an error at the first file compile:
+++ Compiling [sys_msg.c]
clang: error: unsupported argument '-adhlns=../../src/sys_msg.lst' to option 'Wa,'
So I remove the -Wa,-adhlns=$(<:.c=.lst) option that create this error.
After that everything seems to compile but the assembly of the last .a file fail, and I don't understand why.
Here is my make output :
+++ Creation of [../../hal/stub/obj]
+++ Dependencies of [hal.c]
+++ Dependencies of [target.c]
+++ Dependencies of [robus.c]
+++ Dependencies of [reception.c]
+++ Dependencies of [sys_msg.c]
+++ Compiling [sys_msg.c]
+++ Compiling [reception.c]
+++ Compiling [robus.c]
+++ Compiling [target.c]
+++ Compiling [hal.c]
ar -rv ../../hal/stub/libstub.a
ar: no archive members specified
usage: ar -d [-TLsv] archive file ...
ar -m [-TLsv] archive file ...
ar -m [-abiTLsv] position archive file ...
ar -p [-TLsv] archive [file ...]
ar -q [-cTLsv] archive file ...
ar -r [-cuTLsv] archive file ...
ar -r [-abciuTLsv] position archive file ...
ar -t [-TLsv] archive [file ...]
ar -x [-ouTLsv] archive [file ...]
make: *** [../../hal/stub/libstub.a] Error 1
Here is my makefile:
# make all = Make software and program
# make clean = Clean out built project files.
# make program = Download the hex file to the device, using avrdude. Please
# customize the avrdude settings below first!
# make docs = compile with doxygen the code documentation
# Maximum I2C speed (HZ)
SCLFREQ = 400000
#-------------------------------------------------------------------------------
# Tools
#-------------------------------------------------------------------------------
# Set DEBUG variable for once if not coming from command line
ifndef DEBUG
DEBUG = 0
endif
# Tool suffix when cross-compiling
CROSS_COMPILE ?=
# Compilation tools
CC = $(CROSS_COMPILE)gcc
AR = $(CROSS_COMPILE)ar
SIZE = $(CROSS_COMPILE)size
STRIP = $(CROSS_COMPILE)strip
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
SIZE = $(CROSS_COMPILE)size
GDB = $(CROSS_COMPILE)gdb
NM = $(CROSS_COMPILE)nm
ROOT_PATH = ../..
HAL_PATH = $(ROOT_PATH)/hal/$(BOARD)
DOC_PATH = $(ROOT_PATH)/../extra/Docs
# Doxygen configuration file name
DOXYFILE = $(ROOT_PATH)/../extra/.Doxyfile
OBJ_PATH = $(HAL_PATH)/obj
OUTPUT_NAME = lib$(BOARD)
OUTPUT_FILE_PATH = $(HAL_PATH)/$(OUTPUT_NAME).a
#|---------------------------------------------------------------------------------------|
#| Source files |
#|---------------------------------------------------------------------------------------|
include ../sources.mk
#|---------------------------------------------------------------------------------------|
#| Extract file names and path |
#|---------------------------------------------------------------------------------------|
PROJ_ASRCS = $(filter %.s,$(foreach file,$(SOURCES),$(file)))
PROJ_ASRCS += $(filter %.S,$(foreach file,$(SOURCES),$(file)))
PROJ_CSRCS = $(filter %.c,$(foreach file,$(SOURCES),$(file)))
PROJ_CPPSRCS = $(filter %.cpp,$(foreach file,$(SOURCES),$(file)))
#|---------------------------------------------------------------------------------------|
#| Set important path variables |
#|---------------------------------------------------------------------------------------|
VPATH = $(foreach path,$(sort $(foreach file,$(SOURCES),$(dir $(file)))),$(path) :)
INC_PATH = $(INCLUDES)
LIB_PATH = -L$(dir $(RESOURCES_LINKER))
#|---------------------------------------------------------------------------------------|
#| Options for compiler binaries |
#|---------------------------------------------------------------------------------------|
COMMON_FLAGS = \
-g -O$(OPT) \
-funsigned-char -fpack-struct -fshort-enums \
-Wall -Wstrict-prototypes \
-DMCU=$(MCU) \
-DMAINCLOCK=$(MAINCLOCK) \
-DSCLFREQ=$(SCLFREQ) \
$(INCLUDES)
ifeq ($(CROSS_COMPILE),avr-)
COMMON_FLAGS += -mmcu=$(MCU)
ASFLAGS = -mmcu=$(MCU)
endif
CFLAGS += $(COMMON_FLAGS) -std=gnu99
CPPFLAGS = $(COMMON_FLAGS) -std=gnu++11 -fno-rtti -fno-exceptions
ASFLAGS += -Wa,-adhlns=$(<:.S=.lst),-gstabs -I. -x assembler-with-cpp
LDFLAGS = -Wl,-Map=$(BOARD).map,--cref
#|---------------------------------------------------------------------------------------|
#| Define targets |
#|---------------------------------------------------------------------------------------|
#AOBJS += $(patsubst %.S,%.o,$(PROJ_ASRCS))
AOBJS = $(patsubst %.s,%.o,$(addprefix $(OBJ_PATH)/, $(notdir $(PROJ_ASRCS))))
COBJS = $(patsubst %.c,%.o,$(addprefix $(OBJ_PATH)/, $(notdir $(PROJ_CSRCS))))
CPPOBJS = $(patsubst %.cpp,%.o,$(addprefix $(OBJ_PATH)/, $(notdir $(PROJ_CPPSRCS))))
.PHONY: all clean print_info packaging
all: $(OUTPUT_FILE_PATH)
print_info:
#echo DEFAULT_GOAL ---------------------------------------------------------------------------------
#echo $(.DEFAULT_GOAL)
#echo VPATH ---------------------------------------------------------------------------------
#echo $(VPATH)
#echo SOURCES -------------------------------------------------------------------------------
#echo $(SOURCES)
# #echo PROJ_ASRCS ----------------------------------------------------------------------------
# #echo $(PROJ_ASRCS)
# #echo AOBJS ---------------------------------------------------------------------------------
# #echo $(AOBJS)
#echo PROJ_CSRCS ----------------------------------------------------------------------------
#echo $(PROJ_CSRCS)
#echo COBJS ---------------------------------------------------------------------------------
#echo $(COBJS)
#echo PROJ_CPPSRCS --------------------------------------------------------------------------
#echo $(PROJ_CPPSRCS)
#echo CPPOBJS -------------------------------------------------------------------------------
#echo $(CPPOBJS)
#echo ---------------------------------------------------------------------------------------
#echo $(CURDIR)
#echo $(OUTPUT_FILE_PATH)
#echo ---------------------------------------------------------------------------------------
$(OUTPUT_FILE_PATH): $(OBJ_PATH) ../rules.mk ../sources.mk $(HAL_PATH)/Makefile $(AOBJS) $(COBJS) $(CPPOBJS)
$(AR) -rv $(OUTPUT_FILE_PATH) $(AOBJS)
$(AR) -rv $(OUTPUT_FILE_PATH) $(COBJS)
$(AR) -rv $(OUTPUT_FILE_PATH) $(CPPOBJS)
$(NM) $(OUTPUT_FILE_PATH) > $(HAL_PATH)/$(OUTPUT_NAME)_symbols.txt
#|---------------------------------------------------------------------------------------|
#| Compile or assemble |
#|---------------------------------------------------------------------------------------|
$(AOBJS): $(OBJ_PATH)/%.o: %.s
#echo +++ Assembling [$(notdir $<)]
#$(AS) $(AFLAGS) $< -o $#
$(AOBJS): $(OBJ_PATH)/%.o: %.S
#echo +++ Assembling [$(notdir $<)]
#$(AS) $(AFLAGS) $< -o $#
$(COBJS): $(OBJ_PATH)/%.o: %.c
#echo +++ Compiling [$(notdir $<)]
#$(CC) $(CFLAGS) -c $< -o $#
$(CPPOBJS): $(OBJ_PATH)/%.o: %.cpp
#echo +++ Compiling [$(notdir $<)]
#$(CC) $(CPPFLAGS) -c $< -o $#
#|---------------------------------------------------------------------------------------|
#| Output folder |
#|---------------------------------------------------------------------------------------|
$(OBJ_PATH):
#echo +++ Creation of [$#]
#-mkdir $(OBJ_PATH)
#|---------------------------------------------------------------------------------------|
#| Cleanup |
#|---------------------------------------------------------------------------------------|
clean:
-rm -f $(OBJ_PATH)/* $(OBJ_PATH)/*.*
-rmdir $(OBJ_PATH)
-rm -f $(OUTPUT_FILE_PATH)
-rm -f $(HAL_PATH)/$(OUTPUT_NAME)_symbols.txt
-rm -rf $(DOC_PATH)
#|---------------------------------------------------------------------------------------|
#| Dependencies |
#|---------------------------------------------------------------------------------------|
$(OBJ_PATH)/%.d: %.s $(OBJ_PATH)
#echo +++ Dependencies of [$(notdir $<)]
#$(CC) $(AFLAGS) -MM -c $< -MT $(basename $#).o -o $#
$(OBJ_PATH)/%.d: %.S $(OBJ_PATH)
#echo +++ Dependencies of [$(notdir $<)]
#$(CC) $(AFLAGS) -MM -c $< -MT $(basename $#).o -o $#
$(OBJ_PATH)/%.d: %.c $(OBJ_PATH)
#echo +++ Dependencies of [$(notdir $<)]
#$(CC) $(CFLAGS) -MM -c $< -MT $(basename $#).o -o $#
$(OBJ_PATH)/%.d: %.cpp $(OBJ_PATH)
#echo +++ Dependencies of [$(notdir $<)]
#$(CC) $(CPPFLAGS) -MM -c $< -MT $(basename $#).o -o $#
#|---------------------------------------------------------------------------------------|
#| Include dependencies, if existing |
#| Little trick to avoid dependencies build for some rules when useless |
#| CAUTION: this won't work as expected with 'make clean all' |
#|---------------------------------------------------------------------------------------|
DEP_EXCLUDE_RULES := clean print_info
ifeq (,$(findstring $(MAKECMDGOALS), $(DEP_EXCLUDE_RULES)))
-include $(AOBJS:%.o=%.d)
-include $(COBJS:%.o=%.d)
-include $(CPPOBJS:%.o=%.d)
endif
#|---------------------------------------------------------------------------------------|
#| Module packaging for Arduino IDE Board Manager |
#|---------------------------------------------------------------------------------------|
packaging: $(OUTPUT_FILE_PATH)
docs: ( cat $(DOXYFILE) ; echo "OUTPUT_DIRECTORY = $(DOC_PATH)" ; echo "INPUT = $(DOC_SOURCES)" ) | doxygen -
# doxygen $(DOXYFILE)
%.d:
Why clang raise me this?
Thank's to #MadScientist
I understand why I have this error, if I print things on my make I got :
$make print_info
DEFAULT_GOAL ---------------------------------------------------------------------------------
all
VPATH ---------------------------------------------------------------------------------
../../hal/stub/ : ../../src/ :
SOURCES -------------------------------------------------------------------------------
../../src/sys_msg.c ../../src/reception.c ../../src/robus.c ../../src/target.c ../../hal/stub/hal.c
PROJ_ASRCS ----------------------------------------------------------------------------
AOBJS ---------------------------------------------------------------------------------
PROJ_CSRCS ----------------------------------------------------------------------------
../../src/sys_msg.c ../../src/reception.c ../../src/robus.c ../../src/target.c ../../hal/stub/hal.c
COBJS ---------------------------------------------------------------------------------
../../hal/stub/obj/sys_msg.o ../../hal/stub/obj/reception.o ../../hal/stub/obj/robus.o ../../hal/stub/obj/target.o ../../hal/stub/obj/hal.o
PROJ_CPPSRCS --------------------------------------------------------------------------
CPPOBJS -------------------------------------------------------------------------------
---------------------------------------------------------------------------------------
/Users/nico/Documents/pollen/Robus/robus/hal/stub
../../hal/stub/libstub.a
---------------------------------------------------------------------------------------
My mistake come for the for this part of my makefile :
PROJ_ASRCS = $(filter %.s,$(foreach file,$(SOURCES),$(file)))
PROJ_ASRCS += $(filter %.S,$(foreach file,$(SOURCES),$(file)))
I don't want to include all .o because I do multiple compilation, I just want to list the needed files.
I have the same compilation process than ExperimentalCore-sam project.
How can I do that?
I can only assume that the variable AOBJS is empty. Following back along where it's created, I can only assume that means that there are no .s or .S files listed in your SOURCES variable.
Why don't you run a single invocation of $(AR) and just use the $^ automatic variable and filter out .o files, rather than three different invocations of the $(AR) command?
$(AR) -rv $(OUTPUT_FILE_PATH) $(filter %.o,$^)
EDIT To be clear I'm suggesting you change your output target rule to this:
$(OUTPUT_FILE_PATH): $(OBJ_PATH) ../rules.mk ../sources.mk $(HAL_PATH)/Makefile $(AOBJS) $(COBJS) $(CPPOBJS)
$(AR) -rv $(OUTPUT_FILE_PATH) $(filter %.o,$^)
$(NM) $(OUTPUT_FILE_PATH) > $(HAL_PATH)/$(OUTPUT_NAME)_symbols.txt
Or, if you wanted to be more idiomatically correct:
$(OUTPUT_FILE_PATH): $(OBJ_PATH) ../rules.mk ../sources.mk $(HAL_PATH)/Makefile $(AOBJS) $(COBJS) $(CPPOBJS)
$(AR) -rv $# $(filter %.o,$^)
$(NM) $# > $(HAL_PATH)/$(OUTPUT_NAME)_symbols.txt
As above I'd definitely remove $(OBJ_PATH) from the prerequisites list.
I understand the difference between GCC and Clang.
With GCC if you run an ar command with no archive members specified, he just skip the step.
Clang raise an error in this case and stop the build.
To patch it I just check if my list is empty or not :
$(OUTPUT_FILE_PATH): $(OBJ_PATH) ../rules.mk ../sources.mk $(HAL_PATH)/Makefile $(AOBJS) $(COBJS) $(CPPOBJS)
ifneq ($(strip $(AOBJS)),)
$(AR) -rv $(OUTPUT_FILE_PATH) $(AOBJS)
endif
ifneq ($(strip $(COBJS)),)
$(AR) -rv $(OUTPUT_FILE_PATH) $(COBJS)
endif
ifneq ($(strip $(CPPOBJS)),)
$(AR) -rv $(OUTPUT_FILE_PATH) $(CPPOBJS)
endif

Defining Macros on the Command Line And In The Makefile ,Working on linux using gcc, writing c code

I have a file named: Makefile and a main.c file
i am doing the next code in the main.c file
int main(int argc, char *argv[])
{
//if 0 then it is default scheduling which is Round Robin.
//if 1 then the scheduling will be Round Robin.
//if 2 then the scheduling will be Priority based.
//if 3 then both scheduling are acceptable, and we decide to use Round Robin.
int scheduling = 0;
#ifdef SCHED_RR
printf("SCHED_RR is defined\n");
#ifdef SCHED_PB
printf("and also SCHED_PB is defined\n");
scheduling = 3;
#else
scheduling = 1;
#endif
#elseif SCHED_PB
printf("SCHED_PB is defined\n")
scheduling = 2;
#endif
printf("the number of the scheduling is %d\n",scheduling);
printf("bye bye\n");
return 0;
}//main
as you can see i am checking if a macro has been defined and which one.
now i want to run the program with my Makefile doing the next command line
make some_var=SCHED_RR
this pseudo command (because i don't know how to really do it) is meant to predefine the macro SCHED_RR
also i want to be able to write the command
make some_var=SCHED_PB
and
make some_var1=SCHED_RR some_var2=SCHED_PB
the last one is for the case that someone would want to predefine both scheduling
now my problem is: i don't know how and where to write it in my Makefile
and also how to write it in the command line?
this is my Makefile which of course shows that my real program is bigger
so where and what should i add to this make file
OBJS = \
bio.o\
console.o\
exec.o\
file.o\
fs.o\
ide.o\
ioapic.o\
kalloc.o\
kbd.o\
lapic.o\
log.o\
main.o\
mp.o\
picirq.o\
pipe.o\
proc.o\
spinlock.o\
string.o\
swtch.o\
syscall.o\
sysfile.o\
sysproc.o\
timer.o\
trapasm.o\
trap.o\
uart.o\
vectors.o\
vm.o\
# Cross-compiling (e.g., on Mac OS X)
#TOOLPREFIX = i386-jos-elf-
# Using native tools (e.g., on X86 Linux)
#TOOLPREFIX =
# Try to infer the correct TOOLPREFIX if not set
ifndef TOOLPREFIX
TOOLPREFIX := $(shell if i386-jos-elf-objdump -i 2>&1 | grep '^elf32-i386$$' >/dev/null 2>&1; \
then echo 'i386-jos-elf-'; \
elif objdump -i 2>&1 | grep 'elf32-i386' >/dev/null 2>&1; \
then echo ''; \
else echo "***" 1>&2; \
echo "*** Error: Couldn't find an i386-*-elf version of GCC/binutils." 1>&2; \
echo "*** Is the directory with i386-jos-elf-gcc in your PATH?" 1>&2; \
echo "*** If your i386-*-elf toolchain is installed with a command" 1>&2; \
echo "*** prefix other than 'i386-jos-elf-', set your TOOLPREFIX" 1>&2; \
echo "*** environment variable to that prefix and run 'make' again." 1>&2; \
echo "*** To turn off this error, run 'gmake TOOLPREFIX= ...'." 1>&2; \
echo "***" 1>&2; exit 1; fi)
endif
# If the makefile can't find QEMU, specify its path here
#QEMU =
# Try to infer the correct QEMU
ifndef QEMU
QEMU = $(shell if which qemu > /dev/null; \
then echo qemu; exit; \
else \
qemu=/Applications/Q.app/Contents/MacOS/i386-softmmu.app/Contents/MacOS/i386-softmmu; \
if test -x $$qemu; then echo $$qemu; exit; fi; fi; \
echo "***" 1>&2; \
echo "*** Error: Couldn't find a working QEMU executable." 1>&2; \
echo "*** Is the directory containing the qemu binary in your PATH" 1>&2; \
echo "*** or have you tried setting the QEMU variable in Makefile?" 1>&2; \
echo "***" 1>&2; exit 1)
endif
CC = $(TOOLPREFIX)gcc
AS = $(TOOLPREFIX)gas
LD = $(TOOLPREFIX)ld
OBJCOPY = $(TOOLPREFIX)objcopy
OBJDUMP = $(TOOLPREFIX)objdump
#CFLAGS = -fno-pic -static -fno-builtin -fno-strict-aliasing -O2 -Wall -MD -ggdb -m32 -Werror -fno-omit-frame-pointer
CFLAGS = -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -MD -ggdb -m32 -Werror -fno-omit-frame-pointer
CFLAGS += $(shell $(CC) -fno-stack-protector -E -x c /dev/null >/dev/null 2>&1 && echo -fno-stack-protector)
ASFLAGS = -m32 -gdwarf-2 -Wa,-divide
# FreeBSD ld wants ``elf_i386_fbsd''
LDFLAGS += -m $(shell $(LD) -V | grep elf_i386 2>/dev/null)
xv6.img: bootblock kernel fs.img
dd if=/dev/zero of=xv6.img count=10000
dd if=bootblock of=xv6.img conv=notrunc
dd if=kernel of=xv6.img seek=1 conv=notrunc
xv6memfs.img: bootblock kernelmemfs
dd if=/dev/zero of=xv6memfs.img count=10000
dd if=bootblock of=xv6memfs.img conv=notrunc
dd if=kernelmemfs of=xv6memfs.img seek=1 conv=notrunc
bootblock: bootasm.S bootmain.c
$(CC) $(CFLAGS) -fno-pic -O -nostdinc -I. -c bootmain.c
$(CC) $(CFLAGS) -fno-pic -nostdinc -I. -c bootasm.S
$(LD) $(LDFLAGS) -N -e start -Ttext 0x7C00 -o bootblock.o bootasm.o bootmain.o
$(OBJDUMP) -S bootblock.o > bootblock.asm
$(OBJCOPY) -S -O binary -j .text bootblock.o bootblock
./sign.pl bootblock
entryother: entryother.S
$(CC) $(CFLAGS) -fno-pic -nostdinc -I. -c entryother.S
$(LD) $(LDFLAGS) -N -e start -Ttext 0x7000 -o bootblockother.o entryother.o
$(OBJCOPY) -S -O binary -j .text bootblockother.o entryother
$(OBJDUMP) -S bootblockother.o > entryother.asm
initcode: initcode.S
$(CC) $(CFLAGS) -nostdinc -I. -c initcode.S
$(LD) $(LDFLAGS) -N -e start -Ttext 0 -o initcode.out initcode.o
$(OBJCOPY) -S -O binary initcode.out initcode
$(OBJDUMP) -S initcode.o > initcode.asm
kernel: $(OBJS) entry.o entryother initcode kernel.ld
$(LD) $(LDFLAGS) -T kernel.ld -o kernel entry.o $(OBJS) -b binary initcode entryother
$(OBJDUMP) -S kernel > kernel.asm
$(OBJDUMP) -t kernel | sed '1,/SYMBOL TABLE/d; s/ .* / /; /^$$/d' > kernel.sym
# kernelmemfs is a copy of kernel that maintains the
# disk image in memory instead of writing to a disk.
# This is not so useful for testing persistent storage or
# exploring disk buffering implementations, but it is
# great for testing the kernel on real hardware without
# needing a scratch disk.
MEMFSOBJS = $(filter-out ide.o,$(OBJS)) memide.o
kernelmemfs: $(MEMFSOBJS) entry.o entryother initcode fs.img
$(LD) $(LDFLAGS) -Ttext 0x100000 -e main -o kernelmemfs entry.o $(MEMFSOBJS) -b binary initcode entryother fs.img
$(OBJDUMP) -S kernelmemfs > kernelmemfs.asm
$(OBJDUMP) -t kernelmemfs | sed '1,/SYMBOL TABLE/d; s/ .* / /; /^$$/d' > kernelmemfs.sym
tags: $(OBJS) entryother.S _init
etags *.S *.c
vectors.S: vectors.pl
perl vectors.pl > vectors.S
ULIB = ulib.o usys.o printf.o umalloc.o uthread.o
_%: %.o $(ULIB)
$(LD) $(LDFLAGS) -N -e main -Ttext 0 -o $# $^
$(OBJDUMP) -S $# > $*.asm
$(OBJDUMP) -t $# | sed '1,/SYMBOL TABLE/d; s/ .* / /; /^$$/d' > $*.sym
_forktest: forktest.o $(ULIB)
# forktest has less library code linked in - needs to be small
# in order to be able to max out the proc table.
$(LD) $(LDFLAGS) -N -e main -Ttext 0 -o _forktest forktest.o ulib.o usys.o
$(OBJDUMP) -S _forktest > forktest.asm
mkfs: mkfs.c fs.h
gcc -DVarName=$(VarName) -m32 -Werror -Wall -o mkfs mkfs.c
UPROGS=\
_cat\
_echo\
_forktest\
_grep\
_init\
_kill\
_ln\
_ls\
_mkdir\
_rm\
_sh\
_stressfs\
_usertests\
_wc\
_zombie\
_main\
fs.img: mkfs README $(UPROGS)
./mkfs fs.img README $(UPROGS)
-include *.d
clean:
rm -f *.tex *.dvi *.idx *.aux *.log *.ind *.ilg \
*.o *.d *.asm *.sym vectors.S bootblock entryother \
initcode initcode.out kernel xv6.img fs.img kernelmemfs mkfs \
.gdbinit \
$(UPROGS)
# make a printout
FILES = $(shell grep -v '^\#' runoff.list)
PRINT = runoff.list runoff.spec README toc.hdr toc.ftr $(FILES)
xv6.pdf: $(PRINT)
./runoff
ls -l xv6.pdf
print: xv6.pdf
# run in emulators
bochs : fs.img xv6.img
if [ ! -e .bochsrc ]; then ln -s dot-bochsrc .bochsrc; fi
bochs -q
# try to generate a unique GDB port
GDBPORT = $(shell expr `id -u` % 5000 + 25000)
# QEMU's gdb stub command line changed in 0.11
QEMUGDB = $(shell if $(QEMU) -help | grep -q '^-gdb'; \
then echo "-gdb tcp::$(GDBPORT)"; \
else echo "-s -p $(GDBPORT)"; fi)
ifndef CPUS
CPUS := 1
endif
QEMUOPTS = -hdb fs.img xv6.img -smp $(CPUS) -m 512 $(QEMUEXTRA)
qemu: fs.img xv6.img
$(QEMU) -serial mon:stdio $(QEMUOPTS)
qemu-memfs: xv6memfs.img
$(QEMU) xv6memfs.img -smp $(CPUS)
qemu-nox: fs.img xv6.img
$(QEMU) -nographic $(QEMUOPTS)
.gdbinit: .gdbinit.tmpl
sed "s/localhost:1234/localhost:$(GDBPORT)/" < $^ > $#
qemu-gdb: fs.img xv6.img .gdbinit
#echo "*** Now run 'gdb'." 1>&2
$(QEMU) -serial mon:stdio $(QEMUOPTS) -S $(QEMUGDB)
qemu-nox-gdb: fs.img xv6.img .gdbinit
#echo "*** Now run 'gdb'." 1>&2
$(QEMU) -nographic $(QEMUOPTS) -S $(QEMUGDB)
# CUT HERE
# prepare dist for students
# after running make dist, probably want to
# rename it to rev0 or rev1 or so on and then
# check in that version.
EXTRA=\
mkfs.c ulib.c user.h cat.c echo.c forktest.c grep.c kill.c\
ln.c ls.c mkdir.c rm.c stressfs.c usertests.c wc.c zombie.c\
printf.c umalloc.c main.c\
README dot-bochsrc *.pl toc.* runoff runoff1 runoff.list\
.gdbinit.tmpl gdbutil\
dist:
rm -rf dist
mkdir dist
for i in $(FILES); \
do \
grep -v PAGEBREAK $$i >dist/$$i; \
done
sed '/CUT HERE/,$$d' Makefile >dist/Makefile
echo >dist/runoff.spec
cp $(EXTRA) dist
dist-test:
rm -rf dist
make dist
rm -rf dist-test
mkdir dist-test
cp dist/* dist-test
cd dist-test; $(MAKE) print
cd dist-test; $(MAKE) bochs || true
cd dist-test; $(MAKE) qemu
# update this rule (change rev#) when it is time to
# make a new revision.
tar:
rm -rf /tmp/xv6
mkdir -p /tmp/xv6
cp dist/* dist/.gdbinit.tmpl /tmp/xv6
(cd /tmp; tar cf - xv6) | gzip >xv6-rev5.tar.gz
.PHONY: dist-test dist
thank you
What you need is
make -e VarName=VarValue
This will export the VarName into the makefile where you can use it as a $(VarName) in the gcc compile statement.
So, in the makefile it would be
gcc -DVarName=$(VarName) -c your_source.c -o your_obj.o
For the "#ifdef" situation you either have to change it to "#if", or use this:
make -e SCHED_PR=1
and in the makefile
ifeq ($(SCHED_PR), 1)
mkfs: .....
gcc -DSCHED_PR=1 ....
else
mkfs: .....
gcc ....
endif
In the .c file
#if SCHED_PR
...

Resources