I have written a code in keil in which there is a loop containing a multiplication which can be done either by shift left by 1 or MUL command. However, both are executed only in the 1st iteration and in the next ones, compiler executes the code, while nothing happens.
Is there someone who knows the probable reason?
Thanks
Here is the code of the loop:
loop ADD r9, r9, #1
;MUL r8, r7, r11 ;double the X
LSL r12, r7, #1
CMP r12, r4 ;CMP the X with P
BHI G1
BLS G0
it was solved. it occured because this is a consecutive shift and it should be shifted by 1 at each iteration. the written code copies the source into destination and then, shift by 1. So it is not modified after the 1st iteration. the solution is modifying r7 by LSL r7, #1. This is shifted r7 by 1 position at all iterations.
Related
this works, but I have to do it using auto-indexing and I can not figure out that part.
writeloop:
cmp r0, #10
beq writedone
ldr r1, =array1
lsl r2, r0, #2
add r2, r1, r2
str r2, [r2]
add r0, r0, #1
b writeloop
and for data I have
.balign 4
array1: skip 40
What I had tried was this, and yes I know it is probably a poor attempt but I am new to this and do not understand
ldr r1, =array1
writeloop:
cmp r0, #10
beq writedone
ldr r2, [r1], #4
str r2, [r2]
add r0, r0, #1
b writeloop
It says segmentation fault when I try this. What is wrong? What I am thinking should happen is every time it loops through, it sets the element r2 it at = to the address of itself, and then increments to the next element and does the same thing
The ARM architechures gives several different address modes.
From ARM946E-S product overview and many other sources:
Load and store instructions have three primary addressing modes
- offset
- pre-indexed
- post-indexed.
They are formed by adding or subtracting an immediate or register-based offset to or from a base register. Register-based offsets can also be scaled with shift operations. Pre-indexed and post-indexed addressing modes update the base register with the base plus offset calculation. As the PC is a general purpose register, a 32‑bit value can be loaded directly into the PC to perform a jump to any address in the 4GB memory space.
As well, they support write back or updating of the register, hence the reason for pre-indexed and post-indexed. Post-index doesn't make much sense without write back.
Now to your issue, I believe that you want to write the values 0-9 to an array of ten words (length four bytes). Assuming this, you can use indexing and update the value via add. This leads to,
mov r0, #0 ; start value
ldr r1, =array1 ; array pointer
writeloop:
cmp r0, #10
beq writedone
str r0, [r1, r0, lsl #2] ; index with r1 base by r0 scaled by *4
add r0, r0, #1
b writeloop
writedone:
; code to jump somewhere else and not execute data.
.balign 4
array1: skip 40
For interest a more efficient loop can be done by counting and writing down,
mov r0, #9 ; start value
ldr r1, =array1 ; array pointer
writeloop:
str r0, [r1, r0, lsl #2] ; index with r1 base by r0 scaled by *4
subs r0, r0, #1
bne writeloop
Your original example was writing the pointer to the array; often referred to as 'value equals address'. If this is what you want,
ldr r0, =array_end ; finished?
ldr r1, =array1 ; array pointer
write_loop:
str r1, [r1], #4 ; add four and update after storing
cmp r0, r1
bne write_loop
; code to jump somewhere else and not execute data.
.balign 4
array1: skip 40
array_end:
I am working on one of the simple codes assigned for a ARM microprocessor course I'm taking. I am having a slight issue with getting my code to load a value of an array to compare using Keil. The program is supposed to compare 5 numbers and then store values if the comparison is true. When I run my program it will not load array values that I declared. My professor isn't much help either and doesn't seem to know why it's not working properly.
Here's what I have done so far. I also think my PUSH is wrong but I can probably figure that out after I at least get the array to load. I should be pushing those values onto the stack but I am pretty sure I'm just loading values in registers instead.
AREA main, CODE, READONLY
EXPORT __main
ENTRY
__main PROC
MOVS r5, #0
LDR r0, =NUMB
loop1
LDR r1, [r0]
CMP r5, #5
BEQ stop
loop
CMP r1, #10
BLT low10
CMP r1, #100
BLT mid
CMP r1, #255
BLT high100
low10
PUSH {r2}
MOVS r2, #2
ADDS r5, #1
B loop1
mid
PUSH {r3}
MOVS r3, #0
ADDS r5, #1
B loop1
high100
PUSH {r4}
MOVS r4, #1
ADDS r5, #1
B loop1
stop B stop
ENDP
AREA myDATA, DATA, READWRITE
ALIGN
NUMB DCD 1,11,111,11,1
END
With respect to the array, your element size is not 1-byte, it's 4-bytes.
Using GNU & GDB, if we examine the address at R0 and interpret as signed words (i.e, 4 byte form), we see the expected array values.
.data
NUMB: .word 1,11,111,11,1
...
LDR r0, =NUMB
(gdb) x/8wd $r0
0x200dc: 1 11 111 11
0x200ec: 1 4929 1634033920 16804194
So you will need to change your values in the context of R5 to assume a 4-byte word. E.g.,
CMP r5, #(4*5)
ADDS r5, #4
Is is sadly very simple, just change in myData READWRITE to READONLY :)
i have an assignment which requires me to loop through string of numbers and perform task based on each number. For example, if numbers are "24531", i have to blink the LED lights on my microprocessor boards which are on indices "2", "4", "5", "3" and "1".
I'm just stuck on the part where i need to loop through these string of numbers and have to interpret them individually in ARM assembly language.
Borrowing from original code by Colin__s
You can construe the string as byte size elements of some array.
Use ldrb to load byte from array at element n...
The code below will branch to "some function" when ASCII value for #4 is encountered. The code will fail to return; which is one of several things you will need to further resolve.
.data
array: .string "123456"
.equ len.array,.-array
.align
.text
.global main
main:
nop
ldr r2,=array // pointer
MOV r0, #0 // initialise loop index to 0
MOV r1, #len.array // number of elements
Loop:
ldrb r3, [r2,r0]
cmp r3, #0x34 // #4
beq _do_something
ADD r0, r0, #1 //increment loop index
CMP r0, r1
BLE Loop
_exit:
mov r7, #1
svc 0
_do_something:
ldr r10,=0xdeadc0de
I don't completely follow your question, but the code for a loop is below. You can add whatever it is you need to do on each iteration before the compare instruction.
MOV r0, #0 ;initialise loop index to 0
MOV r1, #100 ;number of iterations
Loop:
ADD r0, r0, #1 ;increment loop index
CMP r0, r1
BLE Loop
I am trying to compare two registers r5 and r6 which I know I can do with
CMP R7, R5
What I am trying to do is
if R7 > 1 then ADD R8, R8, #1 Without branching as I will be using this multiple times in different sections of the code
I know BGT will branch if greater than, or if its possible to return to previous position after branching to add to count?
Many ARM instructions are defined as OP{cond}, this means you can make the execution of this instruction depend on a condition:
cmp r5, r7
addgt r8, r8, #1 //increments r8 if r5 is greater than r7
mov r1, r0 //executes in any case
I'm working on a program that counts the number of 1's and 0's of a binary string.
My CountOnes subroutine works as expected:
countOnes MOV r1, r0 ;mov random number into r1
TEQ r1, #0 ;test if all 0
MOVEQ pc, r14 ;if all 0's, brake
onesloop SUB r2, r1, #1 ;subtract 1
AND r1, r2, r1 ;and on r1 and r2
ADD r9, r9, #1 ;increment loop counter
TEQ r1, #0 ;test if all 0
BNE onesloop ;if not all 0's, loop
MOV pc, r14 ;return
countZeros MOV r1, r0 ;mov random number in r1
MVN r8, #0 ;fill r8 with 1's
TEQ r1, r8 ;test if number is all 1's
MOVEQ pc, r14 ;if all 1's, break
zerosloop ADD r2, r1, #1 ;add 1 to r2
AND r1, r2, r1 ;and r1 and r2
ADD r9, r9, #1 ;increment loop count
TEQ r1, r8 ;test if all ones
BNE zerosloop ;if not all 1's, loop
MOV pc, r14 ;return
However, my countZeros subroutine loops indefinitely, and after looking at it with a debugger, it turns out that the ADD and AND instructions are only executed the first time through the loop(which is the reason for the infinite loop), however, the entire loop is not broken, register 9 continues to be incremented every iteration.
I can't think of any reason for those instructions to stop being executed. Anyone encounter this behavior before or know what would cause it? If you need more info on anything just ask.
In your zerosloop you need to OR r1, r2, r1 instead of AND.
Also you should use CMN r1, #1 to find out whether r1 is all 1s.
This article on ARM population counts might be worth a look:
http://www.sciencezero.org/index.php?title=ARM:_Count_ones_(bit_count)