Advice on Makefile and build system structure with a C library - c

Question

What I want to achieve:
I have a library that has submodules which depend on each other.
I want to have a Makefile for each submodule and then I combine the submodules into one .a file with another Makefile in the root of the repository. The submodules are in their won folders and will compile the .o files into their won obj directories.
What I have now
Makefile that combines the libs:
NAME = libcore.a
HEADERS = arr/inc mem/inc str/inc map/inc
FOLDER = src
MEM = mem
ARR = arr
STR = str
MAP = map
MEM_O = $(wildcard mem/obj/*.o)
ARR_O = $(wildcard arr/obj/*.o)
STR_O = $(wildcard str/obj/*.o)
MAP_O = $(wildcard map/obj/*.o)
OBJ = $(MEM_O) $(ARR_O) $(STR_O) $(MAP_O)
RM = rm -f
all: $(OBJ)
#make -C $(MEM)
#make -C $(ARR)
#make -C $(STR)
#make -C $(MAP)
#ar -rcs $(NAME) $(OBJ)
#echo "\\n\033[32;1mCORE ACTIVATED \033[0m \\n"
clean:
#make clean -C $(MEM)
#make clean -C $(ARR)
#make clean -C $(STR)
#make clean -C $(MAP)
#echo "\\n\033[32;1mCORE DEACTIVATED \033[0m \\n"
fclean: clean
#${RM} ${NAME}
#make fclean -C $(MEM)
#make fclean -C $(ARR)
#make fclean -C $(STR)
#make fclean -C $(MAP)
re: fclean all
.PHONY: all fclean clean re
Makefile for an individual submodule:
NAME = libarr.a
CC = clang
CFLAGS = -O3 -Wall -Wextra -Werror -Wpedantic -Wtype-limits \
-Wunreachable-code -Wpadded -Wshadow -fPIC -Wconversion
SRC_DIR = src/
INC_DIR = inc/
OBJ_DIR = obj/
SRC_BASE = arr_add.c \
arr_add_first.c \
arr_add_last.c \
arr_add_mult.c \
arr_new.c \
arr_put.c \
arr_free.c \
arr_del.c \
arr_del_first.c \
arr_del_last.c \
arr_get.c \
arr_get_first.c \
arr_get_last.c \
arr_iter.c \
arr_iter_range.c \
arr_join.c \
arr_read_file.c \
arr_take.c \
arr_take_first.c \
arr_take_last.c \
arr_search.c \
arr_find.c \
arr_parse.c \
arr_write.c \
arr_null.c \
arr_grow.c \
arr_copy.c \
arr_rotate.c \
SRC = $(addprefix $(SRC_DIR), $(SRC_BASE))
OBJ = $(addprefix $(OBJ_DIR), $(SRC_BASE:.c=.o))
all:
$(MAKE) -j $(NAME)
$(NAME): $(OBJ)
#echo "\\n\033[32;1mARRAY FUNCTIONS COMPILED\033[0m \\n"
$(OBJ_DIR):
#mkdir -p $#
$(OBJ_DIR)%.o: $(SRC_DIR)%.c | $(OBJ_DIR)
#$(CC) $(CFLAGS) -c $< -o $# -I $(INC_DIR)
clean:
#rm -rf $(OBJ_DIR);
fclean: clean
#rm -rf $(NAME);
re: fclean all
.PHONY: all fclean clean re
The problem
Test program compilation:
gcc -fsanitize=undefined -fsanitize=address -fsanitize=leak arr/tests/tests.c libcore.a
There's something wrong with my setup. When I run make for the main Makefile once, the linker won't find the functions in the array library and gives undefined reference. However when I run Make the second time I can then compile my test program correctly. I just can't figure out what I'm doing wrong. My idea is that I create the .o files in the submodule Makefiles and the just basically compile all those .o files with the main Makefile into one .a file.
Thanks in advance for any help on this!

Answer 1

The immediate cause of the error you see is here, in the major makefile:
MEM_O = $(wildcard mem/obj/*.o)
This gives you a list of all object files that exist when the variable MEM_O is expanded, which happens before Make executes any rule. So on the first pass the variable is empty (because there are no object files), the sub-makes build the object files, and the major Make puts nothing into the library (because the variable is empty).
The highest-lever error is that you wrote all of these Makefiles without adequate testing. When you write code, it behooves you to start with something small and simple that works perfectly, then build up. (I really ought to have that hotkeyed by now.)
The mid-level error is that recursive Make is clumsy. It has its uses, but if you handle it carelessly you get errors like this. I suggest a top-level makefile that includes the lower makefiles (by means of the include directive), and lower-level makefiles that can function at either level.