STM32H743ZI Nucleo seems unable to transmit via FDCAN 2? - c

Question

I am currently trying to send messages via both of my FDCAN transmitters on my Nucleo. But I am only able to transmit via FDCAN1 (classic master) and not via FDCAN 2 (classic slave).
The configuration setup is the same, only FDCAN1 starts sending , while FDCAN 2 gets a buffer overflow after a short time and never sends anything. I am monitoring with CANoe, where I can only see the message send via FDCAN1.
I also know it is not a hardware issue, since I changed my cables and the board and the problem remained the same. My cables are also terminated correctly...
Is there anything obvious I am missing?
Here is my code, I used CubeMx for the first initialisation.
The fdcan.c File:
`
FDCAN_HandleTypeDef hfdcan1;
FDCAN_HandleTypeDef hfdcan2;
/* FDCAN1 init function */
void MX_FDCAN1_Init(void)
{
hfdcan1.Instance = FDCAN1;
hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
hfdcan1.Init.Mode = FDCAN_MODE_NORMAL;
hfdcan1.Init.AutoRetransmission = DISABLE;
hfdcan1.Init.TransmitPause = DISABLE;
hfdcan1.Init.NominalPrescaler = 5;
hfdcan1.Init.NominalSyncJumpWidth = 1;
hfdcan1.Init.NominalTimeSeg1 = 11;
hfdcan1.Init.NominalTimeSeg2 = 4;
hfdcan1.Init.DataPrescaler = 1;
hfdcan1.Init.DataSyncJumpWidth = 1;
hfdcan1.Init.DataTimeSeg1 = 1;
hfdcan1.Init.DataTimeSeg2 = 1;
hfdcan1.Init.MessageRAMOffset = 0;
hfdcan1.Init.StdFiltersNbr = 0;
hfdcan1.Init.ExtFiltersNbr = 0;
hfdcan1.Init.RxFifo0ElmtsNbr = 8;
hfdcan1.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
hfdcan1.Init.RxFifo1ElmtsNbr = 0;
hfdcan1.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
hfdcan1.Init.RxBuffersNbr = 0;
hfdcan1.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
hfdcan1.Init.TxEventsNbr = 0;
hfdcan1.Init.TxBuffersNbr = 0;
hfdcan1.Init.TxFifoQueueElmtsNbr = 8;
hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
hfdcan1.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
hfdcan1.msgRam.StandardFilterSA = 0;
hfdcan1.msgRam.ExtendedFilterSA = 0;
hfdcan1.msgRam.RxFIFO0SA = 0;
hfdcan1.msgRam.RxFIFO1SA = 0;
hfdcan1.msgRam.RxBufferSA = 0;
hfdcan1.msgRam.TxEventFIFOSA = 0;
hfdcan1.msgRam.TxBufferSA = 0;
hfdcan1.msgRam.TxFIFOQSA = 0;
hfdcan1.msgRam.TTMemorySA = 0;
hfdcan1.msgRam.EndAddress = 0;
hfdcan1.ErrorCode = 0;
if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK)
{
_Error_Handler(__FILE__, __LINE__);
}
}
/* FDCAN2 init function */
void MX_FDCAN2_Init(void)
{
hfdcan2.Instance = FDCAN2;
hfdcan2.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
hfdcan2.Init.Mode = FDCAN_MODE_NORMAL;
hfdcan2.Init.AutoRetransmission = DISABLE;
hfdcan2.Init.TransmitPause = DISABLE;
hfdcan2.Init.NominalPrescaler = 5;
hfdcan2.Init.NominalSyncJumpWidth = 1;
hfdcan2.Init.NominalTimeSeg1 = 11;
hfdcan2.Init.NominalTimeSeg2 = 4;
hfdcan2.Init.DataPrescaler = 1;
hfdcan2.Init.DataSyncJumpWidth = 1;
hfdcan2.Init.DataTimeSeg1 = 1;
hfdcan2.Init.DataTimeSeg2 = 1;
hfdcan2.Init.MessageRAMOffset = 0;
hfdcan2.Init.StdFiltersNbr = 0;
hfdcan2.Init.ExtFiltersNbr = 0;
hfdcan2.Init.RxFifo0ElmtsNbr = 8;
hfdcan2.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
hfdcan2.Init.RxFifo1ElmtsNbr = 0;
hfdcan2.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
hfdcan2.Init.RxBuffersNbr = 0;
hfdcan2.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
hfdcan2.Init.TxEventsNbr = 0;
hfdcan2.Init.TxBuffersNbr = 0;
hfdcan2.Init.TxFifoQueueElmtsNbr = 16;
hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
hfdcan2.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
hfdcan2.msgRam.StandardFilterSA = 0;
hfdcan2.msgRam.ExtendedFilterSA = 0;
hfdcan2.msgRam.RxFIFO0SA = 0;
hfdcan2.msgRam.RxFIFO1SA = 0;
hfdcan2.msgRam.RxBufferSA = 0;
hfdcan2.msgRam.TxEventFIFOSA = 0;
hfdcan2.msgRam.TxBufferSA = 0;
hfdcan2.msgRam.TxFIFOQSA = 0;
hfdcan2.msgRam.TTMemorySA = 0;
hfdcan2.msgRam.EndAddress = 0;
hfdcan2.ErrorCode = 0;
if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK)
{
_Error_Handler(__FILE__, __LINE__);
}
}`
and the relevant part of the main.c:
uint8_t TxData[8] = {0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA};
uint8_t TxData2[8] = {0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAB};
uint32_t msgerror=0;
uint32_t msgerror1=0;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_NVIC_Init(void);
/**
* #brief The application entry point.
*
* #retval None
*/
int main(void)
{
/* MCU Configuration----------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* Configure the system clock */
SystemClock_Config();
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_FDCAN1_Init();
MX_FDCAN2_Init();
/* Initialize interrupts */
MX_NVIC_Init();
/* USER CODE BEGIN 2 */
TxHeader.Identifier = 0x120;
TxHeader.IdType = FDCAN_STANDARD_ID;
TxHeader.TxFrameType = FDCAN_DATA_FRAME;
TxHeader.DataLength = FDCAN_DLC_BYTES_8;
TxHeader.ErrorStateIndicator = FDCAN_ESI_ACTIVE;
TxHeader.BitRateSwitch = FDCAN_BRS_OFF;
TxHeader.FDFormat = FDCAN_CLASSIC_CAN;
TxHeader.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
TxHeader.MessageMarker = 0;
HAL_FDCAN_Start(&hfdcan1);
HAL_FDCAN_Start(&hfdcan2);
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan2, &TxHeader, TxData) != HAL_OK)
{
/* Transmission request Error */
msgerror++;
}
if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan1, &TxHeader, TxData2) != HAL_OK)
{
/* Transmission request Error */
msgerror1++;
}
HAL_Delay(100);
}

Answer 1

After finding the right data sheet, I found the solution. In the configuration for FDCAN2 I need to implement an offset:
hfdcan2.Init.MessageRAMOffset = sizeof(hfdcan1);
After implementing this change transmit and receive are working without problem.