Paralleling two loops Vivado HLS - c

Question

For sake of exemplifying, I'm having a loop in which contents of an array are read and written in once cycle per iteration.
int my_array[10] = ...;
for(i=0; i<10; i++) {
if(i<5) {
my_array[i*2] = func_b(my_array[i*2]);//func_b takes double the time of func_a, but it also runs on 1/2 of the time.
}
func_a(myarray[i]);//func_a is executed quickly
}
same element is accessed for read/write operation only on i=0, with proper delay and synchronization algorithm should allow for parallelization. I'm struggling to find proper HLS pragma's to force them to run in parallel like so
//#pragma HLS to delay by two cycles
for(i=0; i<10; i++) {
func_a(my_array[i]);
}
//#pragma HLS to allow to run each iteration in parallel with the first loop, if possible in two cycles
for(i=0; i<5; i++) {
my_array[i*2] = func_b(my_array[i]);//func_b might be split into two halves for each to fit into one cycle.
}
ideally first loop should finish two cycles after the second one has completed, and in that way read correct value of the last my_array element. I might have a misconception, but I would hope that dividing work in such way (across two cycles), should increase clock speed?
The rest of the generated Verilog code is fine although it is cryptic enough that I would rather stick with C than to try modify what HDL was generated. Any suggestions on how to parallelize it or if it's doable?

Answer 1

As a first note, the clock speed is not necessary affected by whether the loops run in parallel or not. What might improve is the latency of the algorithm, i.e. the total amount of cycles required to run it.
There are elements processed by both functions in the same cycle. So unless you rewrite the functions (perhaps merging them together), you have a data dependency which you cannot break (or your algorithm will simply fail). Check the indexes you are accessing and check if the order of the operations remains the same:
for(int i = 0; i < 10; i++) {
if (i < 5) {
// Accessing indexes: 0, 2, 4, 6, 8
my_array[i * 2] = func_b(my_array[i * 2]);
}
// Accessing indexes: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
func_a(myarray[i]);
}
Your proposed solution, the second code snippet, won't work because is not doing the same thing in the same order as in the first code snippet (that must be valid if you just run the C/C++ code, which must have the same outcome).
However, one thing you can try is to put a DATAFLOW pragma like so:
#pragma HLS DATAFLOW
for(i = 0; i < 5; i++) {
my_array[i * 2] = func_b(my_array[i * 2]);
}
for(i = 0; i < 10; i++) {
func_a(my_array[i]);
}
But I'm not sure whether HLS will correctly handle the my_array buffer, since it would be shared by both the loops/processes.
One final idea I have to fully allow DATAFLOW, i.e. by creating a producer-consumer algorithm, is is to split the my_array into two different buffers, one for each part of the algorithm (i even or odd), like so:
int my_array_evens[5] = ...;
int my_array_odds[5] = ...;
#pragma HLS DATAFLOW
for(i = 0; i < 5; i++) {
my_array_evens[i * 2] = func_b(my_array_evens[i * 2]); // Dataflow producer
}
for(i = 0; i < 10; i++) {
if (i % 2 == 0) {
func_a(my_array_evens[i]); // Dataflow consumer
} else {
func_a(my_array_odds[i]);
}
}
NOTE: If the functions are relatively small, add the PIPELINE pragmas in the loops to 'speed' things up.