Intel Ultra Path Interconnect (UPI) Bandwidth - benchmarking

In various sources and also official ones from Intel, I get the number of max. 10.4 GT/s for the latest UPI interconnect, which connects for example Intel Xeon processors in the Skylake architecture. Now for the older Quick Path interconnects, I could find a lot of sources stating that with 2 bytes per transition and 6.4 GT/s, we get a bandwidth of 12.8 GB/s per link in one direction.
Now back to UPI: Is it still 2 bytes per transition, which means 20.8 GB/s per link per direction? I can not find any information about this on the internet except a German Wikipedia page here that is however annotated with the note that numbers might not be up to date.


why does libvlcsharp winform mosaic with 16 channels use a lot of CPU

Setup as follows: A winform app, visual studio 2019, create 16 videoview/mediaplayer instances, each streaming a 960 X 540 30fps camera stream from a multicasting camera.
CPU i7 2.67GHz, GPU NV GTX 1650.
The GPU is loading up to 44% decode and about the same for 3d. The application uses an amazing 75 to 90% of the CPU. It jumps around a lot from one test run to another. The GPU is very stable.
Here's some other information that is interesting. If I run a single copy of this application with one video stream the CPU use is about 5/10% of CPU. If I run 16 instances of the application each instance uses about 4/10 to 8/10% of the CPU. Once I have 16 videos streaming the GPU is same as above (44%) the CPU is nominal.
The increase of CPU usage within one instance while adding cameras is not linear it takes a big jump after 9.
From the diagnostic image below you can see the usage is isolated almost entirely in the Native code. Other diagrams show about 2/3 in the kernel and 1/3 in system IO. The CPU is spread across all the cores pretty evenly.
code on gist
I have tried a lot of variations on this but no matter what I try the CPU usage is pretty constant once I get up to 16 channels. I have tried running each instance within its own thread. That made no difference. I really would like to understand this and find a way to reduce CPU usage. I have an application that uses this tech and a customer that requires even more channels than 16.
It may be a bug, which would need to be reported on with a minimal C/C++ reproduction sample for the VLC developers.
Do note that comparing 16 VLC app instances (16 processes) playing and 1 LibVLC-based app instance playing 16 streams (1 process) is not exactly a fair comparison.
The perf usage should still be linear and not exponential, though, so maybe there is a bug.

Is the shared L2 cache in multicore processors multiported? [duplicate]

The Intel core i7 has per-core L1 and L2 caches, and a large shared L3 cache. I need to know what kind of an interconnect connects the multiple L2s to the single L3. I am a student, and need to write a rough behavioral model of the cache subsystem.
Is it a crossbar? A single bus? a ring? The references I came across mention structural details of the caches, but none of them mention what kind of on-chip interconnect exists.
Modern i7's use a ring. From Tom's Hardware:
Earlier this year, I had the chance to talk to Sailesh Kottapalli, a
senior principle engineer at Intel, who explained that he’d seen
sustained bandwidth close to 300 GB/s from the Xeon 7500-series’ LLC,
enabled by the ring bus. Additionally, Intel confirmed at IDF that
every one of its products currently in development employs the ring
Your model will be very rough, but you may be able to glean more information from public information on i7 performance counters pertaining to the L3.

CPU Temperature for Linux OS / Intel 64 bit Architecture

I have come across several post to read CPU temperature ad fan speed[ 1, 2], but could not find any post for the 64-bit i7 Intel architecture (quad core) using Linux OS. Can any one point to any article and/or source code that can read individual core temperature and possibly fan speed. I have been going through the performance counters in the intel architecture, I find Chapter 14 to describe the Thermal Monitors for the thermal status informations. Any sample C code to read these information/ registers will be of great help.
One common way is to read /sys/class/thermal/thermal_zone0/temp.
You can take a look at the source code of i3status which is written in C and is able to display the CPU temperature: print_cpu_temperature.c

hardware specification recommendation for Solr

I am looking for a hardware specification for Solr search engine. Our requirement is to build a search system which indexes about 5 to 9 million documents. The peak query per second is around 50 people. I checked the Dell website and think that maybe a Rack Server is good. So I made a sample product. How do you think about my choice? Do you have any experience on hardware specification for Solr system?
PowerEdge R815
R815 Chassis for Up to Six 2.5 Inch Hard Drives
2x AMD Opteron 6276, 2.3GHz, 16C, Turbo CORE, 16M L2/16M L3, 1600Mhz Max Mem
Additional Processor
No 3rd/4th Processors edit
Operating System
No Operating System edit
OS Media kits
None edit
OS and SW Client Access Licenses
None edit
64GB Memory (8x8GB), 1333MHz, Dual Ranked LV RDIMMs for 2 Processors edit
Hard Drive Configuration
No RAID for PERC H200 Controllers (Non-Mixed Drives) edit
Internal Controller
PERC H200 Integrated RAID Controller edit
Hard Drives
1TB 7.2K RPM SATA 2.5in Hot-plug Hard Drive edit
Data Protection Offers
None edit
Embedded Management
iDRAC6 Express edit
System Documentation
Electronic System Documentation and OpenManage DVD Kit edit
Network Adapter
Intel® Gigabit ET NIC, Dual Port, Copper, PCIe-4 edit
Network Adapter
Intel® Gigabit ET NIC, Dual Port, Copper, PCIe-4 edit
Host Bus Adapter/Converged Network Adapter
None edit
Power Supply
1100 Watt Redundant Power Supply edit
Power Cords
NEMA 5-15P to C13 Wall Plug, 125 Volt, 15 AMP, 10 Feet (3m), Power Cord edit
BIOS Setting
Performance BIOS Setting edit
No Rack Rail or Cable Management Arm edit
PowerEdge R815 Bezel edit
Internal Optical Drive
DVD ROM, SATA, Internal
I agree with Marko (not myself, other Marko:).
You should use e.g. jMeter to test capabilities (the most important metric of course being: how response time changes with number of parallel users) of your configuration and then make educated decision based on those results.
Be prepared to play with JVM memory settings in order to see how if affects overall performance.
I'd also test various application servers to see how that decision affects response time.
PS If you choose to use jMeter you should definitely make use of jMeter Plugins, which will allow you (Composite graph) to show number of parallel users and response time with server's processor, memory and network loads on the same graph.
This is a hugely open ended question, with far too many details unknown - the straw-man hardware spec is really not very useful (TL;DR)
There is only one sensible way to go about tackling this problem and that is empirically.

Raspberry Pi cluster, neuron networks and brain simulation

Since the RBPI (Raspberry Pi) has very low power consumption and very low production price, it means one could build a very big cluster with those. I'm not sure, but a cluster of 100000 RBPI would take little power and little room.
Now I think it might not be as powerful as existing supercomputers in terms of FLOPS or others sorts of computing measurements, but could it allow better neuronal network simulation ?
I'm not sure if saying "1 CPU = 1 neuron" is a reasonable statement, but it seems valid enough.
So does it mean such a cluster would more efficient for neuronal network simulation, since it's far more parallel than other classical clusters ?
Using Raspberry Pi itself doesn't solve the whole problem of building a massively parallel supercomputer: how to connect all your compute cores together efficiently is a really big problem, which is why supercomputers are specially designed, not just made of commodity parts. That said, research units are really beginning to look at ARM cores as a power-efficient way to bring compute power to bear on exactly this problem: for example, this project that aims to simulate the human brain with a million ARM cores. "Million-core ARM machine aims to simulate brain" "A million ARM cores to host brain simulator"
It's very specialist, bespoke hardware, but conceptually, it's not far from the network of Raspberry Pis you suggest. Don't forget that ARM cores have all the features that JohnB mentioned the Xeon has (Advanced SIMD instead of SSE, can do 64-bit calculations, overlap instructions, etc.), but sit at a very different MIPS-per-Watt sweet-spot: and you have different options for what features are included (if you don't want floating-point, just buy a chip without floating-point), so I can see why it's an appealing option, especially when you consider that power use is the biggest ongoing cost for a supercomputer.
Seems unlikely to be a good/cheap system to me.
Consider a modern xeon cpu. It has 8 cores running at 5 times the clock speed, so just on that basis can do 40 times as much work. Plus it has SSE which seems suited for this application and will let it calculate 4 things in parallel. So we're up to maybe 160 times as much work. Then it has multithreading, can do 64 bit calculations, overlap instructions etc. I would guess it would be at least 200 times faster for this kind of work.
Then finally, the results of at least 200 local "neurons" would be in local memory but on the raspberry pi network you'd have to communicate between 200 of them... Which would be very much slower.
I think the raspberry pi is great and certainly plan to get at least one :P But you're not going to build a cheap and fast network of them that will compete with a network of "real" computers :P
Anyway, the fastest hardware for this kind of thing is likely to be a graphics card GPU as it's designed to run many copies of a small program in parallel. Or just program an fpga with a few hundred copies of a "hardware" neuron.
GPU and FPU do this kind of think much better then a CPU, the Nvidia GPU's that support CDUA programming has in effect 100's of separate processing units. Or at least it can use the evolution of the pixel pipe lines (where the card could render mutiple pixels in parallel) to produce huge incresses in speed. CPU allows a few cores that can carry out reletivly complex steps. GPU allows 100's of threads that can carry out simply steps.
So for tasks where you haves simple threads things like a single GPU will out preform a cluster of beefy CPU. (or a stack of Raspberry pi's)
However for creating a cluster running some thing like "condor" Which cand be used for things like Disease out break modelling, where you are running the same mathematical model millions of times with varible starting points. (size of out break, wind direction, how infectious the disease is etc.. ) so thing like the Pi would be ideal. as you are general looking for a full blown CPU that can run standard code.
some well known usage of this aproach are "Seti" or "folding at home" (search for aliens and cancer research)
A lot of universities have a cluster such as this so I can see some of them trying the approach of mutipl Raspberry Pi's
But for simulating nurons in a brain you require very low latency between the nodes they are special OS's and applications that make mutiply systems act as one. You also need special networks to link it togather to give latency between nodes in terms of < 1 millsecond.
the Raspberry just will not manage this in any way.
So yes I think people will make clusters out of them and I think they will be very pleased. But I think more university's and small organisations. They arn't going to compete with the top supercomputers.
Saying that we are going to get a few and test them against our current nodes in our cluster to see how they compare with a desktop that has a duel core 3.2ghz CPU and cost £650! I reckon for that we could get 25 Raspberries and they will use much less power, so will be interesting to compare. This will be for disease outbreak modelling.
I am undertaking a large amount of neural network research in the area of chaotic time series prediction (with echo state networks).
Although I see using the raspberry PI's in this way will offer little to no benefit over say a strong cpu or a GPU, I have been using a raspberry PI to manage the distribution of simulation jobs to multiple machines. The processing power benefit of a large core will nail that possible on the raspberry PI, not just that but running multiple PI's in this configuration will generate large overheads of waiting for them to sync, data transfer etc.
Due to the low cost and robustness of the PI, i have it hosting the source of the network data, as well as mediating the jobs to the Agent machines. It can also hard reset and restart a machine if a simulation fails taking the machine down with it allowing for optimal uptime.
Neural networks are expensive to train, but very cheap to run. While I would not recommend using these (even clustered) to iterate over a learning set for endless epochs, once you have the weights, you can transfer the learning effort into them.
Used in this way, one raspberry pi should be useful for much more than a single neuron. Given the ratio of memory to cpu, it will likely be memory bound in its scale. Assuming about 300 megs of free memory to work with (which will vary according to OS/drivers/etc.) and assuming you are working with 8 byte double precision weights, you will have an upper limit on the order of 5000 "neurons" (before becoming storage bound), although so many other factors can change this and it is like asking: "How long is a piece of string?"
Some engineers at Southampton University built a Raspberry Pi supercomputer:
I have ported a spiking network (see for details) to the Raspberry Pi and it runs about 24 times slower than on my old Pentium-M notebook from 2005 with SSE and prefetch optimizations.
It all depends on the type of computing you want to do. If you are doing very numerically intensive algorithms with not much memory movement between the processor caches and RAM memory then a GPU solution is indicated. The middle ground is an Intel PC chip using the SIMD assembly language instructions - you can still easily end up being limited by rate you can transfer data to and from RAM. For nearly the same cost you can get 50 ARM boards with say 4 cores per board and 2Gb RAM per board. That's 200 cores and 100 Gb of RAM. The amount of data that can be shuffled between the CPUs and RAM per second is very high. It could be a good option for neural nets that use large weight vectors. Also the latest ARM GPU's and the new nVidea ARM based chip (used in the slate tablet) have GPU compute as well.