Makefile adding libraries from others directory - c

Question

I want to create a Makefile for a big C project, with files divided into directories. What I wrote is
CC = gcc
AR = ar
ARFLAGS = rvs
CFLAGS += -std=c99 -Wall -g
INCDIR = ./include
LIBDIR = ./lib
SRCDIR = ./src
BINDIR = ./bin
OBJDIR = ./obj
TESTDIR = ./testfile
INCLUDES = -I.
LDFLAGS = -L/lib
LIBFUNCTIONS = /-lfunctions
LIBTH = -lpthread
LIBUTILITY = /-lutility
OPTFLAGS = -O3 -DNDEBUG
TARGETS = $(BINDIR)/test_functions \
.PHONY: all clean cleanall test1 test2
.SUFFIXES: .c .h
$(BINDIR)/%: $(SRCDIR)/%.c
$(CC) $(CFLAGS) $(INCLUDES) $(OPTFLAGS) -o $# $<
$(OBJDIR)/%.o: $(SRCDIR)/%.c
$(CC) $(CFLAGS) $(INCLUDES) $(OPTFLAGS) -c -o $# $<
all : $(TARGETS)
$(BINDIR)/test_functions: $(OBJDIR)/test_functions.o $(LIBDIR)/libutility.a $(LIBDIR)/libfunctions.a
$(CC) $(CFLAGS) $(INCLUDES) $(FLAGS) $(LDFLAGS) -o $# $< $(LIBUTILITY) $(LIBFUNCTIONS)
$(OBJDIR)/test_functions.o: $(SRCDIR)/test_functions.c $(INCDIR)/utility.h $(LIBDIR)/libutility.a $(INCDIR)/functions.h $(LIBDIR)/libfunctions.a
$(CC) $(CCFLAGS) $(INCLUDES) $(FLAGS) -c -o $# $<
$(LIBDIR)/libutility.a: $(OBJDIR)/utility.o $(INCDIR)/utility.h
$(AR) $(ARFLAGS) $# $<
$(LIBDIR)/libfunctions.a: $(OBJDIR)/functions.o $(INCDIR)/functions.h $(INCDIR)/utility.h
$(AR) $(ARFLAGS) $# $<
clean :
rm -f $(TARGETS)
cleanall : clean
\rm -f *.o *~
the problem is that when I try to compile the project using the makefile, the result is
gcc -std=c99 -Wall -g -I. -L/lib -o bin/test_functions obj/test_functions.o -lutility -lfunctions
/usr/bin/ld: impossibile trovare -lutility
/usr/bin/ld: impossibile trovare -lfunctions
collect2: error: ld returned 1 exit status
make: *** [Makefile:54: bin/test_functions] Error 1
it seems that the compiler cannot find the libraries. what can I do to make it work properly?

Answer 1

You have this:
LIBDIR = ./lib
then in your link line you have this:
LDFLAGS = -L/lib
Notice the difference?
Why don't you just say:
LDFLAGS = -L$(LIBDIR)
to avoid repeating yourself (and getting it wrong)?