I have developed a custom STM32L475 board with one GPIO pin wired up for synchronization along some other circuitry for the synchronization, unfortunately we decided to route the generated sinus signal from module to module.
This is not optimal so I want to optimize so it is not the sinus signal which is routed from master module to slave modules, but to just transfer a digital trigger to restart the generation of a full sine wave.
To do this I need to be able to setup the MCU's to use the one GPIO pin on each MCU as both output and trigger for a timer.
To do this without an update of the HW I need to be able to combine:
1. Using the 3 pins (one from each MCU) as open drain outputs as an AND gate, this works.
2. I know the GPIO pin can be used as external trigger, triggering on a negative edge.
The question is, is it possible to trig a timer of an output pin using only one GPIO pin, to make the MCU which finalizes its sine generation first trigger itself and the other MCU's, and if so, how?
Please note, it must use the level of the output pin itself, eventhough it is an outputpin.
I am a HW developer, learning to do firmware for our HW, so I am kind of new to software development, so I am using HAL, please be nice
STM32L475 allows to configure a GPIO in different modes that must be (exclusively) selected through the corresponding GPIOx_MODER register:1
(Digital) Input mode
General purpose output mode
Alternate function mode
Analog mode
The alternate function applied in Alternate function mode must also be selected exclusively, through the corresponding GPIOx_AFRL or GPIOx_AFRH register, resp.2
The trigger for an interrupt or timer is an alternate function, and the output of a (analogue or digital) signal is a (different) alternate function, too.
Therefore, I think there is no solution to the given problem based on peripheral configuration.
1
Reference Manual, Rev 7:
See
Section 8.5.1 for GPIO mode selection
Figures 23/24 in Section 8.4 for explanation
2
ibid.:
See
Section 8.5.9 for GPIO alternate function selection
Section 8.4.2 for explanation
Related
I am currently playing with L152C Discovery board and trying to make simple clock that would use the RTC build into the STM32 and onboard Glass LCD with LCD HAL library configured via CubeMX.
But I am currently facing a problem I can't get my head around:
CubeMX does not have an option to enable segment mux in the LCD_CR register. I would like to enable it, because it would make the segment mapping easier.
So I thought, fine, I will make an direct register manipulation, enabling the mux (bit 7 in the LCD_CR).
I used the command LCD->CR |= LCD_CR_MUX_SEG; But even after executing the command, the MUX_SEG bit is still zero. (I checked in the debug session with command stepping and SFRs memory map)
Is there something that I am doing wrong? Or is there another way to change init parameters that CubeMX configured but does not have graphical implementation of this settings option?
The application is using FreeRTOS and I executed LCD->CR |= LCD_CR_MUX_SEG; after HAL_LCD_Init(&hlcd); so I sappose that the LCD peripheral clock is running (and segments are updating).
I recorded a short video showing this problem:
https://youtu.be/0X6Zu5EPudU
To be honest, I am not skilled at direct register manipulation, so I am probably doing something wrong.
Any help would be appreciated!😇
As #KIIV said:
RM0038 Liquid crystal display controller (LCD) Note: The VSEL, MUX_SEG, BIAS and DUTY bits are write protected when the LCD is enabled (ENS bit in LCD_SR to 1).
The LCD must be disabled when making changes to the above registers.
My MCU based control system must check 18 switch contact status fastly. I will use STM32F7 MCU and it has maximum 16 int. handler. So I have been decided to use IO expendar IC and divided groups. Now I have 12 IO external interrupt and 2 more interrupt comes from IO expander. In addition FreeRTOS will has ethernet, uart and canbus tasks for communications. Interrupts are very critical for system. There is milisecond difference between them and I have to detect all pins status correctly. I need and expert advice for this situation.
My questions are :
Is this a proper way ? Using 14 external interrupt onFreeRTOS that handles multiple communication task
Is there any better way for it ?
Using an IO expander seems like the wrong approach to your problem (additional complexity and cost). You don't have to assign a dedicated ISR to each pin. Just read the GPIOx_IDR register after any GPIO interrupt, then check the relevant bits STM32 Datasheet
I'm working with the STM32L432KC and am relatively new to the embedded world. What happens if I write to a configuration register, wait some time, and then write to the register again with the same configuration. Does this have any effects?
For reference, I am using the STM32L432KC microcontroller. The register in question is the Reset and Clock Control (RCC), AHB2 Peripheral Clock Enable Register (RCC_AHB2ENR). I have a function that enables the clock for a GPIO port, by OR'ing in a bit. I am wondering if calling the function while the pin is active will have any effects.
There is no generic answer for all registers on all devices. The only correct course is to consult the data sheet or reference manual for the part concerned.
In the specific case of STM32L432 RCC_AHB2ENR all used bits are specified as "set and cleared by software" with no specific hardware action on read/write. This is true I believe for the RCC_AHB2ENR on all STM32. Note however that the unused bits are reserved and should not be set to any value other then the reset value - also defined in the reference manual and in this case all zero.
Some registers change value under hardware control, so re-writing a previously written value may have an effect. A simple example on your part is TIM1_CNT where if TIM1 is running the counter will have changed and rewriting it will effect its period and any capture/compare events or event output or PWM it may be used for.
I have an STM32L051 and want to drive an external DAC (SPI).
For that I would like to use the feature, mentioned in the manual, to output the internal reference voltage to the PB1 pin of the STM32.
I use the STM32Cube HAL as a basis. However the examples of using the VREF are limited to internal use for ADCs and comparators.
If I understand correctly, I can use the CFGR3 register to both enable the VREF as well as connect it to the PB1. Using the Cube drivers, I can use the HAL_SYSCFG_VREFINT_OutputSelect(SYSCFG_VREFINT_OUT_PB1) function, but to enable it, I should use either HAL_ADCEx_EnableVREFINT() or HAL_COMPEx_EnableVREFINT(). The manual information on SEL_VREF_OUT indicates that ENBUF_VREFINT_ADC must be set.
Furthermore no mention is made about the configuration of the pin itself. Should I simply declare it as a DAC Pin? An ADC Pin?
Answer
It is as simple as
if ( HALD_ADCEx_EnableVREFINT() != HAL_OK )
{
Error_Handling();
}
HAL_SYSCFG_VREFINT_OutputSelect(SYSCFG_VREFINT_OUT_PB1);
And I can see the 1.22 V on the PB1 output.
It does not require further pin (GPIO) configuration.
Complications and justification for the question (can be skipped)
I had some issues with the board from out electronic dept. and thus switched to the STM32L053-Discovery board. The above solution did not work, and I kept seeing 0V on PB1 (or PB0).
I assumed that was due to some configuration missing. However, after some further tests, I actually found that on that Discovery board, both PB1 and PB0 are reserved for a sensor. By closing the SB23 bridge, I could use PB1 back to the GPIO, and thus see the reference voltage on the pin.
I've been trying to port some of my AVR code to drive a simple SPI LCD to ARM as a learning exercise (I'm very new to ARM in general). For this I just need to use SPI in master mode.
I looked in the datasheet for my device (STM32F103C8) and found that the SPI1 pins I need, SCK and MOSI are mapped as alternative functions of PA5 and PA7, respectively, along with other peripherals (pg.29). My understanding is that in order to use the SPI function on these pins, I need to make sure that anything else mapped to the same pin is disabled. When looking at the defaults for the peripheral clock control register, however, it looks like the other features are already disabled.
I looked at the SPI section in the reference manual, including section 25.3.3 - Configuring the SPI in master mode. First I enabled the SPI1 master clock in APB2ENR and followed the steps in this section to configure SPI1 to my needs. I also changed the settings for PA5/7 to set their mode to "Alternate Function Output push-pull" (9.1.4). Finally, I enabled SPI1 by setting CR1_SPE.
From my reading, I had thought that by loading a value into the SPI1 data register after configuring SPI as above, the data would be shifted out. However, after writing the data, the TXE flag in the SPI status register never becomes set, indicating that the data I wrote into it is just sat there.
At this point, I'm assuming that there is something else I've failed to configure correctly. For example, I'm not 100% sure about what to do with the PA5/7 pins. I've tried to understand what I can from the datasheets, but I'm not getting anywhere. Is there anything else that needs to be done before it'll work?
I'm almost certain that you did not set SSM and SSI bits in SPIx->CR1 register. SPI in these chips is pretty simple, for the polled transfers you need to set SSM, SSI, SPE, MSTR, correct format (LSBFIRST, CPOL, CPHA) and proper baudrate (BR) in SPIx->CR1 and you're good to go.