I'm trying to write my own driver for USART_TX on an STM32L476RG Nucleo Board.
Here the datasheet and the reference manual.
I'm using Keil uVision 5 and I set in the Manage dialog:
CMSIS > Core
Device > Startup
Xtal=16MHz
I want to create a single character transmitter. According to the manual instructions in Sec. 40 p 1332 I wrote this code:
// APB1 connects USART2
// The USART2 EN bit on APB1ENR1 is the 17th
// See alternate functions pins and label for USART2_TX! PA2 is the pin and AF7 (AFRL register) is the function to be set
#include "stm32l4xx.h" // Device header
#define MASK(x) ((uint32_t) (1<<(x)));
void USART2_Init(void);
void USART2_Wr(int ch);
void delayMs(int delay);
int main(void){
USART2_Init();
while(1){
USART2_Wr('A');
delayMs(100);
}
}
void USART2_Init(void){
RCC->APB1ENR1 |= MASK(17); // Enable USART2 on APB1
// we know that the pin that permits the USART2_TX is the PA2, so...
RCC->AHB2ENR |= MASK(0); // enable GPIOA
// Now, in GPIOA 2 put the AF7, which can be set by placing AF7=0111 in AFSEL2 (pin2 selected)
// AFR[0] refers to GPIOA_AFRL register
// Remember: each pin asks for 4 bits to define the alternate functions. see pg. 87
// of the datasheet
GPIOA->AFR[0] |= 0x700;
GPIOA->MODER &= ~MASK(4);// now ... we set the PA2 directly with moder as alternate function "10"
// USART Features -----------
//USART2->CR1 |=MASK(15); //OVER8=1
USART2->BRR = 0x683; //USARTDIV=16Mhz/9600?
//USART2->BRR = 0x1A1; //This one works!!!
USART2->CR1 |=MASK(0); //UE
USART2->CR1 |=MASK(3); //TE
}
void USART2_Wr(int ch){
//wait when TX buffer is empty
while(!(USART2->ISR & 0x80)) {} //when data is transfered in the register the ISR goes 0x80.
//then we lock the procedure in a while loop until it happens
USART2->TDR =(ch & 0xFF);
}
void delayMs(int delay){
int i;
for (; delay>0; delay--){
for (i=0; i<3195; i++);
}
}
Now, the problem:
The system works, but not properly. I mean: if I use RealTerm at 9600 baud-rate, as configured by 0x683 in USART_BRR reg, it shows me wrong char but if I set 2400 as baud rate on real term it works!
To extract the 0x683 in USART_BRR reg i referred to Sec. 40.5.4 USART baud rate generation and it says that if OVER8=0 the USARTDIV=BRR. In my case, USARTDIV=16MHz/9600=1667d=683h.
I think that the problem lies in this code row:
USART2->BRR = 0x683; //USARTDIV=16Mhz/9600?
because if I replace it as
USART2->BRR = 0x1A1; //USARTDIV=16Mhz/9600?
THe system works at 9600 baud rate.
What's wrong in my code or in the USARTDIV computation understanding?
Thank you in advance for your support.
Sincerely,
GM
The default clock source for the USART is PCLK1 (figure 15) PCLK1 is SYSCLK / AHB_PRESC / AHB1_PRESC. If 0x1A1 results in a baud rate of 9600, that suggests PCLK1 = 4MHz.
4MHz happens to be the default frequency of your processor (and PCLK1) at start-up when running from the internal MSI RC oscillator. So the most likely explanation is that you have not configured the clock tree, and are not running from the 16MHz HSE as you believe.
Either configure your clock tree to use the 16MHz source, or perform your calculations on the MSI frequency. The MSI precision is just about good enough over normal temperature range to maintain a sufficiently accurate baud rate, but it is not ideal.
Related
I have this problem when trying to read the ADC value (using adc1_in6) on the nucleo-l476rg micro controlle: I get in an infinite loop when checking if the EOC bit of the status register (ISR) "adc_read function".
Here's the adc.c file content:
#include "stm32l476xx.h"
#include "adc.h"
#define ADC1_SEQL1 0X00
void pa1_adc1_init(void)
{
/**************configure adc gpio pin ******************/
//enable clock access to GPIOA
RCC->AHB2ENR |= (1U<<0);
//set the mode of pa1 to analog mode
GPIOA->MODER |=(1U<<2);
GPIOA->MODER |=(1U<<3);
/****************configure adc periph ******************/
// enable clock access to adc module
RCC->AHB2ENR |=(1U<<13);
/*******configure adc parameters****************/
//conversion sequence start
ADC1->SQR1 |=(1U<<7);
ADC1->SQR1 |=(1U<<8);
//conversion sequence length
ADC1->SQR1 &= 0xFFFFFFF0UL;
//Enable adc module
// Check voltage regulator status
ADC1->CR &= 0x00000000;
ADC1->CR |= ADC_CR_ADVREGEN;
while (!(ADC1->CR & ADC_CR_ADVREGEN)) {
// Wait for voltage regulator startup time to pass
}
// Set ADVREGEN bit to 1
ADC1->CR |= ADC_CR_ADVREGEN;
// Wait for voltage regulator startup time to pass
// Set ADEN bit to 1
ADC1->CR |= ADC_CR_ADEN;
}
void start_conversion(void)
{
/*start adc conversion */
ADC1->CR |=ADC_CR_ADSTART;
}
uint32_t adc_read(void)
{
// wait for conversion to be complete
while (!(ADC1->ISR & ADC_ISR_EOC)){}
//read converted result from ADC1 data register
return (ADC1->DR);
}
I reviewed the reference manual to check if there are any specific requirements about the ISR register but it doesn't show anything special to do.
You need to have delay (or readback as access is strongly ordered) when enable the clock as the next register access is very likely to fail.
ADC has more than one clock domain and enabling digital part is not enough
You should calibrate the ADC before use.
Right Now I am working with the STM32F103C8 blue pill board, I am working with UART protocol here I am able to send data to putty it's working but send data from putty to microcontroller (unable to receive data from the putty). what is the problem I can't understand everything is okay but I can't receive data?
Code:
#include "stm32f10x.h" // Device header
volatile char data;
int main(void){
//configure HSI SYSTEM clock .
RCC->CR = RCC_CR_HSION;
RCC->CFGR = RCC_CFGR_SW_HSI;
//Enable Alternate function clock, PORTA and USART1.
RCC->APB2ENR = RCC_APB2ENR_AFIOEN|RCC_APB2ENR_USART1EN|RCC_APB2ENR_IOPAEN;
//Alternate function mode PA9
GPIOA->CRH = GPIO_CRH_MODE9_1|GPIO_CRH_CNF9_1;
//ALternate function mode PA10.
GPIOA->CRH |= GPIO_CRH_MODE10_1|GPIO_CRH_CNF10_1;
//USART1 Enable.
USART1->CR1 = USART_CR1_UE;
//8-bit word length.
USART1->CR1 |= ~(USART_CR1_M);
//baudrate 8MHz,9600 baudrate.
USART1->BRR = 0x341;
//Enable TE,RE bits
USART1->CR1 |= USART_CR1_RE|USART_CR1_TE;
while(1){
//wait for receive data
while((USART1->SR &USART_SR_RXNE )==0){}
data = USART1->DR;
while((USART1->SR & USART_SR_TXE)== 0){}
USART1->DR = data;
while((USART1->SR &USART_SR_TC) == 0){}
}
this code receives data from the PC and sends data to the PC.
I got the solution for the above problem.
don't make GPIO pins as alternate function mode when you receiving data.
//ALternate function mode PA10.
GPIOA->CRH |= GPIO_CRH_MODE10_1|GPIO_CRH_CNF10_1;
here RX pin as output push-pull mode in alternate function --- it is wrong.
make this pin as input floating mode or input push-pull/pull-down mode -- it is correct if you receiving data from the PC.(according to user manual).
3.dont use the HSI clock for this, if you use the HSI clock on this board you will get the wrong data.HSI clock, not a good idea to use.
Make sure to enable the HSE clock as a system clock you will get proper output when you receive data from the PC.
I'm attempting to use the STM32L011K4's DMA controller to communicate with slave devices over I2C. Currently, I have no slave devices and am just trying to get the microcontroller to send the start condition out onto the I2C bus, but that is not happening.
When I run this code in debugging mode through the STM32CubeIDE, I notice that the start bit is set, but it never clears even though the reference manual says it should be cleared by hardware once the start condition occurs (page 656 for I2C_CR2).
Monitoring the SDA and SCL lines on my oscilloscope also show that they are a logical 1. Note: I'm using the NUCLEO-L011K4 on a breadboard, so the IO pins are tied to Vref through 1k resistors. All configuration registers appear to contain the desired value when the code is stuck sending the start condition, so I don't believe they are getting clobbered by a random line of code.
I'm not sure what's preventing the start condition from being sent, so any help would be greatly appreciated.
STM32L011K4 Datasheet:
https://www.st.com/content/ccc/resource/technical/document/datasheet/42/c0/ab/e5/71/7a/47/0b/DM00206508.pdf/files/DM00206508.pdf/jcr:content/translations/en.DM00206508.pdf
STM32L011K4 Reference Manual: https://www.st.com/resource/en/reference_manual/dm00108282-ultralowpower-stm32l0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
Initialization code:
void Init_I2C1_DMA() {
/* Basic I2C Initialization for 100 kHz I2C, 24 MHz SYSCLK, /1 APB1 scaler */
RCC->APB1ENR |= RCC_APB1ENR_I2C1EN; // Enable peripheral clock for I2C1
I2C1->CR1 &= ~(I2C_CR1_PE); // Disable I2C1
I2C1->CR1 = 0; // Reset CR1
I2C1->TIMINGR = 0; // Reset timer settings
/* APB1 clock (I2C1 clock) is set in RCC_CFGR reg -- keep at divide by 1 -- 24 MHz SYSCLK
* Refer to table 103 for timing value source. t_presc was found to be 250 ns for 100 kHz I2C, so PRESC was set to match that for SYSCLK = 24 MHz
* All subsequent settings are copied from table 103 from STM32L011K4 reference manual
*/
I2C1->TIMINGR |= (0x5 << 28)|(0x4 << 20)|(0x2 << 16)|(0x0F << 8)|(0x13 << 0);
/* Desired settings:
* RXDMAEN enable, ANF enable.
*/
I2C1->CR1 |= (0x8 << I2C_CR1_DNF_Pos)|I2C_CR1_ERRIE;
I2C1->CR2 = 0; // Reset contents (ACKs are enabled by default)
NVIC_EnableIRQ(I2C1_IRQn);
NVIC_SetPriority(I2C1_IRQn, 0);
/* DMA initialization */
/* Since this is peripheral to memory, we use I2C1_RX, which is available on DMA channels 3,7. We used channel 3, but 7 would work the same. */
RCC->AHBENR |= RCC_AHBENR_DMA1EN; // Enable peripheral clock for DMA1
DMA1_Channel3->CCR &= ~(0x00000001); // Disable Channel 3 DMA
// Configure DMA channel mapping
DMA1_CSELR->CSELR &= ~0x00000F00; // Channel 3 re-mapping mask
DMA1_CSELR->CSELR |= 0x00000600; // Channel 3 re-mapped to I2C1_RX
/* Configure NVIC for DMA */
NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
return;
}
void I2C1_DMA_Start_Read(uint8_t SlaveAddress, uint8_t RegisterAddress, int* MemoryBaseAddress, int BufferSize) {
// We need to put the device address out on the serial line before we can hand it over to the DMA
I2C1->CR1 &= ~(I2C_CR1_PE); // Disable I2C1
DMA1_Channel3->CCR &= ~DMA_CCR_EN; // Disable Channel 3 DMA
DMA1_Channel3->CCR &= ~(0x00007FFF); // Channel 3 DMA mask
// Configure DMA Channel 3 for 16 bit memory and peripheral, and other aliased settings (reference manual page 249, 10.4.3)
DMA1_Channel3->CCR |= (0b01 << 10)|(0b01 << 8)|DMA_CCR_MINC|DMA_CCR_TEIE|DMA_CCR_TCIE;
DMA1_Channel3->CPAR = (uint32_t) RegisterAddress;
DMA1_Channel3->CMAR = (uint32_t) MemoryBaseAddress;
DMA1_Channel3->CNDTR = (uint16_t) BufferSize;
I2C1->CR1 &= (~I2C_CR1_TXDMAEN); // Disable TX DMA for I2C1
I2C1->CR1 |= I2C_CR1_RXDMAEN; // Enable RX DMA for I2C1
// I2C1->CR2 |= ((uint8_t) (SlaveAddress << 1)); // Set up the slave address for DMA read
while(!(I2C1->ISR & I2C_ISR_TXE));
I2C1->TXDR |= ((uint8_t) (SlaveAddress << 1)); // Set up the slave address for DMA read
I2C1->CR2 |= I2C_CR2_RD_WRN;
DMA1_Channel3->CCR |= DMA_CCR_EN; // Activate DMA channel 3
I2C1->CR1 |= I2C_CR1_PE; // Enable I2C1
I2C1->CR2 |= I2C_CR2_START; // Generate start condition
while(I2C1->CR2 & I2C_CR2_START); // Wait until hardware clears the start bit
// ???
return;
}
According with reference manual(p. 604)
you need uncomment I2C1->CR2 |= ((uint8_t) (SlaveAddress << 1)); and comment I2C1->TXDR |= ((uint8_t) (SlaveAddress << 1)); for set slave address, and you need set the number of bytes to be transferred.
I can't see your initialisation of GPIO. Check is GPIO settings right (Alternative function and open-drain mode).
Also in reference manual written this
PE must be kept low during at least 3 APB clock cycles in order to perform the software
reset. This is ensured by writing the following software sequence: - Write PE=0 - Check
PE=0 - Write PE=1.
I think you should try to do so.
Also I advise using 4.7k resistor for pulling to VDD.
I have a STM32 NUCLEO-64 F103RB and I am using Keil uVision 5. I was just testing the device with CubeMX software and was able to blink or turn on the green LED in my device. I then decided to do the same by changing the values in the registers on the board in C code directly. This is an schematic of the device:
Where I have highlited the GPIO A and the Bus that connects to the referred port. According to my understanding, two things should be done before actually turning the LED on:
1 - Activating the clock for the APB2 bus
2 - Setting the GPIOA Port 5 (which corresponds to the LED) to output mode.
I have done these two steps. However, the LED still won't turn on. I've tried looking at the documentation and found that the PA5 could be used as SPI, and I tried to change the register AFIO_MAPR (Page 184 of the reference manual) but that also didn't work. I tried looking at the clock activation for AHB2, but I didn't quite understand how it would work.
My C code is:
#include "stm32f10x.h" // Device header
int main() {
// Initialise clock of APB2 Bus
RCC->APB2ENR = (RCC->APB2ENR & 0x0) | RCC_APB2ENR_IOPAEN;
// Put the GPIOA in Output mode
GPIOA->CRL = (GPIOA->CRL & 0x44444444) | GPIO_CRL_MODE5_1;
// Changinging the ODR Register (Lighting the LED)
while(1) {
GPIOA->ODR = (GPIOA->ODR & 0x0) | GPIO_ODR_ODR5;
}
}
Nucleo64 F103RB Reference Manual
Nucleo64 F103RB User Manual
What step?
Enable GPIOA clock.
Configure pin to be push-pull output.
Toggle the pin.
For general GPIO do not set any AFIOs.
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN;
__DSB();
GPIOA -> CRL &= ~GPIO_CRL_CNF5_Msk;
GPIOA -> CRL |= GPIO_CRL_MODE5_Msk;
while(1)
{
GPIOA -> ODR ^= GPIO_ODR_ODR5;
for(volatile unsigned x = 0; x < 500000; x++);
}
you need also to check the solder bridges on the board:
I am having trouble setting up high speed PWM on my ATtiny85. I need to use the PCK, at a speed of 400 kHz. I believe that I have followed the data sheet correctly, but for some reason, the timer interrupt flags are not working.
If I program the device, the output of the corresponding pin is a constant 5 V.
If I comment out the PCK setup and use the system clock instead, the flags are correctly set and PWM works fine. The code is posted. Why aren't the flags setting and the PWM isn't working?
#include <avr/io.h>
#include <avr/interrupt.h>
int main(void)
{
PORTB = 0; //Reset values on port B
// After setting up the timer counter,
// set the direction of the ports to output
DDRB |= (1<<PB1) | (1<<PB0); // Set the direction of PB1 to an output
// PLLCSR - PLL control and status register:
// PLL is a clock multiplier - multiplies system 8 MHz by 8 to 64 MHz
// PLL is enabled when:PLLE bit is enabled,
// CKSEL fuse is programmed to 0001. This clock is
// switched off in sleep modes!
PLLCSR |= (1<<PLLE); // PLL enable
// Wait until the PLOCK bit is enabled
// before allowing the PCK to be enabled
//WaitForPLOCK();
//unsigned int i = 0;
while ((PLLCSR & (1<<PLOCK)) == 0x00)
{
// Do nothing until plock bit is set
}
PLLCSR |= (1<<PCKE); // Enable asynchronous mode, sets PWM clock source
TCCR1 =
(1<<CTC1) | // Enable PWM
(1<<PWM1A) | // Set source to pck
(1<<(CS10)) | // Clear the pin when match with ocr1x
(1<<COM1A1);
GTCCR = (1<<PWM1B) | (1<<COM1B1);
// Set PWM TOP value - counter will count and reset
// after reaching this value
// OCR1C
// 400 kHz 159
// 450 kHz 141
// 500 kHz 127
OCR1C = 159;
// Enable Timer1 OVF interrupt
TIMSK = (1<<OCIE1A) | (1<<TOIE1);
sei();
// This should set the duty cycle to about 75%
OCR1A = 120;
The solution involved the CKDIV8 fuse. To program this fuse correctly however, HVSP "High Voltage Serial Programming" was required. After removing this fuse so that the device operated at 8 MHz, the PWM gave a 400 kHz output. I hope other people find this useful!
The errata (section 27 of the datasheet) states 'PLL will not lock under 6 MHz'. The only workaround listed is to set the clock to 6 MHz or higher.