STM32F4 one master timer triggers two slave times - c

Question

I'm a little bit stuck about timer synchronization with STM32F446RE.
I want to use 1 timer as master and two timers as slaves. The master timer (i.e. TIM2) has a period of 5 seconds and starts the other two timers at the same time.
The slave timers have own periods (1st slave has a period of 4 seconds and 2nd slave has a period of max 3 seconds). The 2nd slave timer (i.e. TIM1) will generate a one-pulse output. Both slaves should run 1 time and stop. They only should get activated again if the master timer sends a trigger. I want to use the 1. slave to adapt the period of the 2nd slave by calling an interrupt handler where I write the registers ARR and PSC and CCR1 (for one pulse).
I tried to do this with HAL but it's getting more and more confusing. Does anybody have a nice idea how to code this (little code-snippet would be very nice) with writing registers instead of HAL?
I also had a look to the timer cookbook of STM at chapter 6 but didn't get it working yet. https://www.st.com/content/ccc/resource/technical/document/application_note/group0/91/01/84/3f/7c/67/41/3f/DM00236305/files/DM00236305.pdf/jcr:content/translations/en.DM00236305.pdf
Thank you very much for any feedback!
Kind regards,
Tobi

Answer 1

OK the first part is done.
Configuration of TIM2:
- configure as master with a period of 10 seconds.
- use TIM_TRGO_UPDATE as output trigger for slave timer(s).
I first created the timer with STM32CubeMX and then examined the HAL-functions that got called.
static void Timer2_Init(){
/* activate clock for TIM2 peripheral */
__HAL_RCC_TIM2_CLK_ENABLE();
/* Prescaler */
TIM2->PSC = 44999; // bus is running with 90MHz
/* set counter mode */
TIM2->CR1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
TIM2->CR1 |= TIM_COUNTERMODE_UP;
/* Auto-Reload Register */
TIM2->ARR = 20000;
/* Set Clock Division */
TIM2->CR1 &= ~ TIM_CR1_CKD;
TIM2->CR1 |= TIM_CLOCKDIVISION_DIV1;
/* set Auto-Reload-Preload */
//TIM2->CR1 |= (0 << 7);
/* Update Event - if this timer is configured as Master with output TRGO_UPDATE
* the slave timer TIM 1 will get a trigger and run one time
*
* This bit can be set by software, it is automatically cleared by hardware.
* 0: No action
* 1: Reinitialize the counter and generates an update of the registers. Note that the prescaler
* counter is cleared too (anyway the prescaler ratio is not affected). For more see manual. */
//TIM2->EGR = TIM_EGR_UG;
/* Set Clock Source */
TIM2->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_TS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
/* Master Configuration */
TIM2->CR2 &= ~TIM_CR2_MMS;
TIM2->CR2 |= TIM_TRGO_UPDATE;
TIM2->SMCR &= ~TIM_SMCR_MSM;
TIM2->SMCR |= TIM_SMCR_MSM;
TIM2->CR1 = TIM_CR1_CEN;
}
Next the initialization of TIM1:
- configure as master.
- set ARR for 5 seconds.
- set CCR1 for pulse lenght of 1 second.
Again I used STM32CubeMX to create the code first and then examined the content of all HAL functions.
static void Timer1_Init(){
/* activate clock for TIM1 peripheral */
__HAL_RCC_TIM1_CLK_ENABLE();
/* Edited Registers of HAL_TIM_Base_Init(&htim1) */
/* Prescaler */
TIM1->PSC = 17999; // bus is running with 180MHz
/* set counter mode */
TIM1->CR1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
TIM1->CR1 |= TIM_COUNTERMODE_UP;
/* Auto-Reload-Register */
TIM1->ARR = 49999;
TIM1->CR1 &= ~ TIM_CR1_CKD;
TIM1->CR1 |= TIM_CLOCKDIVISION_DIV1;
/* repetition counter if pulse should be displayed more than 1 time */
TIM1->RCR = 0;
/* Auto-Reload Preload Enable */
//TIM1->CR1 |=TIM_CR1_ARPE;
/* update event */
TIM1->EGR = TIM_EGR_UG;
/* Edited registers of HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) */
TIM1->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_TS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
/* One Pulse Mode: Edited registers of HAL_TIM_OnePulse_Init(&htim1, TIM_OPMODE_SINGLE) */
//TIM1->CR1 &= ~TIM_CR1_OPM;
TIM1->CR1 |= TIM_CR1_OPM;
/* Slave Mode configuration: edited registers of HAL_TIM_SlaveConfigSynchro(&htim1, &sSlaveConfig) */
TIM1->SMCR &= ~TIM_SMCR_TS;
TIM1->SMCR |= TIM_TS_ITR1;
TIM1->SMCR &= ~TIM_SMCR_SMS;
TIM1->SMCR |= (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1); // = TIM_SLAVEMODE_TRIGGER -
// TIM1->DIER &= ~TIM_DIER_TIE;
// TIM1->DIER &= ~TIM_DIER_TDE;
/* HAL_TIM_PWM_ConfigChannel: HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) */
/* Disable the Channel 1: Reset the CC1E Bit */
// TIM1->CCER &= ~TIM_CCER_CC1E;
/* Reset the Output Compare Mode Bits */
TIM1->CCMR1 &= ~TIM_CCMR1_OC1M;
TIM1->CCMR1 &= ~TIM_CCMR1_CC1S;
/* Select the Output Compare (OC) Mode 1 */
TIM1->CCMR1 |= (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1); // = TIM_OCMODE_PWM1
/* Reset and set the Output N Polarity level to LOW */
TIM1->CCER &= ~TIM_CCER_CC1P;
TIM1->CCER |= TIM_CCER_CC1P; // = TIM_OCPOLARITY_LOW
/* Reset the Output N State */
// TIM1->CCER &= ~TIM_CCER_CC1NP;
//TIM1->CCER |= 0x00000000U;
/* Reset the Output N State */
// TIM1->CCER &= ~TIM_CCER_CC1NE;
/* IS_TIM_BREAK_INSTANCE */
/* Reset the Output Compare and Output Compare N IDLE State */
// TIM1->CR2 &= ~TIM_CR2_OIS1;
// TIM1->CR2 &= ~TIM_CR2_OIS1N;
/* Set the Output Idle state */
//TIM1->CR2 |= 0x00000000U;
/* Set the Capture Compare Register: Pulse */
TIM1->CCR1 = 40000;
/* Set the Preload enable bit for channel 1 */
TIM1->CCMR1 |= TIM_CCMR1_OC1PE;
/* Configure the Output Fast mode */
// TIM1->CCMR1 &= ~TIM_CCMR1_OC1FE;
//TIM1->CCMR1 |= 0x00000000U;
/* Edited registers by HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1) */
/* Enable the Capture compare channel */
TIM1->CCER |= (1 << 0); // = TIM_CCER_CC1E
/* Enable the main output */
TIM1->BDTR |= TIM_BDTR_MOE;
/* Initialize the GPIO Pin for output: HAL_TIM_MspPostInit(&htim1) */
GPIO_InitTypeDef GPIO_InitStruct = {0};
__HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = GPIO_PIN_8;
GPIO_InitStruct.Pin = GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* Enable Counter: will be automatically enabled with trigger event */
//TIM1->CR1 = TIM_CR1_CEN;
}
Next step is to configure a second slave timer (TIM3) that will edit the registers of TIM1.
static void Timer3_Init(){
/* activate clock for TIM1 peripheral */
__HAL_RCC_TIM3_CLK_ENABLE();
/* Edited Registers of HAL_TIM_Base_Init(&htim1) */
/* Prescaler */
TIM3->PSC = 50000; //44999;
/* set counter mode */
TIM3->CR1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
TIM3->CR1 |= TIM_COUNTERMODE_UP;
/* Auto-Reload-Register */
TIM3->ARR = 11000;
TIM3->CR1 &= ~ TIM_CR1_CKD;
TIM3->CR1 |= TIM_CLOCKDIVISION_DIV1;
/* update event */
TIM3->EGR = TIM_EGR_UG;
/* Edited registers of HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) */
TIM3->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_TS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
/* One Pulse Mode: Edited registers of HAL_TIM_OnePulse_Init(&htim1, TIM_OPMODE_SINGLE) */
//TIM1->CR1 &= ~TIM_CR1_OPM;
TIM3->CR1 |= TIM_CR1_OPM;
/* Slave Mode configuration: edited registers of HAL_TIM_SlaveConfigSynchro(&htim1, &sSlaveConfig) */
TIM3->SMCR &= ~TIM_SMCR_TS;
TIM3->SMCR |= TIM_TS_ITR1;
TIM3->SMCR &= ~TIM_SMCR_SMS;
TIM3->SMCR |= (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1); // = TIM_SLAVEMODE_TRIGGER
/* HAL_TIM_PWM_ConfigChannel: HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) */
/* Disable the Channel 1: Reset the CC1E Bit */
/* Reset the Output Compare Mode Bits */
TIM3->CCMR1 &= ~TIM_CCMR1_OC1M;
TIM3->CCMR1 &= ~TIM_CCMR1_CC1S;
/* Select the Output Compare (OC) Mode 1 */
TIM3->CCMR1 |= (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1); // = TIM_OCMODE_PWM1
/* Reset and set the Output N Polarity level to HIGH */
TIM3->CCER &= ~TIM_CCER_CC1P; // = TIM_OCPOLARITY_HIGH
/* Set the Capture Compare Register: Pulse */
TIM3->CCR1 = 0;
/* Set the Preload enable bit for channel 1 */
//TIM3->CCMR1 |= TIM_CCMR1_OC1PE;
HAL_NVIC_SetPriority(TIM3_IRQn, 0, 1);
HAL_NVIC_EnableIRQ(TIM3_IRQn);
TIM3->DIER = TIM_DIER_CC1IE; //DMA Interrupt Enable Register (DIER): Interrupt "Capture/Compare 1 interrupt enable"
/* warning: setting this bit will cause the timer running continuously, but timer should only start with trigger,
* so don't set the CEN bit - let the trigger do the job automatically */
//TIM3->CR1 = TIM_CR1_CEN;
}
And finally the IRQ Handler for TIM3:
void TIM3_IRQHandler(void)
{
if (((TIM3->SR & TIM_FLAG_CC1) == TIM_FLAG_CC1) != RESET)
{
if (((TIM3->DIER & TIM_DIER_CC1IE) == TIM_DIER_CC1IE) != RESET)
{
TIM3->SR = ~ TIM_FLAG_CC1;
/* do something *
}
}
}
I'm happy for any feedback about this code.
I just noticed that the internal RC oscillator is not very accurate at my test environment. In the manual DM00135183.pdf in section "6.2.2 HSI Clock" you can read about the accuracy and how to trim the HSI. But I think it might be better to use an external crystal oscillator or ceramic resonator if you want more accurate timing.
If there is anything I did wrong or what I want to do will not work in the expected way, please also leave a comment.