STM32H7xx toggle IO as fast as possible - arm

Question

I'm trying to toggle an IO on an STM32H743 as fast as possible. I'm using an external 10MHz clock, powered at 3.3V, and I'm confident my main clock is running at 400MHz and the bus clock that talks to the GPIO (AHB4) is running at 200MHz. Here is some sample code I'm using to configure the chip and toggle the IO:
RCC_ClkInitTypeDef clock;
RCC_OscInitTypeDef osc;
MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
// External 10.000MHz oscillator
osc.OscillatorType = RCC_OSCILLATORTYPE_HSE;
osc.HSEState = RCC_HSE_ON;
osc.HSIState = RCC_HSI_OFF;
osc.CSIState = RCC_CSI_OFF;
osc.PLL.PLLState = RCC_PLL_ON;
osc.PLL.PLLSource = RCC_PLLSOURCE_HSE;
// ((10 / 5) * 400 ) / 2 = 400
osc.PLL.PLLM = 5;
osc.PLL.PLLN = 400;
osc.PLL.PLLP = 2;
osc.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
osc.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
HAL_RCC_OscConfig(&osc);
// Sysclk source is PLL
clock.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 |
RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1);
clock.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
clock.SYSCLKDivider = RCC_SYSCLK_DIV1;
// HCLK = SYSCLK / 2 = 200
clock.AHBCLKDivider = RCC_HCLK_DIV2;
clock.APB3CLKDivider = RCC_APB3_DIV2;
clock.APB1CLKDivider = RCC_APB1_DIV2;
clock.APB2CLKDivider = RCC_APB2_DIV2;
clock.APB4CLKDivider = RCC_APB4_DIV2;
HAL_RCC_ClockConfig(&clock, FLASH_LATENCY_4);
__HAL_RCC_CSI_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
HAL_EnableCompensationCell();
// GPIOC0 is pin I'm toggling
__HAL_RCC_GPIOC_CLK_ENABLE();
GPIO_InitTypeDef gpio;
gpio.Mode = GPIO_MODE_OUTPUT_PP;
gpio.Pull = GPIO_NOPULL;
gpio.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
gpio.Pin = GPIO_PIN_0;
HAL_GPIO_Init(GPIOC, &gpio);
// Configure GPIOC9 as SYSCLK/2 (200MHz)
gpio.Mode = GPIO_MODE_AF_PP;
gpio.Alternate = GPIO_AF0_MCO;
gpio.Pull = GPIO_NOPULL;
gpio.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
gpio.Pin = GPIO_PIN_9;
HAL_GPIO_Init(GPIOC, &gpio);
HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_2);
while (1)
{
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
GPIOC->ODR = 0;
GPIOC->ODR = 1;
}
When I look at this on an oscilloscope I see my SYSCLK/2 correctly at 200MHz but the toggle pin is only toggling once every 60nS.
When I look at the disassembly for this code (compiled "-O3"), the toggling is being compiled in to single STR instructions (r1 = 0, r2 = 1, r3 = &GPIOC->ODR):
...
str r1, [r3, #20]
str r2, [r3, #20]
str r1, [r3, #20]
str r2, [r3, #20]
str r1, [r3, #20]
str r2, [r3, #20]
str r1, [r3, #20]
str r2, [r3, #20]
str r1, [r3, #20]
str r2, [r3, #20]
str r1, [r3, #20]
...
I can't find cycle information for the Cortex-M7 processor, but when I look at the cycle time for the Cortex-M4 processor (http://infocenter.arm.com/help/topic/com.arm.doc.ddi0439b/DDI0439B_cortex_m4_r0p0_trm.pdf) table 3-1, I see a STR should take two clock cycles to execute. I would expect to see my IO toggling aproimately every 10 nanoseconds (or every two clock cycles on the 200MHz AHB4 bus).
I've tried running the code from FLASH and SRAM, but there is no difference in IO speed.
Why isn't my IO toggling every two clock cycles?
EDIT:
In the reference manual (st.com/resource/en/reference_manual/dm00314099.pdf) section 10.2 it says, "Fast toggle capable of changing every two clock cycles."
EDIT:
So some comments have mentioned that the processor isn't really meant to talk directly to GPIO. So I've rewritten the code to use DMA (I had to use BDMA and specifically allocate the data in RAM_D3 to get it to run as fast as the software loop). Ultimately I want to clock out calculated data from RAM to the entire GPIO port. How can I clock data out every two clock cycles as the reference manual suggests?
DMA code that runs on a NUCLEO-H743ZI:
#include <stm32h7xx_hal.h>
#include <stdint.h>
DMA_HandleTypeDef dma;
void SysTick_Handler(void)
{
HAL_IncTick();
}
static void ClockConfig(void)
{
RCC_ClkInitTypeDef clock;
RCC_OscInitTypeDef osc;
MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
osc.OscillatorType = RCC_OSCILLATORTYPE_CSI;
osc.CSIState = RCC_CSI_ON;
osc.CSICalibrationValue = 16;
osc.PLL.PLLState = RCC_PLL_ON;
osc.PLL.PLLSource = RCC_PLLSOURCE_CSI;
osc.PLL.PLLM = 1;
osc.PLL.PLLN = 200;
osc.PLL.PLLP = 2;
osc.PLL.PLLQ = 2;
osc.PLL.PLLR = 2;
osc.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
osc.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
osc.PLL.PLLFRACN = 0;
HAL_RCC_OscConfig(&osc);
clock.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1);
clock.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
clock.SYSCLKDivider = RCC_SYSCLK_DIV1;
clock.AHBCLKDivider = RCC_HCLK_DIV2;
clock.APB3CLKDivider = RCC_APB3_DIV2;
clock.APB1CLKDivider = RCC_APB1_DIV2;
clock.APB2CLKDivider = RCC_APB2_DIV2;
clock.APB4CLKDivider = RCC_APB4_DIV2;
HAL_RCC_ClockConfig(&clock, FLASH_LATENCY_4);
__HAL_RCC_CSI_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
HAL_EnableCompensationCell();
HAL_SYSTICK_Config(SystemCoreClock / 1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}
void GpioConfig(void)
{
__GPIOC_CLK_ENABLE();
GPIO_InitTypeDef gpio;
gpio.Pin = GPIO_PIN_0;
gpio.Mode = GPIO_MODE_OUTPUT_PP;
gpio.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
gpio.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &gpio);
gpio.Pin = GPIO_PIN_1;
gpio.Mode = GPIO_MODE_OUTPUT_PP;
gpio.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
gpio.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &gpio);
gpio.Mode = GPIO_MODE_AF_PP;
gpio.Alternate = GPIO_AF0_MCO;
gpio.Pull = GPIO_NOPULL;
gpio.Speed = GPIO_SPEED_FAST;
gpio.Pin = GPIO_PIN_9;
HAL_GPIO_Init(GPIOC, &gpio);
HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_2);
}
uint8_t complete = 0;
void DmaComplete(DMA_HandleTypeDef *handle)
{
complete = 1;
}
void DmaError(DMA_HandleTypeDef *handle)
{
complete = 1;
}
void DmaConfig(void)
{
__HAL_RCC_BDMA_CLK_ENABLE();
dma.Instance = BDMA_Channel0;
dma.Init.Request = DMA_REQUEST_MEM2MEM;
dma.Init.Direction = DMA_MEMORY_TO_MEMORY;
dma.Init.PeriphInc = DMA_PINC_ENABLE;
dma.Init.MemInc = DMA_MINC_DISABLE;
dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
dma.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
dma.Init.Mode = DMA_NORMAL;
dma.Init.Priority = DMA_PRIORITY_VERY_HIGH;
HAL_DMA_Init(&dma);
HAL_DMA_RegisterCallback(&dma, HAL_DMA_XFER_CPLT_CB_ID, DmaComplete);
HAL_DMA_RegisterCallback(&dma, HAL_DMA_XFER_ERROR_CB_ID, DmaError);
HAL_NVIC_SetPriority(BDMA_Channel0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn);
}
void BDMA_Channel0_IRQHandler(void)
{
HAL_DMA_IRQHandler(&dma);
}
void HardFault_Handler(void)
{
__NOP();
}
__attribute__((section(".ram_d3")))
static uint16_t src[10] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 };
int main(void)
{
HAL_Init();
ClockConfig();
GpioConfig();
DmaConfig();
while (1)
{
complete = 0;
HAL_DMA_Start_IT(&dma, (uint32_t)&src, (uint32_t)&GPIOC->ODR, 10);
while (complete == 0) ;
}
}

Answer 1

Your assumptions are wrong. The GPIO speed is not determined by the core instructions timings, but by the physical characteristics of the peripheral. See the table in the DS where static and dynamic GPIO port characteristics are. The maximum speed depends on many parameters.