I have an entire library made in C. It has almost 10 folders with a lot of files.
I have created a filename.c file in root folder and trying to compile it in mac using gcc test.c -o test however its not including header files. Generally I have to add all the header files gcc test.c libaudio.c -o test
How can I compile entire project instead of just one file.
Makefiles will solve your problem. You can create your own rules to clear the project (remove the generated files), build the project indicating where is your compiler (compile the source files located in some specific path, extension, etc), set the output path and so on, without typing a large compilation order.
https://www.gnu.org/software/make/manual/make.html
Edit: There you will be able to find how to add shared, static or raw libraries to your proyect through makefiles.
Use a Makefile. make the utility the reads the configuration within the Makefile will automate the running of the individual commands, such that you only need to name the item you wish to be rebuilt.
make myprogram
And make will use the dependency information stored in the Makefile's rules to determine what other elements are "out of date", rebuilding those and assembling them into myprogram.
This is a decent "first time" tutorial for "make".
Here is the full blown documentation for "make"
Once you master the concepts within make, you can then use other tools that make maintaining Makefiles either easier, more portable, or both.
Some tools that improve upon "make" include "cmake", "automake", "the autotools collection", "scons", "waf", "rake", "doit", "ninja", "tup", "redo", and "sake". There are more, and some are programming language specific, or limited to a particular enviornment.
The reason I recommend "make" over the others is because "make" is a baseline that will always be present, and the features in the other tools are often not understood or recognized to be needed until you get enough experience with "make".
In C, the concept of project is not part of the language, it depends generally of the tools / platform / library you have to build.
On Linux based platforms, you may have a makefile describing the project, or the library may have a cmake script.
You should be able to find the build instructions in you library documentation.
I definitely recommend the make approach as it is scalable.
If you really only have a couple of files, gcc will accept multiple .c files on the command line and link them all to generate one executable.
Related
I have two executables that are build from the same source (a client and a server) and they're built with the compile options -D CLIENT=0 -D SERVER=1 for the server and -D CLIENT=1 -D SERVER=0 for the client. If I do something like
if (CLIENT) {
// Client specific code
}
clangd complains that CLIENT is not defined. Is there a way to make clangd aware of those macros? (The code compiles just fine, the errors are from clangd, not the compiler)
Is there a way to make clangd aware of those macros?
From getting started with clangd:
Project setup
To understand source code in your project, clangd needs to know the
build flags. (This is just a fact of life in C++, source files are not
self-contained.)
By default, clangd will assume that source code is built as clang
some_file.cc, and you’ll probably get spurious errors about missing
#included files, etc. There are a couple of ways to fix this.
compile_commands.json
compile_commands.json file provides compile commands for all source
files in the project. This file is usually generated by the build
system, or tools integrated with the build system. Clangd will look
for this file in the parent directories of the files you edit. Other
tools can also generate this file. See the compile_commands.json
specification.
compile_commands.json is typically generated with CMake build system, but more build systems try to generate it.
I would suggest moving your project to CMake, in the process you will learn this tool that will definitely help you in further C-ish development.
compile_flags.txt
If all files in a project use the same build flags, you can put those
flags, one flag per line, in compile_flags.txt in your source root.
Clangd will assume the compile command is clang $FLAGS some_file.cc.
Creating this file by hand is a reasonable place to start if your
project is quite simple.
If not moving to cmake, create a compile_flags.txt file with the content for example like the following, and clangd should pick this file up:
-DCLIENT=1
-DSERVER=1
I'm fairly new to eclipse but have figured out how to use it with Java.
However, we are now moving on to C and I am having a hard time using it. I just want to use eclipse for my labs - i.e. to create / compile / test / run C exercises or tasks that have been set.
I created a new 'Labs' C project and have been creating the files ex1.c, ex2.c etc in the src folder. Eclipse doesn't like this due to more than one main across multiple files, but the files aren't related and each is supposed to have their own main.
Can someone advise me as to whether there is a better way to setup / organise my workspace for this labwork or alternatively how to compile / run single files at a time in eclipse?
You have a few options:
Create one project per executable (the projects can be in the same workspace). This is pretty self-explanatory, but it might get annoying if you have a lot of executables. Also, if you need to share code between your executables, you'd have to create a separate project for the shared code and set up dependencies.
Create one project with multiple build configurations, one per executable. See this answer for how to do that.
Use Eclipse for navigating and editing your code only, and build (and run/debug) your executables from the command line. This way, the organization of the Eclipse project(s) is irrelevant, and you can build from the command line however you want (at this stage, a simple Makefile is probably the easiest).
I prefer option #3, but to some extent it's a matter of taste; if you like to do everything including building from the IDE, go with #1 or #2.
EDIT: A simple Makefile might look like this:
ex1 : src/ex1.c
gcc -o ex1 src/ex1.c
ex2 : src/ex2.c
gcc -o ex2 src/ex2.c
...
put into a file named makefile, and you would then run make to build. (If you're on Windows you would write ex1.exe instead of just ex1.)
Have a look at a tutorial like this one to understand how Makefiles work.
TL:DR
Can you generate clang debugging information(CFGs, PDGs) when the original source file have DEPENDENCY errors from missing header files that cause compilation issues such as undeclared identifiers and unknown types? The files are syntactically correct. Is there a flag that maybe set all undeclared identifiers to INTs for debugging?
I am using Clang to analyze source code packages. Usually, I modify the makefile so clang generates debugging information using the command below
clang -emit-llvm -g -S -ferror-limit=0 -I somefile some_c_file
However, this approach is very makefile focused and if developer does not support Clang in that given build version, I have to figure out how to generate the debugging information.
This is not good for automation. For things such as OpenSSL where they include dozen of files(headers) and custom configurations for the given platform, this is not practical. I want to suppress or ignore the errors if possible since I know the build version's file under test is syntactically correct.
Thanks!
Recently I used clang-tidy for source code analysis of one of our projects. The project uses GNU compiler and we didn't wanted to move away from that. So the process that I followed was below:
1) Use bear to generate the compilation database i.e. compile_commands.json which is used by clang-tidy
2) By pass the include files that we don't want to analyze by including them as system files i.e. use --isystem for their inclusion and project specific files using -I. (If you can't change the Make files you could change the compile_commands.json by a simple find and replace)
Hope this helps
I have two files in my project.
One is a ".c" file, one is a ".asm" file. First, I compile both the files into two ".o" object files and then link together using a custom linker script.
Currently, I am using a simple bash script with manual commands to build the project, but as the project size is expected to increase, I was thinking of moving the project to using cmake as its primary build system.
I have searched documentation of cmake and googled for a lot of time, although I have shortlisted some of the variables in cmake which might prove to be useful in this case, I am unable to find any sample explaining how to achieve this.
Can anybody provide me with a brief sample code on how should I go about achieving this ?
You asked for an example? Here's one from the cmake wiki
set(mySrcs foo.c bar.c)
set(can_use_assembler FALSE)
# test wether it is a x86 machine and as/gas is available
if("${CMAKE_SYSTEM_PROCESSOR}" MATCHES "i.86")
enable_language(ASM-ATT)
if(CMAKE_ASM-ATT_COMPILER_WORKS)
set(can_use_assembler TRUE)
set(mySrcs ${mySrcs} codec_i86.s)
endif(CMAKE_ASM-ATT_COMPILER_WORKS)
endif("${CMAKE_SYSTEM_PROCESSOR}" MATCHES "i.86")
# no assembler found
if(not can_use_assembler)
set(mySrcs ${mySrcs} codec_generic.c)
endif(not can_use_assembler)
add_executable(player ${mySrcs})
Because of the way that CMake works, assembling and linking are grouped together in the same step (from the programmer's perspective at least). So add_executable automatically handles everything for you.
If you want to include a linker script, that gets more difficult with CMake. The best place to look into it is over here. Since the examples and instructions are too long to copy out in the SO answer box, I'll leave the reading to you.
I am just looking for some guidelines, as this might seem like a very open question.
I have a project that has been compiled using Visual Studio 2008 sp1. I have to compile so it will run linux using gcc 4.4.1 C99.
It is a demo application that I didn't write myself.
The source code is written so it can be cross-platform (linux, windows), so the code will compile and run on linux. However, has it has been developed using VS, I don't have any makefile to use.
I could write a make file. But I am not sure about the dependences as there are about 20 files all together (*.c and *.h).
I am just wondering how can I write a makefile from a visual studio project? Is there any settings I can use? and what depends on what? Anything else?
Many thanks for any suggestions,
The makedepend utility will scan the C files you give it, using C preprocessing rules to determine their dependencies and output them to a Makefile.
This should do most of what you want.
One tool that you can use is CMake. CMake can generate a VS.net solution file, and it can generate a Unix makefile. This way is not easy, nor is it the without its bumps in the road. (Especially when the build sequence gets complex)
Start with a very simple Makefile:
theapp: *.c *.h Makefile
gcc *.c -o theapp
Those two lines will get you 90% of the way there (and, in a lot of cases, 100% of the way).
Now you can make and run your app in Unix simply with:
$ make && ./theapp
I don't recommend that you use those complex Makefile generators like automake unless you plan on releasing this stuff to the world.
For private projects, keep your makefiles simple and clean.