Makefile path issues - c

Question

I've .c files in different subfolders within main src directory, I've the problem with running Makefile, I'm new to Makefile, need hands on the Makefile to work and to create a static library.
src/math/addition/add.c (+add.h)
int add(int a, int b) {return a + b;}
src/math/subtraction/sub.c (+sub.h)
int sub(int a, int b) {return a - b;}
src/math/math.c
#include "addition/add.h"
#include "subtraction/sub.h"
Makefile (at the root of the project)
SRC=src/math/Math.c src/math/Math.h src/math/addition/add.c src/math/addition/add.h src/math/subtraction/sub.c src/math/subtraction/sub.h
INCLUDE_PATH=src/
Math: bin
ar rcs libMath.a Math.o
bin:
mkdir bin/
for dir in $(SRC); do \
cd $$dir; \
gcc -c *.c -I../; \
mv *.o ../../../bin; \
cd -; \
done
If you believe there's a better way or any lateral thinking, I'm not fixated on anything.

Answer 1

Makefile is good at two things: building dependency graphs and executing steps between each node in the dependency graphs.
If you have access to GNUMake (most of us do; it's pretty much the only one anyone uses), you can use VPATH to tidy up a bit. VPATH is used to tell make where it can find source files. Be careful with it, if you have multiple files with the same name under different directories.
I suggest you use something akin to the following
VPATH := src src/math src/math/addition src/math/subtraction
CFLAGS += -Isrc -Isrc/math -Isrc/mathaddition -Isrc/math/subtraction
all: libMath
libMath: bin/Math.o bin/add.o bin/sub.o
ar rcs libMath bin/Math.o bin/add.o bin/sub.o
bin/%.o: %.c %.h
Make contains a default .c -> .o rule which you can use; the %.o: %.c %.hdoes this, but also declares that all .o files, by default, depend on a .c and a .h file with the same prefix (the % part) as the object file.
I suspect your Math.o target will also depend on the addition.h and subtraction.h files; you can declare Math.o as dependent on those files using the rule Math.o: Math.c Math.h addition.h subtraction.h.
Remember to substitute the space before ar, with a tab.
You may want to change how you organize your source files and/or header files.
Usually ar produces archive files that end in .a. You may want to change that as well.
If you use make right, you can use parallel builds (make -J) to really speed up compilation time; if you use it wrong, everything is going to get slower and we'll have yet another person who starts to hate make because they don't understand it.

Answer 2

Makefile:
#
# Boilerplate.
#
all:
define add_target
$(info add_target($1))
$(eval $(eval_args))
$(eval $(call eval_args,$1,\
OBJDIR := $(firstword $($1.OBJDIR) ./objs/$1),\
))
$(eval $(call eval_args,$1,\
TYPE := $(firstword $($1.TYPE) binary),\
))
$(eval $(call eval_args,$1,\
objs := $(obj_from_source),
))
$(eval $1 := $($1.TARGET))
TARGETS += $($1)
PHONY_TARGETS += $1
CLEAN_TARGETS += clean_$1
.PHONY: clean_$1
clean_$1:; rm -rf $($1.OBJDIR) $($1)
.PHONY: $1
$1: $($1)
$($1): target:=$1
$($1): $($1.objs); $$(if $$(wildcard $$(#D)),,mkdir -p $$(#D) && )$$(add_target.link)
$($1.objs):; $$(if $$(wildcard $$(#D)),,mkdir -p $$(#D) && )$$(add_target.compile)
$(foreach $1.SOURCES,$($1.SOURCES),$(eval $(obj_from_source): $($1.SOURCES)))
$(info end)
endef
void :=
space := $(void) $(void)
obj_from_source = $(addprefix $($1.OBJDIR)/,$(addsuffix .o,$(basename $(notdir $($1.SOURCES)))))
eval_args = $(foreach i,2 3 4 5 6 7 8 9,$(call eval_arg,$1,$(strip $($i))))
eval_arg = $(if $2,$(info $(space)$(space)$1.$2)$(eval $1.$2))
# Link command line
add_target.link_binary = $(CC) $($(target).LDFLAGS) -o $# $^
add_target.link_lib = $(AR) rcs $# $^
add_target.link = $(add_target.link_$($(target).TYPE))
# Compile command line
add_target.compile = $(CC) -c -o $# $($(target).CFLAGS) $<
# -- Directories --
SRC_ROOT := ./src
BIN := ./bin
# Add 'math' target to the project
$(eval $(call add_target,math,\
TYPE := lib,\
TARGET := $(BIN)/math.a,\
SOURCES += ${SRC_ROOT}/math/addition/add.c\
${SRC_ROOT}/math/subtraction/sub.c\
${SRC_ROOT}/math/math.c,\
CFLAGS := -Wall -I./$(SRC_ROOT)/math,\
))
all: ${PHONY_TARGETS}
.PHONY: all
clean: | $(CLEAN_TARGETS)
.PHONY: clean
Directory structure:
$ find
.
./Makefile
./src
./src/math
./src/math/addition
./src/math/addition/add.c
./src/math/addition/add.h
./src/math/math.c
./src/math/subtraction
./src/math/subtraction/sub.c
./src/math/subtraction/sub.h
File contents:
$ find src/ -type f -exec sh -c "echo Contents of {} file:; cat {}; echo" \;
Contents of src/math/addition/add.c file:
int add(int a, int b) {return a + b;}
Contents of src/math/addition/add.h file:
int add(int a, int b);
Contents of src/math/math.c file:
#include "addition/add.h"
#include "subtraction/sub.h"
Contents of src/math/subtraction/sub.c file:
int add(int a, int b) {return a - b;}
Contents of src/math/subtraction/sub.h file:
int add(int a, int b);
Running Makefile:
$ make
add_target(math)
math.TYPE := lib
math.TARGET := ./bin/math.a
math.SOURCES += ./src/math/addition/add.c ./src/math/subtraction/sub.c ./src/math/math.c
math.CFLAGS := -Wall -I././src/math
math.OBJDIR := ./objs/math
math.TYPE := lib
math.objs := ./objs/math/add.o ./objs/math/sub.o ./objs/math/math.o
end
mkdir -p objs/math && cc -c -o objs/math/add.o -Wall -I././src/math src/math/addition/add.c
cc -c -o objs/math/sub.o -Wall -I././src/math src/math/subtraction/sub.c
cc -c -o objs/math/math.o -Wall -I././src/math src/math/math.c
mkdir -p bin && ar rcs bin/math.a objs/math/add.o objs/math/sub.o objs/math/math.o
This general purpose makefile is missing some important features, like tracking .h file dependencies, linking with static/dynamic libraries, etc. Extend it with the features you need yourself.