Makefile: "undefined reference to cos" - c

I have just started learning about makefile files. I created a program that consists of two functions and wanted to use a makefile to put it all together. This is my file:
#Makefile
all: main
main: main.o find_root.o
clang -o main main.o find_root.o
main.o: main.c
clang -c -Wall --pedantic -std=c11 main.c -lm
find_root.o: find_root.c
clang -c -Wall --pedantic -std=c11 find_root.c -lm
clean: rm -f main *.o*
However, when I run this, I get an error - "undefined reference to cos". I am using the cosine functions in my program, but I have already linked the library to the compilation of those two files. I thought about adding "-lm" to the first clang option as well. This led to no errors, but it made a warning instead - saying that "-lm linker is unused". What should I change in my file?

The "-lm" is a linker option but you have only included it in your compilation rule (main.o: main.c). You need to include it in your linker rule (main: main.o find_root.o).
As it stand the -lm option is ignored during compilation and missing during linking.

The linker flags aren't used when compiling, but when linking, so the command for the main rule should have -lm, rather than the command for the *.o files.
Better would be just to set the appropriate variables, and let Make use its built-in rules:
#Makefile
LDLIBS += -lm
CFLAGS += -Wall --pedantic -std=c11
C = clang
all: main
main: main.o find_root.o
$(LINK.c) $^ $(LDLIBS) -o $#
clean:
$(RM) main *.o *~

Related

Undefined reference when using ta-lib/ta_lib.h file and Makefile

I want to use the ta_lib functions in my C code and am trying to import the ta_lib functions. The header file gets imported correctly but i cannot get the linker to find the actual library.
I want to do the compiling process with MAKE and gcc.
Firstly I import the header
#include <ta-lib/ta_libc.h>
And then when i need to use a function
TA_ADOSC(0, CSV_LENGTH - 1, temp_high, temp_low, temp_close, temp_volume, 3, 10, &beginIdx, &endIdx, tmp_adosc);
The program compiles fine using my makefile
# create CC variable
CC = gcc
# create CFLAGS variable
CFLAGS = -L/usr/local/lib -Wall -g
LDLIBS = -lta_lib -I/usr/local/include -lm
output: main.o
$(CC) $(CFLAGS) -o output main.o
main.o: main.c
$(CC) $(LDLIBS) -c main.c
# target: dependencies
# action
clean:
rm -f \*.o output
Once I try to run make i get the following
gcc -L/usr/local/lib -Wall -g -o output main.o
/usr/bin/ld: main.o: in function `calculate_indicators': main.c:(.text+0x226): undefined reference to `TA_ADOSC'
collect2: error: ld returned 1 exit status
make: \*\*\* \[Makefile:10: output\] Error 1
From my understanding I need to fix the linking to the shared library.
The library is installed:
ldconfig -p | grep libta_lib.so
Returns the following
libta_lib.so.0 (libc6,x86-64) => /usr/local/lib/libta_lib.so.0
libta_lib.so.0 (libc6,x86-64) => /lib/libta_lib.so.0
libta_lib.so (libc6,x86-64) => /usr/local/lib/libta_lib.so
libta_lib.so (libc6,x86-64) => /lib/libta_lib.so
Since i am fairly new to C and using external libraries I can't find what seems to be the problem
You are adding the libraries to the compile line. They need to be added to the link line. And preprocessor options like -I are used by the compiler, and "where to find libraries" options like -L are used by the linker.
Also, libraries always must come at the end of the link line, after all the object files. And, the -L "where to search" option should come before the -l "what library to find" option.
Write your rules like this:
CFLAGS = -I/usr/local/include -Wall -g
LDFLAGS = -L/usr/local/lib
LDLIBS = -lta_lib -lm
output: main.o
$(CC) $(CFLAGS) $(LDFLAGS) -o output main.o $(LDLIBS)
main.o: main.c
$(CC) $(CFLAGS) -c main.c
However, it's better to just let make do the work for you; it knows how to correctly compile things (as long as you set the standard variables). You don't need to include a rule to build main.o at all.

Error in compling and linking static library with c program using make and gcc

I wrote an implementation of several functions spread across multiple c files and those functions are declared in single header file along with several structures and preprocessors. I have been trying to compile them as a library and link it to a program. During make, it raises "undefined reference" error against methods. I referred the links (see below) but they were discuss about the usage of single .c & .h. I followed the advice but the errors still persist.
How to compile a static library in Linux?
"Undefined reference " to a function defined in static library
Undefined reference while linking static C library
I tried to compile them as normal using make and it was successful. The makefile which successfully compiled is given below:
INCLUDES = -I/usr/include
ffilter:
gcc -Wextra -Wall -lm home.c filter.c handlerprocess.c handlerpack.c handlersys.c handlerfile.c handlerpcap.c helper.c -o ffilter $(INCLUDES)
clean:
$(RM) *.o *~ ffilter
Makefile code for compiling and linking the same as library with program, which raise errors, is given below. Would anyone help me to solve this problem.
CC = gcc
CFLAGS = -Wextra -Wall
TARGET = ffilter
all: $(TARGET)
#final output, linking library with main program
$(TARGET): home.o libhandlers.a
$(CC) -o $(TARGET) home.o -L. -lhandlers
#main c program
home.o: home.c home.h
$(CC) $(CFLAGS) -c home.c home.h
#implementation of library
filter.o: filter.h filter.c handlerprocess.c handlerpack.c handlersys.c handlerfile.c handlerpcap.c helper.c
$(CC) $(CFLAGS) -c -O -lm filter.h filter.c handlerprocess.c handlerpack.c handlersys.c handlerfile.c handlerpcap.c helper.c
#creating library
libhandlers.a: filter.o
ar rcs libhandlers.a filter.o
#remove built files
clean:
$(RM) *.o *.a *.gch *~ $(TARGET)

Compiling multiple C and header files with 1 main

[Files in my directory][1]
Need help compiling in a make file.
So I have this link list assignment i'm doing and the directions were.
stringlist.h is supposed to contain the node and the function prototypes
stringlist.c is supposed to have the functions completed that are defined in stringlist.h. BUT stringlist.c is not supposed to contain main at all. Then, namelist.c is supposed to contain main and just have the I/O and its just supposed to call the command functions that are in stringlist.c.
So to compile this we are supposed to create a make file. Whenever I try to I get an error because main doesn't exit in one of the c files. Throughout the term we compiled code like this "gcc -std=gnu99 -m32 -Wall -g -o file file.c"
But it doesn't work.
How would I create the make file? Been spending hours and can't figure it out.
As stated by Jonathan Leffler, the sample Makefile I provided had a few bad ideas. Here's an improvement:
# compiler:
CC = gcc
# compiler flags:
CFLAGS = -g -Wall
# the build target executable:
TARGET = executable
# object files to build:
OBJ = namelist.o stringlist.o
all: $(TARGET)
$(TARGET): $(OBJ)
$(CC) $(CFLAGS) -o $(TARGET) $(OBJ)
Try this:
OBJ := namelist.c stringlist.c
GCC := gcc -g
CFLAGS := -std=gnu99 -m32 -Wall
compile: $(OBJ)
$(GCC) $(CFLAGS) $(OBJ) -o executable

Using debugger in MakeFile

I've written an entire program and its makefile, the only trouble is I have to idea how to implement the debugger. I've been looking at similar questions online but to no avail.
Here's my makefile:
# the variable CC is the compiler to use.
CC=gcc
# the variable CFLAGS is compiler options.
CFLAGS=-c -Wall
assign4: main1.o ObjectManager.o
$(CC) main1.o ObjectManager.o -o assign4
main1.o: main1.c ObjectManager.h
$(CC) $(CFLAGS) main1.c
ObjectManager.o: ObjectManager.c ObjectManager.h
$(CC) $(CFLAGS) ObjectManager.c
clean:
rm -rf *o assign4
I've tried to adjust the CFLAGS: to -g Wall, but all it says is:
Undefined symbols for architecture x86_64:
"_main", referenced from:
implicit entry/start for main executable
ld: symbol(s) not found for architecture x86_64
clang: error: linker command failed with exit code 1 (use -v to see invocation)
make: *** [ObjectManager.o] Error 1
Any suggestions to fix this?
Look at this rule:
ObjectManager.o: ...
$(CC) $(CFLAGS) ObjectManager.c
If CFLAGS is -c -Wall, that -c means that gcc will compile the source file, but not attempt to link it. This is exactly what was intended, to produce an object file and not an executable. One consequence of this is that the source dile (ObjectManager.c) need not contain a main function-- the compiler trusts you to provide one at link time.
But if CFLAGS is -g -Wall, the -g does not imply -c. So gcc will attempt to create an executable, and abort if main is not present.
Solution:
CFLAGS := -Wall -g # the -g can be added with a conditional if you like
ObjectManager.o: ...
$(CC) $(CFLAGS) -c ObjectManager.c

Compiling to 32-bit using make

I am trying to compile a very simple program using the -m32 flag.
If I try to do this using gcc -m32 it works just fine(I have the needed libs)
Yet, when I add this flag to my flags in a makefile, I get a weird error
This is the makefile that I have
CC=gcc
CFLAGS=-m32 -O1 -W -Wall -pedantic -std=c99
all: main.o
$(CC) -o main main.o
rm main.o
clean:
rm main
The error that I receive is the following
gcc -o main main.o
/usr/bin/ld: i386 architecture of input file `main.o' is incompatible with i386:x86-64 output
collect2: ld returned 1 exit status
make: *** [all] Error 1
Can someone please tell me what does this mean? and how can I fix it?
As for the code, the code does NOTHING except printing 'hello world'
I am using GCC 4.4.3 under Linux 2.6.35 64-bits
Your mistake is that you don't pass -m32 to the linker.
You actually need to change your Makefile to look like this:
CC=gcc
CFLAGS=-m32 -O1 -W -Wall -pedantic -std=c99
LDFLAGS = -m32
all: main.o
$(CC) $(LDFLAGS) -o main main.o
rm main.o
clean:
rm main
An even better approach would be the following Makefile:
CC=gcc
CFLAGS=-m32 -O1 -W -Wall -pedantic -std=c99
LDFLAGS=-m32
.INTERMEDIATE: main.o
all: main
main: main.o
clean:
-rm main
In the later you just say that main depends on main.o and GNU Make will invoke the linker with the LDFLAGS as arguments for you as it invokes the compiler with the CFLAGS as arguments for the main.o
"The targets which .INTERMEDIATE depends on are treated as intermediate files. See section Chains of Implicit Rules. .INTERMEDIATE with no dependencies marks all file targets mentioned in the makefile as intermediate." Special Built-in Target Names
You should inform the linker as well about the architecture being 32-bit. Try adding
LD = $(CC)
LDFLAGS = -m32
to your Makefile and change
$(CC) -o main main.o
to
$(LD) $(LDFLAGS) -o main $^
and it shoud work.
(Why it worked? If you use GCC to compile and link your code in one step, all the relevant flags and options will be passed down not only to the compiler but to the linker as well.)

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