As pleased i recreated this Question to give my actual example:
My Problem is, when httpd-fsdata-erw.h is missing at the very first build the rule httpd-fsdata-erw.h:: creates it for me and erverything works fine.
If i touch httpd-fsdata-erw.h make recognised it and is building sourcefile1.o, sourcefile2.o and everything else neede again. Wonderful!
But when i delete httpd-fsdata-erw.h it. Make is checking the prerequisites and does nothing because it said "nothing to be done" although httpd-fsdata-erw.h is missing.
Now when i touch sourcefile2.h make can't find a rule to make target httpd-fsdata-erw.h.
MAYBE i mixed up some error-messages
I can fix it with the .PONY:-target, but as you know every turn it will rebuild most of the stuff.
File-Overview:
extension
|
|-- Makefile
|--(httpd-fsdata-erw.h) (created by perl
|--(httpd-fsdata-erw.c) (created by perl)
|--(httpd-fsdata-erw.o)
|-- ext.o
|-- ext.bin
TOPDIR-- Makefile
|-- obj_dir
| |--sourcefile1.o
| |--sourcefile1.d
| |--sourcefile2.o
| |--sourcefile2.d
| |--...
|
|-- app
| |
| |--sourcefile1.c (needs httpd-fsdata-erw.h)
| |--sourcefile2.c
| |--sourcefile2.h (needs httpd-fsdata-erw.h)
| |--sourcefile3.c
| |--sourcefile4.c
| |
| |--appskt
| | |--webserver
| | | |-- Makefile
| | | |...
| | | |--fsdata
| | | |--index.html
| | | |--somejavascript.js
| | |
| | |
| | |--shell
| | | |...
| | |--crypto
| | | |...
| | |--ftp
| | | |...
| | |
|
|
|-- contiki
| |--Makefile.include
|
|
|
|-- plattform
| |-- cpu
| | |-- Makefile.r7s7210
| | |
| | |
The Makefile in directory=webserver creates with a perl-script httpd-fsdata-erw.h .c and .o to the extension-folder with the rule
HTTPD_FSDATA_ERW_FILES=httpd-fsdata-erw.c httpd-fsdata-erw.h
$(HTTPD_FSDATA_ERW_FILES): $(PATH_WEBSERVER)/index.html $(PATH_WEBSERVER)/somejavascript.js
perl makefsdata -d $(HT....
web_content: $(HTTPD_FSDATA_ERW_FILES)
TOPDIR-- Makefile:
include $(CONTIKI)/Makefile.include
all: project.bin
project.bin: $(somestuff1) $(somestuff2) $(TARGET_PATH)/$(CONTIKI_PROJECT).$(TARGET)
#cmd .... nothing important, just a windows batch-file
|-- contiki--Makefile.include:
-include $(PATH_...)/Makefile.r7s7210
-include ${addprefix $(OBJECTDIR)/,$(CONTIKI_SOURCEFILES:.c=.d) \
$(PROJECT_SOURCEFILES:.c=.d)}
#.PHONY: httpd-fsdata-erw.h
httpd-fsdata-erw.h::
#$(MAKE) -j1 $(EXT_BIN) -C $(EXT_PATH) -f Makefile
$(TARGET_PATH)/%.$(TARGET): %.co $(PROJECT_OBJECTFILES) $(PROJECT_LIBRARIES) contiki-$(TARGET).a
some linking stuff
|-- plattform -- cpu -- Makefile.r7s7210:
$(OBJECTDIR)/%.o: %.c | $(OBJECTDIR):
...
$(CC) $(CFLAGS) $(IAR_INCLUDES) ... $< --dependencies=n $(#:.o=.d) -o $#)
But when i delete the "missing.h"-file after the very first build, make is unable to find a target.
Is this because of the structure of the .d-file?
It is.
To fix that, use -MP gcc command line switch when generating the .d file:
-MP This option instructs CPP to add a phony target for each dependency
other than the main file, causing each to depend on nothing. These
dummy rules work around errors make gives if you remove header
files without updating the Makefile to match. This is typical output:
test.o: test.c test.h
test.h:
Related
When I build my project a static library .a file is created (libtest.a).
How can I use this library in other projects?
Folder structure:
|--lib
| |--test
| | |- test.c
| | |- test.h
|
|- platform.ini
|
|--src
| |- main.c
|
|--.pio
| |--build
| | |--genericSTM32F103RB
| | | |--lib704
| | | | |- libtest.a
Is it possible to use libtest.a in other projects and have the same functions?
i have a C project , all source file (C and H files)in src directory , have lots of subdirectories
now I want to
1 copy all h files to .\header, without folder struct
2 complier all c files to .\obj, without folder stuct
3 myproject.exe in .\bin
D:\myproject
+---bin
+---header
+---obj
\---src
| main.c
| main.h
|
+---sub1
| | 1.c
| | 1.h
| |
| \---sub11
| | 11.c
| | 11.h
| |
| \---sub111
| 111.c
| 111.h
|
\---sub2
| 2.c
| 2.h
|
\---sub22
| 22.c
| 22.h
|
\---sub221
221.c
221.h
the expected output as follows:
D:.
+---bin
| myproject.exe
|
+---header
| 1.h
| 11.h
| 111.h
| 2.h
| 22.h
| 221.h
| main.h
|
+---obj
| 1.o
| 11.o
| 111.o
| 2.o
| 22.o
| 221.o
| main.o
|
\---src
| main.c
|
+---sub1
| | 1.c
| | 1.h
| |
| \---sub11
| | 11.c
| | 11.h
| |
| \---sub111
| 111.c
| 111.h
|
\---sub2
| 2.c
| 2.h
|
\---sub22
| 22.c
| 22.h
|
\---sub221
221.c
221.h
the follows posts give a good reference , but this post can not support if the source in multiple directory , all obj files is in the same directory as c file
Makefile : Automatically compile all c files, keeping .o files in separate folder
How can I create a Makefile for C projects with SRC, OBJ, and BIN subdirectories?
can any give some example makefile?
First we construct a list of the sources in the tree:
SRCDIR := src
SOURCES := $(shell find $(SRCDIR) -name "*.c")
Then use that to construct a list of the object files we want:
OBJDIR := obj
OBJECTS := $(patsubst %.c,$(OBJDIR)/%.o,$(notdir $(SOURCES)))
If all the source files were in the working directory, we could use a simple static pattern rule:
$(OBJECTS): $(OBJDIR)/%.o: %.c
blah blah building $# from $<
And to get that to work when the sources are in different directories, all we need is the vpath directive:
SRCDIRS := $(dir $(SOURCES))
vpath %.c $(SRCDIRS)
Now for the headers. To steer the compiler toward the directories containing the headers, we could construct a string of -I flags in one line or we could copy all of the headers into header/ as follows.
To keep all of the headers up to date, and not copy them unnecessarily, we must treat them as targets. First we make a list of them, as we did with the objects:
HEADERS := $(shell find $(SRCDIR) -name "*.h")
HEADERDIR := header
HEADERTARGS := $(addprefix $(HEADERDIR)/,$(notdir $(HEADERS)))
Then we write a static pattern rule, just as we did for the objects:
$(HEADERTARGS): $(HEADERDIR)/%.h: %.h
cp $< $#
vpath %.h $(SRCDIRS)
And finally add the headers as prerequisites of the objects:
$(OBJECTS): $(OBJDIR)/%.o: %.c $(HEADERTARGS)
...
This is slightly inefficient, as it will rebuild all objects if even one header has changed, but to correct that shortcoming would require a more complex makefile.
You want to put a Makefile in each subdirectory where you want to compile some source. And put a Makefile in your project root directory. In your root Makefile, do this:
ALL : make1 make2 ... maken mv_obj
make1 :; make -C src/sub1
...
mv_obj :; mv `find . -name "*.o"` obj/
Alternatively, you can specify where to save your .o file in each Makefile in your subdirectory. E.g.
gcc -o ../../obj/foo.o 1.c
I have following project structure:
Project
|-include
| |-somedir
| | |-someheader.h
|-src
| |-somedir
| | |-somesource.c
| | |-CMakeLists.txt
| |-main.c
| |-CMakeLists.txt
|-lib
| |-somelib
| | |-include
| | | |-somelibheader.h
| | |-src
| | | |-somelibsource.c
| | | |-CMakeLists.txt
| | |-CMakeLists.txt
| |-CMakeLists.txt
|-CMakeLists.txt
Project/CMakeLists.txt:
cmake_minimum_required(VERSION 3.13)
set(CMAKE_C_STANDARD 11)
project(Project)
list(APPEND INCLUDES ${CMAKE_SOURCE_DIR}/include) # Contains all headers will be add to target
set(LIBRARIES_ROOT ${CMAKE_SOURCE_DIR}/lib)
set(SOURCES_ROOT ${CMAKE_SOURCE_DIR}/src)
add_subdirectory(${LIBRARIES_ROOT})
add_subdirectory(${SOURCES_ROOT})
Project/src/CMakeLists.txt:
add_executable(${CMAKE_PROJECT_NAME} main.c)
target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE ${INCLUDES}) # adding headers
target_link_libraries(${CMAKE_PROJECT_NAME} ${LIBRARIES}) # linking libraries
add_subdirectory(somedir)
Project/src/somedir/CMakeLists.txt:
target_sources(${CMAKE_PROJECT_NAME} PRIVATE somesource.c)
Project/lib/CMakeLists.txt:
add_subdirectory(somelib)
Project/lib/somelib/CMakeLists.txt:
add_library(somelib)
target_include_directories(somelib PRIVATE include)
list(APPEND INCLUDES include) # Adding lib headers to be included to target
list(APPEND LIBRARIES somelib) # Adding lib to be linked to target
add_subdirectory(src)
Project/lib/somelib/src/CMakeLists.txt:
target_sources(somelib PRIVATE somelibsource.c)
In main.c project headers are able to be included, like #include <somedir/someheader.h>, but library header doesn't. It requires relative to main.c path, like #include "../lib/somelib/include/somelibheader.h". How to fix it and add library headers to common scope?
How can i map the value's I got from the column name into an array that i can later use in my bash script?
+------------------------------+----------+-----------+---------+
| name | status | update | version |
+------------------------------+----------+-----------+---------+
| enable-jquery-migrate-helper | inactive | none | 1.0.1 |
| gravityforms | inactive | none | 2.4.17 |
| gutenberg | inactive | none | 8.8.0 |
| redirection | inactive | none | 4.8 |
| regenerate-thumbnails | inactive | none | 3.1.3 |
| safe-svg | inactive | none | 1.9.9 |
| weglot | inactive | none | 3.1.9 |
| wordpress-seo | inactive | available | 14.8 |
+------------------------------+----------+-----------+---------+
I already tried the following, but this would only save the name of the headers in the table:
IFS=$'\n' read -r -d '' -a my_array < <( wp plugin list --status=inactive --skip-plugins && printf '\0' )
echo $my_array
name status update version
After I have retrieved the value's I want to loop over them to add them to an array
Better use the CSV output format rather than the default table format if your intent is mapping the result with a shell or awk script:
wp plugin list --status=inactive --skip-plugins --format=csv
which would output this:
name,status,update,version
enable-jquery-migrate-helper,inactive,none,1.0.1
gravityforms,inactive,none,2.4.17
gutenberg,inactive,none,8.8.0
redirection,inactive,none,4.8
regenerate-thumbnails,inactive none,3.1.3
safe-svg,inactive,none,1.9.9
weglot,inactive,none,3.1.9
wordpress-seo,inactive,available,14.8
I have a project structured like so
project
|
|__build
|
|
|__include
| |
| |
| |__modules
| | |
| | |_module1
| | |
| | |_ foo.h
| |
| |_ bar.h
|
|__src
| |
| |__modules
| | |
| | |_module1
| | |
| | |_ foo.c
| |
| |__main.c
|
|__Makefile
And my current Makefile is
CC = gcc
CFLAGS = -std=gnu11 -O3 -Wall -Wextra -Wpedantic -Wstrict-aliasing
LDFLAGS = -lpthread
INC = include/
BLD = build
SRC = src
define cc-command
$(CC) $(CFLAGS) -I $(INC) $< -o $#
endef
enter code here
all: main
main: build/main.o
$(CC) -o $# $^ $(LDFLAGS)
$(BLD)/%.o: $(SRC)/%.c
$(cc-command)
And my main.c has a bit saying
#include "modules/module1/foo.h"
// Other things
int main()
{
foo_function(); // Defined in foo.c, declared in foo.h
// The other things...
When I run make, it returns "undefined reference to 'foo_function'"
I feel like my rule for building the .o files is wrong, but I don't know in what way. I'd really appreciate getting a bit of a nudge in the right direction on it. Maybe I need a separate rule for building each module's .o files, and a rule for building main.o?