I have a code below and I need to compile it. However, I can not run the Makefile on my computer
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
int
simple_init(void)
{
printk("Loading module\n");
return 0;
}
void
simple_exit(void)
{
printk("Removing module\n");
}
module_init(simple_init);
module_exit(simple_exit);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Simple Module");
Makefile:
obj-m := simple.o
KDIR := /lib/modules/$(shell uname -r)/build
PWD := $(shell pwd)
default:
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) clean
The problem is that: When I type Make in the terminal the following error occurs:
make -C /lib/modules/4.4.0-75-generic/build
SUBDIRS=/home/caiquefortunato/Área de Trabalho/kernel modules
make[1]: Entering directory '/usr/src/linux-headers-4.4.0-75-generic'
arch/x86/Makefile:148: CONFIG_X86_X32 enabled but no binutils support
Makefile:693: Cannot use CONFIG_CC_STACKPROTECTOR_STRONG: -fstack-
protector-strong not supported by compiler
make[1]: *** No rule to make target 'de'. Pare.
make[1]: Leaving directory '/usr/src/linux-headers-4.4.0-75-generic'
Makefile:19: recipe for target 'default' failed
make: *** [default] Error 2
What do I have to do to make it work? Do I need to install something?
Thank you very much in advance
There are a few causes of the CONFIG_X86_X32 enabled but no binutils support error.
1) spaces in the compilation directory <== this is is you
2) binutils not installed
3) attempting to compile root-owned kernel source directory with unprivileged user
Related
I'm trying to compile a simple kernel module for the first time:
#include <linux/module.h>
#include <linux/kernel.h>
int init_nodule(void)
{
printk(KERN_INFO "Hello world1.\n");
return 0;
}
void cleanup_module(void)
{
printk(KERN_INFO "Goodbye\n");
}
I've used obj-m += hello-1.o (that's the name of the module) but i'm getting an error:
obj−m: command not found
Why is this happening? I tried looking online for a solution, but nothing I found helped..
EDIT: After modifying based on #Mathieu answer , I get the following error :
> make -C /lib/modules/4.18.0-15-generic/build M=/home/galco modules
make[1]: Entering directory '/usr/src/linux-headers-4.18.0-15-generic'
Makefile:970: "Cannot use CONFIG_STACK_VALIDATION=y, please install libelf-dev, libelf-devel or elfutils-libelf-devel"
scripts/Makefile.build:45: /home/galco/Makefile: No such file or directory
make[2]: *** No rule to make target '/home/galco/Makefile'. Stop.
Makefile:1534: recipe for target '_module_/home/galco' failed
make[1]: *** [_module_/home/galco] Error 2
make[1]: Leaving directory '/usr/src/linux-headers-4.18.0-15-generic'
makefile:4: recipe for target 'all' failed
make: *** [all] Error 2
The line obj-m += hello-1.o must be put in a file named Makefile
So it will looks like:
obj-m += hello-1.o
all:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
To launch the build process, just execute make from your command line.
More resource: https://qnaplus.com/how-to-compile-linux-kernel-module/
I'm trying to build a kernel module. I'm on fedora 25
Here is my Makefile:
obj-m += simple.o
all:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
This is the simple.c file:
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
/* This function is called when the module is loaded. */
int simple_init(void)
{
printk(KERN_INFO "Loading Module\n");
return 0;
}
/* This function is called when the module is removed. */
void simple_exit(void) {
printk(KERN_INFO "Removing Module\n");
}
/* Macros for registering module entry and exit points. */
module_init( simple_init );
module_exit( simple_exit );
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Simple Module");
MODULE_AUTHOR("SGG");
The error I'm getting after using the make command:
make -C /lib/modules/4.11.3-202.fc25.x86_64/build M=/home/nubian/Downloads/ch02/ch2 modules
make[1]: *** /lib/modules/4.11.3-202.fc25.x86_64/build: No such file or directory. Stop.
Makefile:7: recipe for target 'default' failed
make: *** [default] Error 2
You should always use $(MAKE) never make when you invoke a recursive make. However that's not your problem.
Your problem is that you don't have the module build environment for your currently-running kernel installed. If you install it, it will create the directories you need to build modules for your kernel.
See, for example, the yum install command on this page.
I am on Linux Ubuntu 14.04. I want to start Linux Kernel Module Programming. I have hello.c (simple Hello World module) and Makefile. But, on "make" command, I get error.
I tried Cannot use CONFIG_CC_STACKPROTECTOR_STRONG: -fstack-protector-strong not supported by compiler , but it did not work for me.
hello.c
/* hello.c − Illustrating the __init, __initdata and __exit macros. */
#include <linux/module.h>
/* Needed by all modules */
#include <linux/kernel.h>
/* Needed for KERN_INFO */
#include <linux/init.h>
/* Needed for the macros */
static int hello3_data __initdata = 3;
static int __init hello_3_init(void)
{
printk(KERN_INFO "Hello, world %d\n", hello3_data);
return 0;
}
static void __exit hello_3_exit(void)
{
printk(KERN_INFO "Goodbye, world 3\n");
}
module_init(hello_3_init);
module_exit(hello_3_exit);
Makefile
obj-m += hello.o
all:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
On "make" :-
k#k-Inspiron-3542:~/Kernel programs$ make
make -C /lib/modules/4.2.0-27-generic/build M=/home/k/Kernel programs modules
make[1]: Entering directory `/usr/src/linux-headers-4.2.0-27-generic'
arch/x86/Makefile:138: CONFIG_X86_X32 enabled but no binutils support
Makefile:662: Cannot use CONFIG_CC_STACKPROTECTOR_REGULAR: -fstack-protector not supported by compiler
make[1]: *** No rule to make target `programs'. Stop.
make[1]: Leaving directory `/usr/src/linux-headers-4.2.0-27-generic'
make: *** [all] Error 2
Currently, my ubuntu has 4.2 kernel. I even tried this on 3.x kernel, but there was this same error.
Please help me in this. Thanks. :)
I had searched a lot before asking this question, but no solution worked for me. I continued my search and finally, this solution worked for me. https://askubuntu.com/questions/367838/compiling-error-while-installing-realtek-rtl8111e-in-64-bit-13-10-config-x86-x
Strangely, there should be no space(s) in the directory name in which kernel modules are there. So, I removed the space and it worked.
Hope it will help someone in future. :)
Your file works OK here. With your Makefile, and with the default Makefile:
obj-m := hello.o
KDIR := /lib/modules/$(shell uname -r)/build
PWD := $(shell pwd)
default:
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) M=$(PWD) clean
The files hello.ko, hello.mod.c, hello.mod.o, hello.o, modules.order, Module.symvers are created. May be install this: sudo apt install g++ binutils-dev
If you don't have spaces in your compile directory and you're still getting this error, your kernel compilation may be failing because its directory belongs to root and you're running as an unprivileged user. Try sudo make
I wish to run this kernel module
code file hello.c
#include <linux/module.h>
#include <linux/kernel.h>
int init_module(void) {
printk(KERN_INFO "Hello world!\n");
return 0;
}
void cleanup_module(void) {
printk(KERN_INFO "Goodbye world!\n");
}
i ran the makefile below
obj-m += hello.o
all:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
but I am getting the following errors
make -C /lib/modules/4.4.0-45-generic/build M=/home/fyousry/Desktop/Untitled Folder 4 modules
make[1]: Entering directory '/usr/src/linux-headers-4.4.0-45-generic'
arch/x86/Makefile:148: CONFIG_X86_X32 enabled but no binutils support
Makefile:676: Cannot use CONFIG_CC_STACKPROTECTOR_STRONG: -fstack-protector-strong not supported by compiler
make[1]: *** No rule to make target 'Folder'. Stop.
make[1]: Leaving directory '/usr/src/linux-headers-4.4.0-45-generic'
Makefile:3: recipe for target 'all' failed
make: *** [all] Error 2
the directory which Contain this code has space
when i removed space it is work (UntitledFolder4 instead of Untitled Folder 4)
You should use double quotes when you give a path to a command, especially if the path is contain a sub-command or a variable.
Example:
make -C "/lib/modules/$(shell uname -r)/build" "M=$(PWD)" modules
You can also escape the space if you want to keep it spaced :
make -C /lib/modules/4.4.0-45-generic/build M=/home/fyousry/Desktop/Untitled\ Folder\ 4 modules
I am trying to compile a Linux kernel module using the standard example Makefile specified in the Linux Kernel Module Programming Guide. If the Makefile is called Makefile, then everything works. If I rename the Makefile to Makefile.hello or something else, then it fails as it cannot find the path Makefile. I was wondering if there is a command or set of flags I can add to my Makefile to make this function properly. I need to rename the Makefile as I am calling it from CMake. Cmake creates its own Makefiles and will commonly overwrite what I already have.
I replaced my kernel module code with the hello world example and replicated the problem. I know its the makefile.
hello world example hello.c
/*
* hello−1.c − The simplest kernel module.
*/
#include <linux/module.h> /* Needed by all modules */
#include <linux/kernel.h> /* Needed for KERN_INFO */
int init_module(void)
{
printk(KERN_INFO "Hello world 1.\n");
/*
* A non 0 return means init_module failed; module can't be loaded.
*/
return 0;
}
void cleanup_module(void)
{
printk(KERN_INFO "Goodbye world 1.\n");
}
Makefile
obj-m += hello.o
ifeq (,$(KDIR))
KDIR := /lib/modules/$(shell uname -r)/build
endif
PWD := $(shell pwd)
all:
$(MAKE) -C $(KDIR) M=$(PWD) $(KCONFIG) modules
clean:
$(MAKE) -C $(KDIR) M=$(PWD) clean
If makefile is called Makefile. (Successfully builds)
$> make -f Makefile
make -C /lib/modules/4.4.0-21-generic/build M=/home/msmith/Desktop/kernel-test modules
make[1]: Entering directory '/usr/src/linux-headers-4.4.0-21-generic'
CC [M] /home/msmith/Desktop/kernel-test/hello.o
Building modules, stage 2.
MODPOST 1 modules
CC /home/msmith/Desktop/kernel-test/hello.mod.o
LD [M] /home/msmith/Desktop/kernel-test/hello.ko
make[1]: Leaving directory '/usr/src/linux-headers-4.4.0-21-generic'
Make output if makefile is called Makefile.hello (Fails to build)
$> make -f Makefile.hello
make -C /lib/modules/4.4.0-21-generic/build M=/home/msmith/Desktop/kernel-test modules
make[1]: Entering directory '/usr/src/linux-headers-4.4.0-21-generic'
scripts/Makefile.build:44: /home/msmith/Desktop/kernel-test/Makefile: No such file or directory
make[2]: *** No rule to make target '/home/msmith/Desktop/kernel-test/Makefile'. Stop.
Makefile:1396: recipe for target '_module_/home/msmith/Desktop/kernel-test' failed
make[1]: *** [_module_/home/msmith/Desktop/kernel-test] Error 2
make[1]: Leaving directory '/usr/src/linux-headers-4.4.0-21-generic'
Makefile.hello:10: recipe for target 'all' failed
make: *** [all] Error 2
I tried adding the -f to the internal MAKE parameters, however that just caused more issues.
Move all Kbuild-related logic into the file Kbuild. Kernel's build system checks file with this name first, so it won't look into Makefile, created by CMake. This feature is documented in Documentation/kbuild/makefiles.txt.
I use exactly this approach in my CMake projects, related with Linux kernel.
Open script/Makefile.build into kernel tree:
41 # The filename Kbuild has precedence over Makefile
42 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44 include $(kbuild-file)
This part of code (43-44) include Makefile with name 'Makefile'.
The default Makefile. Name = Makefile ... and Makefile-hello, or Makefile.hello.
obj-m := hello.o
KDIR := /lib/modules/$(shell uname -r)/build
PWD := $(shell pwd)
default:
$(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules
clean:
$(MAKE) -C $(KDIR) M=$(PWD) clean
$ make : OK
$ make -f Makefile-hello OK
$ make -f Makefile.hello Also OK.
Your Makefile : $ make -f Makefile.msmith OK, no errors.