Sleep mode(PIC 18f46j50) with internal oscilator - c

Question

I am programming my PIC and i am trying to put it in the deep sleep mode.
I want use Deep Sleep function and the wake up event should be created by WDT interupt. But my problem is, that it is impossible to reach the interrupt. Device will continue sleeping.
#include <xc.h>
// 'C' source line config statements
// CONFIG1L
#pragma config WDTEN = ON // Watchdog Timer (Enabled)
#pragma config PLLDIV = 1 // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config STVREN = ON // Stack Overflow/Underflow Reset (Enabled)
#pragma config XINST = OFF // Extended Instruction Set (Enabled)
// CONFIG1H
#pragma config CPUDIV = OSC1 // CPU System Clock Postscaler (No CPU system clock divide)
#pragma config CP0 = OFF // Code Protect (Program memory is not code-protected)
// CONFIG2L
#pragma config OSC = HS // Oscillator (HS, USB-HS)
#pragma config T1DIG = ON // T1OSCEN Enforcement (Secondary Oscillator clock source may be selected)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator (High-power operation)
#pragma config FCMEN = ON // Fail-Safe Clock Monitor (Enabled)
#pragma config IESO = ON // Internal External Oscillator Switch Over Mode (Enabled)
// CONFIG2H
#pragma config WDTPS = 32768 // Watchdog Postscaler (1:32768)
// CONFIG3L
#pragma config DSWDTOSC = INTOSCREF// DSWDT Clock Select (DSWDT uses INTRC)
#pragma config RTCOSC = INTOSCREF// RTCC Clock Select (RTCC uses INTRC)
#pragma config DSBOREN = ON // Deep Sleep BOR (Enabled)
#pragma config DSWDTEN = ON // Deep Sleep Watchdog Timer (Enabled)
#pragma config DSWDTPS = 8192 // Deep Sleep Watchdog Postscaler (1:8,192 (8.5 seconds))
// CONFIG3H
#pragma config IOL1WAY = ON // IOLOCK One-Way Set Enable bit (The IOLOCK bit (PPSCON<0>) can be set once)
#pragma config MSSP7B_EN = MSK7 // MSSP address masking (7 Bit address masking mode)
// CONFIG4L
#pragma config WPFP = PAGE_63 // Write/Erase Protect Page Start/End Location (Write Protect Program Flash Page 63)
#pragma config WPEND = PAGE_WPFP// Write/Erase Protect Region Select (valid when WPDIS = 0) (Page WPFP<5:0> through Configuration Words erase/write protected)
#pragma config WPCFG = OFF // Write/Erase Protect Configuration Region (Configuration Words page not erase/write-protected)
// CONFIG4H
#pragma config WPDIS = OFF // Write Protect Disable bit (WPFP<5:0>/WPEND region ignored)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
void sleep_f()
{
//INTCON &= ~0xF8; /* Disable all interrupt sources */
//INTCON3 &= ~0x38;
PIR2bits.OSCFIF = 1;
//RCONbits.IPEN = 0;
// OSCCON = 0b01110000;
OSCCONbits.IDLEN = 0 ; // 0 Sleep mode a 1 idle mod
//WDTCONbits.SWDTEN = 1; /* Enable the regular Watch Dog Time out too */
WDTCONbits.REGSLP = 0;
//DSCONLbits.DSBOR = 1;
//DSCONHbits.RTCWDIS = 0;
DSCONHbits.DSEN = 0; // We run deep slep
Sleep();
}
void main()
{
TRISD6 = 0;
TRISDbits.TRISD4 = 0;
LATD6 = 1;
int i;
while (1){
LATD4 = 0;
int i;
for (i = 0;i < 10000; i++) asm("nop");
LATD4 = 1; // Blink led if everything is OK.
sleep_f();
DSCONLbits.RELEASE = 0;
WDTCONbits.DS = 0;
for (i = 0;i < 30000; i++) asm("nop");
}
}
Do you have any idea what is wrong with my code ?
I am stacked on it already for 3 days.
I would be grateful for any help.

Answer 1

I'm not sure if you realize that the DSWDT period is set to 8192 and the normal WDT to 32768, which means it takes 8.5 seconds and 2.25 minutes to trigger according to the datasheet. I'd set it to a few seconds instead for debugging. When you're sure it's working increase the WDT to the desired period.
Maybe the delay loops are too short to notice any blinking? Does the led blink without the sleep function?
This line doesn't do anything as this bit is read only.
WDTCONbits.DS = 0;
This line
DSCONHbits.DSEN = 0; // We run deep slep
Should be
DSCONHbits.DSEN = 1; // We run deep sleep
The datasheet states that 1 is deep sleep, 0 is sleep. When your device enters normal sleep, the WDT triggers in 2.25 minutes (post scaler of 32768) instead of the DSWDT 8.5 seconds (DSWDT postscaler of 8192).