Where to use uvm_blocking_put_port and uvm_analysis_port? - uvm

Question

What is the difference between port and analysis port ?
Where to use uvm_blocking_put_port and where to use uvm_analysis_port ?
What is advantage of uvm_analysis_port over uvm_blocking_put_port ?

Answer 1

Port connection is used to connect two independent blocks(components).
Both uvm_blocking_put_port and uvm_analysis_port used to transfer data from producer to consumer.
(1) uvm_blocking_put_port:
Used for data transfer from a single producer to a single consumer.
(2) uvm_analysis_port:
Used for data transfer from a single producer to a single consumer or multiple consumers.
Advantage for this analysis port is that a user can transfer data from a single producer to multiple consumers that is not archived with help of uvm_blocking_put_port.
This thing is also explained in the figure.
Here I provide sample code to get more clarity for uvm_blocking_put_port and uvm_analysis_port.
This image explain use of uvm_blocking_put_port
Remember: Port connection is used to connect two or more independent component.
(1) uvm_blocking_put_port EXAMPLE.
class transaction extends uvm_sequence_item;
`uvm_object_utils(transaction);
rand int unsigned a;
rand int unsigned b;
function new(string name ="");
super.new(name);
endfunction
endclass
class producer extends uvm_component;
`uvm_component_utils(producer);
transaction tr_inst;
uvm_blocking_put_port #(transaction) produce_to_consumer_p;
function new(string name ="",uvm_component parent);
super.new(name,parent);
produce_to_consumer_p = new("produce_to_consumer_p",this);
tr_inst = new("tr_inst");
endfunction
task run_phase(uvm_phase phase) ;
super.run_phase(phase);
phase.raise_objection(this);
//tr_inst.randomize();
`uvm_info(get_full_name(),"Write the data from PRODUCER",UVM_LOW)
tr_inst.a = 10; tr_inst.b = 20;
produce_to_consumer_p.put(tr_inst);
phase.drop_objection(this);
endtask
endclass
class consumer extends uvm_component;
`uvm_component_utils(consumer);
uvm_blocking_put_imp#(transaction,consumer) put_imp;
//transaction tr_inst;
function new(string name ="",uvm_component parent);
super.new(name,parent);
put_imp = new("put_imp",this);
endfunction
function void put(transaction tr_inst);
`uvm_info(get_full_name(),"Got the data in CONSUMER",UVM_LOW);
`uvm_info(get_full_name(),$sformatf("the value of a %0d and b is %0d",tr_inst.a,tr_inst.b),UVM_LOW);
endfunction
endclass
class env extends uvm_component;
`uvm_component_utils(env);
producer p_inst;
consumer c_inst;
function new(string name="",uvm_component parent);
super.new(name,parent);
p_inst = new("p_inst",this);
c_inst = new("c_inst",this);
endfunction
function void connect();
p_inst.produce_to_consumer_p.connect(c_inst.put_imp);
endfunction
endclass
module main();
env env_inst;
initial
begin
env_inst = new("env_inst",null);
run_test();
end
endmodule
This image gives explanation of uvm_analysis_port
(2) uvm_analysis_port EXAMPLE
class transaction extends uvm_sequence_item;
`uvm_object_utils(transaction);
rand int unsigned a;
rand int unsigned b;
function new(string name ="");
super.new(name);
endfunction
endclass
class producer extends uvm_component;
`uvm_component_utils(producer);
transaction tr_inst;
uvm_analysis_port #(transaction) produce_to_consumer_p;
function new(string name ="",uvm_component parent);
super.new(name,parent);
produce_to_consumer_p = new("produce_to_consumer_p",this);
tr_inst = new("tr_inst");
endfunction
task run_phase(uvm_phase phase);
super.run_phase(phase);
phase.raise_objection(this);
// tr_inst.randomize();
`uvm_info(get_full_name(),"Write the data from PRODUCER",UVM_LOW);
tr_inst.a = 10; tr_inst.b = 20;
produce_to_consumer_p.write(tr_inst);
phase.drop_objection(this);
endtask
endclass
class consumer_1 extends uvm_component;
`uvm_component_utils(consumer_1);
uvm_analysis_imp#(transaction,consumer_1) write_imp_1;
function new(string name ="",uvm_component parent);
super.new(name,parent);
write_imp_1 = new("write_imp_1",this);
endfunction
function void write(transaction tr_inst);
`uvm_info(get_full_name(),"Got the data in CONSUMER_1",UVM_LOW);
`uvm_info(get_full_name(),$sformatf("The value of a = %0d and b = %0d",tr_inst.a,tr_inst.b),UVM_LOW);
endfunction
endclass
class consumer_2 extends uvm_component;
`uvm_component_utils(consumer_2);
uvm_analysis_imp#(transaction,consumer_2) write_imp_2;
function new(string name ="",uvm_component parent);
super.new(name,parent);
write_imp_2 = new("write_imp_2",this);
endfunction
function void write(transaction tr_inst);
`uvm_info(get_full_name(),"Got the data in CONSUMER_2",UVM_LOW);
`uvm_info(get_full_name(),$sformatf("The value of a = %0d and b = %0d",tr_inst.a,tr_inst.b),UVM_LOW);
endfunction
endclass
class consumer_3 extends uvm_component;
`uvm_component_utils(consumer_3);
uvm_analysis_imp#(transaction,consumer_3) write_imp_3;
function new(string name ="",uvm_component parent);
super.new(name,parent);
write_imp_3 = new("write_imp_3",this);
endfunction
function void write(transaction tr_inst);
`uvm_info(get_full_name(),"Got the data in CONSUMER_3",UVM_LOW);
`uvm_info(get_full_name(),$sformatf("The value of a = %0d and b = %0d",tr_inst.a,tr_inst.b),UVM_LOW);
endfunction
endclass
class env extends uvm_component;
`uvm_component_utils(env);
producer p_inst;
consumer_1 c_inst_1;
consumer_2 c_inst_2;
consumer_3 c_inst_3;
function new(string name="",uvm_component parent);
super.new(name,parent);
p_inst = new("p_inst",this);
c_inst_1 = new("c_inst_1",this);
c_inst_2 = new("c_inst_2",this);
c_inst_3 = new("c_inst_3",this);
endfunction
function void connect();
p_inst.produce_to_consumer_p.connect(c_inst_1.write_imp_1);
p_inst.produce_to_consumer_p.connect(c_inst_2.write_imp_2);
p_inst.produce_to_consumer_p.connect(c_inst_3.write_imp_3);
endfunction
endclass
module main();
env env_inst;
initial
begin
env_inst = new("env_inst",null);
run_test();
end
endmodule