Unable to link CURL library - c

I am writing a C application using libcurl. I downloaded the libcurl from this link: http://curl.haxx.se/dlwiz/?type=lib&os=Win32&flav=-
I can compile and run the code when I set the path for header and library files in codeblocks. In codeblocks I gave the library path with library libcurldll.a I have kept libcurl.a, libcurl.dll and libcurldll.a in my executable forder. But when I write a makefile for this and give the path, then the code is not linking to curl libraries. I get the message undefined reference to _imp__curl_global_init and so on for all curl functions in code.
Following is my makefile for the code:
OBJS = http.o web_request.o
TARGET = http
INC_PATH = ./include
LIB_PATH= ./libs
CC = gcc
os = windows
CFLAGS = -c -g -I$(INC_PATH)
LDFLAGS = -L$(LIB_PATH)
LIBS = -lpthreadVC2 -lws2_32 -lcurl
$(TARGET): $(OBJS)
$(CC) -o $(TARGET) $(OBJS) $(LDFLAGS) $(LIBS)
http.o: http.c
$(CC) $(CFLAGS) http.c
web_request.o: web_request.c
$(CC) $(CFLAGS) web_request.c
clean:
rm $(TARGET) $(OBJS)
Can anyone please tell what is wrong here? Thanks in advance for your responses.

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Trying to compile the Paho MQTT C example on Raspberry Pi

I am trying to run the Paho MQTT example in C on my raspberry pi: https://www.eclipse.org/paho/clients/c/
I tried just downloading the pre-built binaries and linking to lpaho-mqtt3c
I put that library here: /home/pi/mqtt_C_testing/Eclipse-Paho-MQTT-C-1.3.1-Linux/lib
And I added: LD_LIBRARY_PATH=/home/pi/mqtt_C_testing/Eclipse-Paho-MQTT-C-1.3.1-Linux/lib/
My makefile looks like this:
IDIR = /home/pi/mqtt_C_testing/Eclipse-Paho-MQTT-C-1.3.1-Linux/include
LDIR = /home/pi/mqtt_C_testing/Eclipse-Paho-MQTT-C-1.3.1-Linux/lib
CC = gcc
LD = gcc
CFLAGS = -Wall
LIBS = -lpaho-mqtt3c
PROG_NAME = main
# directories in project
BIN = bin
SRC = src
OBJ = obj
INCLUDE = include
INCLUDES = -I./$(INCLUDE)
all : $(PROG_NAME)
$(PROG_NAME) : $(BIN)/$$#
$(BIN)/% : $(OBJ)/%.o
$(CC) $(CFLAGS) $^ -o $# $(LIBS)
$(BIN)/main : $(addprefix $(OBJ)/, \
main.o)
$(OBJ)/main.o : $(addprefix $(INCLUDE)/, \
MQTTProperties.h MQTTReasonCodes.h MQTTSubscribeOpts.h MQTTClient.h \
MQTTClientPersistence.h MQTTAsync.h)
$(OBJ)/%.o : $(SRC)/%.c
$(CC) $(INCLUDES) $(CFLAGS) -c $< -o $#
.PHONY: clean
clean:
rm -f $(OBJ)/*.o
When I try to build though, gcc cannot find the library:
gcc -Wall obj/main.o -o bin/main -lpaho-mqtt3c
/usr/bin/ld: cannot find -lpaho-mqtt3c
collect2: error: ld returned 1 exit status
make: *** [makefile:26: bin/main] Error 1
My directory structure is like this:
pi#raspberrypi:~/mqtt_C_testing $ ls
bin Eclipse-Paho-MQTT-C-1.3.1-Linux include makefile obj src
And I have main.c (the mqtt example file) in src and I put all the MQTT header files in include.
The library files for mqtt are here: /home/pi/mqtt_C_testing/Eclipse-Paho-MQTT-C-1.3.1-Linux/lib
I'm really not sure if I'm the right track at all here, so any help is appreciated. Thanks!
To get this to compile I did the following:
1) I built the lib by cloning the repo at github.com/eclipse/paho.mqtt.c and ran make then make install. This puts the .so files in /usr/local/lib
2) I put all the .h files in the main folder of my project directory: /home/pi/mqtt_C_testing/
3) I called the paho mqtt synchronous example main.c and have that also in the main directory.
4) I can then simply use: gcc -Wall -o test main.c -lpaho-mqtt3c to build and create an executable called "test"
5) I had success writing a makefile also that is run just with make. I'm a noob to all this, but I found this website (http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/) really helped with creating the makefile. I have not really had success putting the .h files in their own include directory yet though.
CC = gcc
CFLAGS=-I.
DEPS = MQTTAsync.h MQTTClientPersistence.h MQTTProperties.h MQTTClient.h MQTTReasonCodes.h MQTTSub$
OBJ = main.o
LIBS= -lpaho-mqtt3c
%.o: %.c $(DEPS)
$(CC) -c -o $# $< $(CFLAGS)
mainmake: main.o
$(CC) -o $# $^ $(CFLAGS) $(LIBS)

LWIP Makefile error

After going through the LWIP documents, I wrote a simple tcp echo server code. To compile it and create an executable I wrote the following Makefile. Now, when I run the command make all, it gives error for each of .c files included in the makefile.
The file structure is as follows:
1. tcp_server.c is the main file where I create the tcp server.
2. It uses the tcp_new(), tcp_bind() etc functions defined in "lwip-1.4.1/src/core/lwip/tcp.c" and "lwip-1.4.1/src/core/lwip/tcp_out.c" and I have given the paths for compilation accordingly.
I am just a beginner in writing makefiles and have written the following file going through the GNU Make documentation.
CC=gcc
CFLAGS= -g -Wall
LWIPDIR=../lwip-1.4.1/src
TARGET=tcp_server
INCLUDES= -I../lwip-1.4.1/src/include -I../STABLE-1_4_0/ports/unix/proj/lib\
-I../STABLE-1_4_0/ports/unix/include -I../lwip-1.4.1/src/include/ipv4
LFLAGS= -L../STABLE-1_4_0/ports/unix/proj/lib/liblwip.so
#LIBS= -llwip
COREFILES=$(LWIPDIR)/core/tcp.c $(LWIPDIR)/core/tcp_out.c
VPATH = $(LWIPDIR)/core
OBJS = tcp_server.o tcp.o tcp_out.o
MAIN=tcp_server
all : edit
edit : $(OBJS)
$(CC) $(CFLAGS) $(INCLUDES) -o edit $(OBJS) $(LFLAGS)
tcp_server.o : tcp_server.c tcp.o tcp_out.o
$(CC) $(CFLAGS) $(INCLUDES) -c tcp_server.c $(LFLAGS)
tcp.o : $(LWIPDIR)/core/tcp.c
$(CC) $(CFLAGS) $(INCLUDES) -c $(LWIPDIR)/core/tcp.c $(LFLAGS)
tcp_out.o : $(LWIPDIR)/core/tcp_out.c
$(CC) $(CFLAGS) $(INCLUDES) -c $(LWIPDIR)/core/tcp_out.c $(LFLAGS)
clean :
rm -f *.o
All the files include certain headers defined in "lwip-1.4.1/src/include" and I given the arguments to -I accordingly. However on running make, the output shows "Undefined reference to" all the functions which are defined in the lwip header files. What could be the reason? Where I am going wrong?
Thank you for all the help.
UNDEFINED REFERENCE is a linker error so you should;
For gcc you should use -L to specify the directory your libraries are contained and use -l to link a particular library. For example change the line in your makefile;
LFLAGS= -L../STABLE-1_4_0/ports/unix/proj/lib
remove the comment before LIBS and change this target
edit : $(OBJS)
$(CC) $(CFLAGS) $(INCLUDES) -o edit $(OBJS) $(LFLAGS) $(LIBS)

I need some assistance with Makefile in my project

I'm trying to make a Makefile but I'm having some problems
first I have
2 source files: ~/main.c ~/lib/library.c
1 header file: ~/include/library.h
main.c and library.c both share the same header file library.h
# Compiler options
CC = gcc
INC = -I../include
CFLAGS = -Wall -g -c $(INC)
LIB = -L../lib
LFLAGS = -Wall -g $(LIB)
# Dependencies
LIBS = -libmylib
OBJS = main.o
SRCS = $(OBJS:.o=.c)
EXEC = a.out
# Other rules
RM = rm -rf
TAGS = tags
BAK = Makefile.bak
all: $(EXEC)
#echo ------------------------ Compile Complete ----------------------------
.PHONY: clean depend
$(EXEC): $(OBJS)
$(CC) $(LFLAGS) -o $# $^ $(LIBS)
.c.o:
$(CC) $(INC) -M $^
$(CC) $(CFLAGS) -o $# $<
clean:
$(RM) *.o *~ $(EXEC) $(TAGS) $(BAK)
depend: $(SRCS)
makedepend $(INC) $^
it keeps saying that I it can't make a rule out of library.o
plus I have another question
I acknowledge the fact that when Makefile comes in to action after calling 'make',
and subsequently go to the line .c.o or %c: %o(in GNU enhanced version) and make
.o files. but why doesn't it also call clean and depend automatically?
I've edited some things from the previous version of Makefile
this time, (well pretty similar to the previous problem) even though I
clarified the library path(-I../lib),
the Makefile cannot find the archive file (which I created as libmylib.a in ../lib dir)
now it's driving me crazy
but why doesn't it also call clean and depend automatically?
Because make only builds the target you tell it. If you don't specify one, the first target is built, which in many cases, such as yours, is the 'all' target.

How to use makefile to compile all sources (some only to object files)?

I'm getting an "undefined reference to main" error on one of my files when trying to compile. I know this is because this file doesn't have a main method. This is just an implementation file for some helper methods, so I only want it compiled to an object file not an executable. I know how to do this if I explicitly tell the makefile what to do for each file, but I'm trying to write a makefile that will compile all of my sources at once. I tried using the -c flag, but then it compiled all of my files to only object files rather than executables. How in the world do I do this?
Here it is:
CC = gcc
CFLAGS = -g -Wall
SRCS = ./src/server.c ./src/client_slave.c ./src/sockaddrAL.c
EXECS = ./bin/server ./bin/client_slave
OBJS = $(SRCS:.c=.o)
all: clean $(SRCS) server client
server: $(OBJS)
$(CC) $(CFLAGS) ./src/server.o -o ./bin/server
client: $(OBJS)
$(CC) $(CFLAGS) ./src/client_slave.o -o ./bin/client_slave
.c.o:
$(CC) $(CFLAGS) -c $< -o $#
clean:
#rm -f $(EXECS) $(OBJS)
You should add the -c flag to the rule that builds .o files (your .c.o suffix rule) and not add it to the rule that builds the executables (the $(EXECS) rule).
CC = gcc
CFLAGS = -g -Wall
EXECS = ./bin/server ./bin/client_slave
all: $(EXECS)
./bin/%: ./src/%.o ./src/sockaddrAL.o
$(CC) $(CFLAGS) -o $# $^
.c.o:
$(CC) $(CFLAGS) -c $< -o $#
clean:
#rm -f $(EXECS) $(OBJS)
You didn't show sockAddrAL at all in your question so I assumed it belonged in both executables. Also note that the above syntax assumes GNU make. If you want to use only features available in POSIX standard make you pretty much have to write it all out.
Let implicit rules be your friend. Your entire Makfefile should just be:
CC = clang
CFLAGS = -O0 -g -Wall
SRCS = server.c client_slave.c sockaddrAL.c
OBJS = $(SRCS:.c=.o)
EXECS = server
server: $(OBJS)
clean:
#rm -f $(EXECS) $(OBJS)
Invoke it from the src directory.

C Makefile trouble: "gcc: -lm: linker input file unused because linking not done mpicc -lm 3D-ELM.o -o 3D-ELM.exe"

I'm having some trouble with a C Makefile.
Here are the contents of the Makefile:
PROJECT = 3D-ELM
MPICC = mpicc
CLAGS = -g -O3
LIBS = -lm
SRC = src_el
OBJECTS = $(PROJECT).o
$(PROJECT).exe : $(OBJECTS)
$(MPICC) $(CFLAGS) $(LIBS) $(OBJECTS) -o $(PROJECT).exe
$(PROJECT).o : $(SRC)/$(PROJECT).c
$(MPICC) $(CFLAGS) $(LIBS) -c $(SRC)/$(PROJECT).c
clean:
rm -rf *o $(PROJECT)
When I make, here is the error:
gcc: -lm: linker input file unused because linking not done
Does anyone know what's wrong?
Many thanks in advance,
EDIT: Got it. I don't need to pass libs when making the object file... Doh! bangs head off desk
Thanks for all your help guys,
The problem comes from this part of the makefile:
$(PROJECT).o : $(SRC)/$(PROJECT).c
$(MPICC) $(CFLAGS) $(LIBS) -c $(SRC)/$(PROJECT).c
At this step you are only invoking the compiler. The -c switch tells the compiler only to compile to an object file, and the linker is not involved at all. Since there is nothing to link, the $(LIBS) part is unnecessary.
The actual linking is done at the following stage:
$(PROJECT).exe : $(OBJECTS)
$(MPICC) $(CFLAGS) $(LIBS) $(OBJECTS) -o $(PROJECT).exe
This is where the individual object files are merged together with the libraries to produce an executable. The compiler itself is not invoked at this point because the source files have already been transformed into object files.

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