I am new in GCC and I am wondering how to tell the compiler that several include directories need to be specified as default for searching .h files. I read that -I dir is the key to accomplish that but doing my makefiles I encounter some problems. For example:
include_dir = C:/Users/rmrd001/Documents/Make/GCC/first/mydir/
FLAGS = -I "$(include_dir)"
func2.o: func2.c func2.h
gcc $(FLAGS) -c func2.c
And I got the error:
make:*** No rule to make target 'func2.c', needed by 'func2.o'. Stop.
The include_dir is not the working directory. It is working_directory/my_dir.
Please help.
-I is used for finding include files, but not for finding the main file. You have to pass an explicit path to the main file.
You can add path with -I option right in command line;
You can specify path with env variable C_INCLUDE_PATH
Also you can find more info on gcc official site and here
Related
Various resources have mentioned about the -I option of gcc , but have not mentioned its syntax. I want to add a header file which is not present in the default directory which are taken into consideration by the compiler for adding the header files at the compile time. How can I achieve it?
Just as the man page says, follow the argument directly with the path.
gcc ... -I/path/to/headers ...
You can use the -I option:
gcc -o foobar -I/path/to/headers -I/path/to/other foobar.c
You can also use the C_INCLUDE_PATH environment variable. You could set this up in your makefile:
C_INCLUDE_PATH = /path/to/headers:/path/to/other
foobar: foobar.c
gcc -o foobar foobar.c
You can either add a -I option to the command line to tell the compiler to look there for header files. If you have header files in include/ directory, then this command should work for you.
gcc -Iinclude/
There shouldn't be any space between -I compiler option and directory location.
If, you are using makefile, you can include this option in CFLAGS macro in your makefile.
CFLAGS = -Iinclude/ -c -Wall
OR
You can include header files using #include "../include/header.h".
Have a look at this answer.
http://puu.sh/7OiDL.png
Ok so what does export: StackImplementation.o do? Like where does it export that to?
Also, what is gcc -l doing? I googled it and it says "gcc -l links with a library file". What's linking to the library file?
Lastly, what does "substitute a print command of your choice for lpr below" mean? What's lpr do? and what's clean: rm -f *.o?
The export is the name of a phony target. You can say
% make export
And make will build the its dependencies. There is no action specifying how to convert the dependencies into a file called export, and in the absence of an implicit rule, the make will stop after building the dependencies.
The -I to gcc is adding a path to search for include files. You are confusing it with the -l option which specifies the name of a library to link (a pre-built collection of object files from which unresolved symbols can be satisfied).
The lpr command sends a file to the default line printer. Again, print is a phony target; doing
% make print
sends the source file to the printer.
Most makefiles include a clean rule to delete generated files. It is necessary when the dependencies are not properly specified, and a change to a source file does not cause the target to be built. The rm command is short for remove; it deletes files. If you do
% make clean
it will force-delete all files that end with .o.
Most of these targets are phony, and will not work correctly if there happen to be files with those names that are newer than their dependencies (if any). Most makes allow you to specify which targets are phony by listing them as dependencies of a super phony .PHONY target. Make will then ignore the filesystem, and will always apply the rules.
export:
this is a target named "export" and is the first target in the makefile so it will get called by default if no target is specified on the command line. Not clear to me why it is called "export" but that's the name somebody chose for it
export: StackImplementation.o
this says that export depends on StackImplementation.o so it will invoke the target StackImplementation.o when export is invoked
StackImplementation.o: StackImplementation.c ...
StackImplementaiton.o depends on the source file StackImplementation.c and the include files listed. This will run gcc which has the flag -I../Include which tells gcc to include .h files in adjacent directory "Include"
# substitute...
this is a comment indicating to change the print command lpr to some other print command if you want to
clean:
this is a common target that will delete object files with the -f option, forcing remove even if write permission is not set
1) lpr submits files for printing. Files named on the command line are sent to the named printer
(or the default destination if no destination is specified). If no files are listed on the com‐
mand-line, lpr reads the print file from the standard input.
for more information about "lpr " use user manual of linux.
2)gcc -l link external library to your program if any dependency .
example::
gcc hello.c -o hello -lpthread -ldrm -ldrm_omap
in Make file::
clean:
rm -rf *.o
here clean is a rule of make and when we call make clean then it will invoke rm -rf *.o to remove all object files.
How do I add an include path for kernel module makefile? I want to include "test_kernel.h" in test_module.c. the "test_kernel.h" resides in other directory "inc"
I tried in the following solution in my Makefile but it does not work:
obj-m += test_module.o
test_module:
$(MAKE) -C "$(LINUX_DIR)" -Iinc $(MAKE_OPTS) modules
You should make use of EXTRA_CFLAGS in your Makefile. Try something on these lines:
obj-m += test_module.o
EXTRA_CFLAGS=-I$(PWD)/inc
test_module:
$(MAKE) -C "$(LINUX_DIR)" $(MAKE_OPTS) modules
See section 3.7 Compilation Flags section here.
Hope this helps!
are you sure you correctly specified the include in your file?
e.g.:
#include "inc/something.h"
instead of
#include <inc/something.h>
-I is a GCC flag, not a Make flag.1 You need to pass a variable down to your "sub" Make process; perhaps something like this:
$(MAKE) -C "$(LINUX_DIR)" CPPFLAGS="-Iinc" $(MAKE_OPTS) modules
where CPPFLAGS is a standard Make variable that's used in the implicit rules. Feel free to use your own variable instead, and ensure it's used appropriately in the sub-make.
The Make manual gives more details on communicating variables between Make instances: http://www.gnu.org/software/make/manual/make.html#Variables_002fRecursion.
1. Actually, it is also a Make flag, but for something completely unrelated.
For me, many trials have failed, until one of them has succeeded.
Using $(src) in the path will do it with ccflags-y, for instance:
# Include Paths
ccflags-y += -I$(src)/../../lib/include
For a directory "/lib/include" that is two levels up from the source folder.
This is driven from the statement in Kernel.org
Always use $(src) when referring to files located in the src tree
Specially, if your source code is in directory that is outside the Linux Kernel Tree.
How to add multiple header include and library directories to the search path in a single gcc command?
Use multiple -I flags for the include directories and multiple -L flags for the lib directories
You can set the C_INCLUDE_PATH environment variable.
export C_INCLUDE_PATH=.:/some/dir:/some/other/dir
as well as the LIBRARY_PATH environment variable.
On Linux you need to use -I before each directory that you want to add.
Example:
user:/home/my_project$ gcc -g -Wall -I/usr/include/lib_Directory/ -I./include -c ./src/transcod.c
./ means the current directory where you are running the command, in this case my_project;
I'm running OSX 10.6.6. I have installed Apples GCC- version 4.2.1. I'm writing myself a nice little library- things for debugging, data storage algorithms, and the like. I've stored all the headers and .c files in a nice little folder called 'mylib' in my C folder. I'd like to add that folder to the GCC search path, so that I can type, say,
/* ... */
#include <mylib/debug.h>
/* ... */
and have it work perfectly. How can I either add /Users/Henry/coding_stuff/c/include/mylib to the GCC search path, or have a reference to the folder in /usr/include? I'd like to not have to replace /usr/include/mylib with the one in my C folder every time I make a trivial change. So, how can it be done?
A symbolic link will work:
sudo ln -s /Users/Henry/coding_stuff/c/include/mylib /usr/include/mylib
A more traditional way to solve this problem is to use the compiler's -I flag to add your search path:
gcc -I /Users/Henry/coding_stuff/c/include/mylib -c -o example.o example.c
Add to your .bashrc:
export INCLUDE_PATH=/Users/Henry/coding_stuff/c/include/mylib
You need to set the environment variable LD_LIBRARY_PATH to equal the path. Most likely in your .bashrc.
export LD_LIBRARY_PATH=/path/to/libs
Sorry this should actually be LIBRARY_PATH for the build; LD_LIBRARY_PATH is for runtime library linking.
export LIBRARY_PATH=/path/to/libs
I'm using Ubuntu14.04 and gcc.
gcc adds C_INCLUDE_PATH to the list of search directories.
You can use -v option to see where gcc actually searchs.
(INCLUDE_PATH does not work for me.)
So, you can add the following to .bashrc:
export C_INCLUDE_PATH=/Users/Henry/coding_stuff/c/include/mylib
I found the official documentation: https://gcc.gnu.org/onlinedocs/gcc/Environment-Variables.html