Using Task State Segment to handle ring 0 int - c

Question

I've been working from some time on easy os kernel. So far I've properly setup IDT with one INT (software).
Next step was to try to get to ring 3 of kernel. This was dane by me using 'trick' with iret ring switch was successful, as
state of segment register indicate. Problems occurred when I tried to use int $20 to switch to ring 0 to handle this interrupt.
Of course I have setup TSS to be able to do such action. Here is some code:
This function encodes descriptor (I've enclosed this because I think this can be problem with encoding)
void register_descriptor(unsigned entryIdx, uint32_t base, uint32_t limit, uint16_t flag)
{
uint64_t descriptor;
descriptor = limit & 0x000F0000;
descriptor |= (flag << 8) & 0x00F0FF00;
descriptor |= (base >> 16) & 0x000000FF;
descriptor |= base & 0xFF000000;
descriptor <<= 32;
descriptor |= base << 16;
descriptor |= limit & 0x0000FFFF;
GDT[entryIdx] = descriptor;
}
TSS loading to GDT (zeroTSS() just set all members of TSS struct to 0):
static void write_tss(unsigned num, uint16_t ss0, uint32_t esp0)
{
register_descriptor(num, (uint32_t) &tss_entry, sizeof(tss_entry), (TSS));
zeroTSS();
tss_entry.ss0 = ss0;
tss_entry.esp0 = esp0;
tss_entry.cs = 0x18;
tss_entry.ss = tss_entry.ds = tss_entry.es = tss_entry.fs = tss_entry.gs = 0x20;
}
TSS Flush(My GDT have 6 entries (NULL+TSS+4 Segment)):
.global flush_tss
flush_tss:
mov $0x28, %ax
ltr %ax
ret
And interupt handler register:
IDTEntry fillIDTEntry(uint32_t intHandler,
uint16_t selector,
uint8_t type_attr)
{ IDTEntry newEntry;
newEntry.offset_low = LOW_FUN_ADDR(intHandler);
newEntry.selector = selector;
newEntry.zero = 0;
newEntry.type_attr = type_attr;
newEntry.offset_up = UP_FUN_ADDR(intHandler);
return newEntry;
}
extern void _lidt(_IDT_PTR* idtPtr);
void loadIDT()
{
zeroIDT();
_IDT_PTR idtPtr;
idtPtr.idtSize = sizeof(struct __InteruptDescriptorTableEntry)*256 - 1;
idtPtr.idtBaseAddr = (uint32_t) &InteruptDescriptorTable;
IDTEntry printOnScreenInt = fillIDTEntry((uint32_t)interupt_pritnOnScreen, 0x18, 0x8e);
registerInterupt(printOnScreenInt, 32);
_lidt(&idtPtr);
}
.global _lidt
_lidt:
push %ebp
mov %esp,%ebp
mov 8(%esp), %eax
lidt (%eax)
leave
ret
Finally print form Bochs:
[CPU0 ] interrupt(): soft_int && (gate.dpl < CPL)
[CPU0 ] interrupt(): gate descriptor is not valid sys seg (vector=0x0d)
[CPU0 ] interrupt(): gate descriptor is not valid sys seg (vector=0x08)
[CPU0 ] CPU is in protected mode (active)
[CPU0 ] CS.mode = 32 bit
[CPU0 ] SS.mode = 32 bit
[CPU0 ] EFER = 0x00000000
[CPU0 ] | EAX=00100d48 EBX=001058b4 ECX=00000720 EDX=001058c2
[CPU0 ] | ESP=0010589c EBP=0010589c ESI=00101000 EDI=00000000
[CPU0 ] | IOPL=0 ID vip vif ac vm RF nt of df if tf sf zf af PF cf
[CPU0 ] | SEG sltr(index|ti|rpl) base limit G D
[CPU0 ] | CS:000b( 0001| 0| 3) 00000000 ffffffff 1 1
[CPU0 ] | DS:0013( 0002| 0| 3) 00000000 ffffffff 1 1
[CPU0 ] | SS:0013( 0002| 0| 3) 00000000 ffffffff 1 1
[CPU0 ] | ES:0013( 0002| 0| 3) 00000000 ffffffff 1 1
[CPU0 ] | FS:0013( 0002| 0| 3) 00000000 ffffffff 1 1
[CPU0 ] | GS:0013( 0002| 0| 3) 00000000 ffffffff 1 1
[CPU0 ] | EIP=001008ed (001008ed)
[CPU0 ] | CR0=0x60000011 CR2=0x00000000
[CPU0 ] | CR3=0x00000000 CR4=0x00000000
[CPU0 ] 0x001008ed>> int 0x20 : CD20
I will only mention that before introducing two privilege levels this interrupt handler was working.