undefined reference to 'main' no read source file - c

I've got a strange issue when I try to compile my code on my laptop.
It gives me this error: undefined reference to 'main' because apparently it cannot see my source files and then the objects either.
However, the same makefile and code work perfectly on my office machine.
here's the makefile. any hints?
thanks a lot for helping me in advance
ROOT = $(addprefix $(PWD), /)
BUILDS_DIR = $(addprefix $(ROOT), builds/)
SRCS_DIR = $(addprefix $(ROOT), src/)
INCS_DIR = $(addprefix $(ROOT), src/)
OBJS_DIR = $(addprefix $(SRCS_DIR), objects/)
LIBS_DIR = ./
SRCS = $(wildcard $(SRCS_DIR)*.c)
OBJS = $(SRCS:$(SRCS_DIR)%.c=$(OBJS_DIR)%.o)
TARGET = INTERP
EXES = $(addprefix $(BUILDS_DIR), $(TARGET))
CC = gcc
CFLAGS = -Wall -O3 -MD -DTRILIBRARY
INCLUDES = -I$(INCS_DIR)
CL = gcc
LFLAGS =
LIBS = -L$(LIBS_DIR) -lm
RM = rm -f
.PHONY: all $(TARGET) distclean clean
default: clean $(TARGET)
$(TARGET): $(OBJS)
#echo -e "\n\n\t\t*** Compiled $(TARGET) successfully! ***\n" ;
$(CL) $(LFLAGS) -o $(BUILDS_DIR)$# \
$(OBJS) \
$(LIBS)
#echo -e "\n\n\t\t*** Linking $(TARGET) completed! ***\n"
$(OBJS): $(OBJS_DIR)%.o : $(SRCS_DIR)%.c
$(CC) $(CFLAGS) $(INCLUDES) \
-c $<\
-o $#
distclean: clean
$(RM) $(EXES)
#echo -e "\n\n\t\t*** Purge $(TARGET) completed! ***\n"
clean:
$(RM) $(OBJS_DIR)*.o \
$(SRCS_DIR)*~
#echo -e "\n\n\t\t*** Cleanup $(TARGET) completed! ***\n"
depend: $(SRCS)
makedepend $(INCLUDES) $^

Related

I cannot include my own libft.h and i don't know why

I want to include in a random test.c file my own library to test if it works but I can't do it.
Even a simple make all doesn't work, but I'm supposed to have done everything right. I have the impression that my makefile doesn't even compile my .c files in .o
here is my make file:
SRCS = ft_atoi.c ft_isascii.c ft_memchr.c ft_putchar_fd.c ft_strchr.c ft_strlen.c ft_strtrim.c \
ft_bzero.c ft_isdigit.c ft_memcmp.c ft_putendl_fd.c ft_strdup.c ft_strmapi.c ft_substr.c \
ft_calloc.c ft_isprint.cft_memcpy.c ft_putnbr_fd.c ft_strjoin.c ft_strncmp.c ft_tolower.c \
ft_isalnum.c ft_itoa.c ft_memmove.c ft_putstr_fd.c ft_strlcat.c ft_strnstr.c ft_toupper.c \
ft_isalpha.c ft_memccpy.c ft_memset.c ft_split.c ft_strlcpy.c ft_strrchr.c \
\
CC = gcc
CFLAGS = -Wall -Wextra -Werror
HEADER = libft.h
OBJS = $(SRCS:.c=.o)
RM = rm -f
NAME = libft.a
.c.o:
$(CC) $(CFLAGS) -c $< -o ${<:.c=.o}
$(NAME): $(OBJS) $(HEADER)
ar rcs $(NAME) $(OBJS)
all: $(NAME)
clean:
$(RM) $(OBJS)
fclean: clean
$(RM) $(NAME)
re: fclean all
.PHONY: all clean fclean re

Linking is no occuring in my Makefile; returns 'undefined reference to `main'

This simple program (two .c files and one .h) compiles and links properly from the command line. However, my Makefile is throwing an error during the linking stage. Proper tab usage is in effect.
CC = gcc
BINDIR = bin/
OBJDIR = obj/
SRCDIR = src/
MKDIR = mkdir -p
RM = rm -rf
SRC = $(wildcard $(SRCDIR)*.c)
_OBJS = $(patsubst $(SRCDIR)%.c, %.o, $(SRC))
OBJS = $(addprefix $(OBJDIR), $(_OBJS))
CFLAGS = -Wall -g -Iinclude
.PHONY: all
all: $(BIN)
_BIN = a.out
BIN = $(addprefix $(BINDIR), $(_BIN))
$(BIN): $(OBJS) $(BINDIR)
$(CC) -o $# $(CFLAGS) $<
$(BINDIR):
$(MKDIR) $(BINDIR)
$(OBJS): $(SRC) $(OBJDIR)
$(CC) $(CFLAGS) -c $< -o $#
$(OBJDIR):
$(MKDIR) $(OBJDIR)
.PHONY: clean
clean:
#echo "Cleaning things up..."
$(RM) $(OBJDIR) $(BINDIR)
The program's files:
main.c
#include <stdio.h>
#include <stdlib.h>
#include "hellomake.h"
int main(void) {
myPrintHelloMake();
return EXIT_SUCCESS;
}
hellomake.c
#include <stdio.h>
#include "hellomake.h"
void myPrintHelloMake(void) {
puts("Hello makefiles!");
}
hellomake.h
#ifndef __HELLO_H__
#define __HELLO_H__
void myPrintHelloMake(void);
#endif
The .c files are in the src/ directory and the .h file is in the include/ directory. Makefile compiles the code, creates the obj/ directory, and places and main.o and hellomake.o therein. However, that is where things break down. Here is gcc's complaint:
$ make
mkdir -p obj/
gcc -Wall -g -Iinclude -c src/hellomake.c -o obj/hellomake.o gcc -Wall -g -Iinclude -c src/hellomake.c -o obj/main.o mkdir -p bin/ gcc -o bin/a.out -Wall -g -Iinclude
obj/hellomake.o /usr/bin/ld: /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/Scrt1.o: in function `_start': (.text+0x20): undefined reference to `main' collect2: error: ld returned 1 exit status make: *** [Makefile:34: bin/a.out] Error 1
There were a number of issues.
I'd leave off / from (e.g.) BINDIR et. al.
The patsubst was incorrect. It needed $(OBJDIR) in the the TO
Using _OBJS was unnecessary/harmful.
The rule for $(OBJS) was incorrect. It created the two .o files using the first prereq source, so [the function] main was defined twice. It needs a pattern rule instead.
Using $(BINDIR) as a prereq for $(BIN) added bin/ at the end of the gcc line [and it complained]
As M.Oehm mentioned, $< only gets the first prereq.
The all: was indented so it was not recognized properly
Anyway, here's the corrected Makefile:
CC = gcc
BINDIR = bin
OBJDIR = obj
SRCDIR = src
MKDIR = mkdir -p
RM = rm -rf
SRC = $(wildcard $(SRCDIR)/*.c)
###_OBJS = $(patsubst $(SRCDIR)%.c, %.o, $(SRC))
###OBJS = $(addprefix $(OBJDIR), $(_OBJS))
OBJS = $(patsubst $(SRCDIR)/%.c, $(OBJDIR)/%.o, $(SRC))
CFLAGS = -Wall -g -Iinclude
_BIN = a.out
BIN = $(addprefix $(BINDIR)/, $(_BIN))
.PHONY: all
all: $(BINDIR) $(OBJDIR) $(BIN)
####$(BIN): $(OBJS) $(BINDIR)
$(BIN): $(OBJS) $(BINDIR)
###$(CC) -o $# $(CFLAGS) $<
$(CC) -o $# $(CFLAGS) $(OBJS)
$(BINDIR):
$(MKDIR) $(BINDIR)
###$(OBJS): $(SRC) $(OBJDIR)
$(OBJDIR)/%.o: $(SRCDIR)/%.c
$(CC) $(CFLAGS) -c $< -o $#
$(OBJDIR):
$(MKDIR) $(OBJDIR)
.PHONY: clean
clean:
#echo "Cleaning things up..."
$(RM) $(OBJDIR) $(BINDIR)

Makefile - Compile object with different library

I´m trying to create a Makefile that build a lib and compile the file. My problem is that depending on the %.c file I need to compile with different lib.
The SRC_MLX need the $(LFLAGS) and the SRC don´t. So the gcc compiler don´t allow me to compile the SRC with the LFLAGS. That´s the reason I need to separate.
I´ve tried this way:
SRCS = $(DIR_SRC)/ft_utils.c \
$(DIR_SRC)/ft_adt.c \
$(DIR_SRC)/ft_circle.c \
$(DIR_SRC)/ft_line.c \
$(DIR_SRC)/ft_trgb.c \
$(DIR_SRC)/ft_quadrilateral.c \
$(DIR_SRC)/ft_player.c \
$(DIR_SRC)/ft_color.c
SRCS_MLX = $(DIR_SRC)/win_update.c \
$(DIR_SRC)/ft_vars.c \
$(DIR_SRC)/ft_image.c \
$(DIR_SRC)/ft_map.c
$(NAME): $(LIB_NAME)
$(CC) $(CFLAGS) main.c -I. -I$(DIR_MLX) -L$(DIR_MLX) -L. $(LFLAGS) $(LIB_FLAG) -o $# -g
$(DIR_OBJ)/$(OBJ).o: $(DIR_SRC)/$(SRCS).c
mkdir -p $(DIR_OBJ)
$(CC) $(CFLAGS) -c $< -I. -I$(DIR_MLX) -o $#
$(DIR_OBJ)/$(OBJ_MLX).o: $(DIR_SRC)/$(SRCS_MLX).c
mkdir -p $(DIR_OBJ)
$(CC) $(CFLAGS) -c $< -I. -I$(DIR_MLX) -L$(DIR_MLX) $(LFLAGS) -o $#
$(LIB_NAME): $(OBJ_MLX) LIB_OBJ
$(AR) $(LIB_NAME) $(OBJ)
ranlib $(LIB_NAME)
LIB_OBJ: $(OBJ)
$(AR) $(LIB_NAME) $(OBJ)
In the example above I´ve tried to create a lib with one kind of files and after that create a lib with the first lib with the others files. But I keep getting this error:
Makefile:41: warning: overriding recipe for target '.objs/'
Makefile:37: warning: ignoring old recipe for target '.objs/'
make: Warning: File 'Makefile' has modification time 454 s in the future
rm -f .objs/ft_utils.o .objs/ft_adt.o .objs/ft_circle.o .objs/ft_line.o .objs/ft_trgb.o .objs/ft_quadrilateral.o .objs/ft_player.o .objs/ft_color.o
rm -f libcub3d.a
rm -f main
make: *** No rule to make target 'src/src/win_update.c', needed by '.objs/win_update.o'. Stop.
How can I compile this objects with different lib?
P.S. Those are my variables:
DIR_OBJ = .objs
DIR_SRC = src
DIR_LIB = lib
DIR_MLX = ./minilibx-linux
NAME = main
LIB_NAME = libcub3d.a
OBJ = $(patsubst $(DIR_SRC)/%.c, $(DIR_OBJ)/%.o, $(SRCS))
OBJ_MLX = $(patsubst $(DIR_SRC)/%.c, $(DIR_OBJ)/%.o, $(SRCS_MLX))
CC = clang
CFLAGS = -Wall -Werror -Wextra
LFLAGS = -lmlx -lm -lX11 -lXext -lbsd
LIB_FLAG = -lcub3d
AR = ar -rc
RM = rm -f
These lines are definitely not right:
$(DIR_OBJ)/$(OBJ).o: $(DIR_SRC)/$(SRCS).c
...
$(DIR_OBJ)/$(OBJ_MLX).o: $(DIR_SRC)/$(SRCS_MLX).c
along with the way you've defined SRCS and SRCS_MLX and these:
OBJ = $(patsubst $(DIR_SRC)/%.c, $(DIR_OBJ)/%.o, $(SRCS))
OBJ_MLX = $(patsubst $(DIR_SRC)/%.c, $(DIR_OBJ)/%.o, $(SRCS_MLX))
Just expand the variables in the rule in your head, or else ask make to expand it for you with the info function, and you'll see it's definitely not right:
$(info output is '$(DIR_OBJ)/$(OBJ).o: $(DIR_SRC)/$(SRCS).c')

Why my Makefile recompile each time?

I have a little problem on this Makefile, my makefile recompile each time, when I call make command. What is the problem?
CC = gcc -Wall -Werror -Wextra
INC=includes
INC_LIB=libft/includes
SRC_PATH = srcs
OBJ_PATH = srcs
NAME = vital
NAME_CLIENT = client
NAME_SERVER = server
INCLUDES = ./includes/server.h ./includes/client.h
INCLUDES_GCH = ./includes/server.h.gch ./includes/client.h.gch
LIB_PATH = libft
SRC_M_SERVER_PATH = server
SRC_M_CLIENT_PATH = client
################################################
### SOURCES
###############################################
SRC_M_CLIENT = client.c main_client.c manage_put_client.c manage_get_client.c create_client.c usage_builtin.c make_client.c remaster_prompt.c my_send_and_recv.c
SRC_M_SERVER = server.c main_server.c manage_builtin.c ft_put.c create_server.c server_make.c ft_cd.c ft_mkdir.c ft_ls.c ft_pwd.c ft_quit.c ft_get.c network.c get_server_make.c
SRC_M_C = $(addprefix ./$(SRC_M_CLIENT_PATH)/, $(SRC_M_CLIENT))
SRC_M_S = $(addprefix ./$(SRC_M_SERVER_PATH)/, $(SRC_M_SERVER))
###############################################
### OBJECT
##############################################
OBJ_M_CLIENT = $(patsubst %.c, %.o, $(SRC_M_CLIENT))
OBJ_M_SERVER = $(patsubst %.c, %.o, $(SRC_M_SERVER))
OBJ_M_C = $(addprefix ./$(OBJ_PATH)/, $(OBJ_M_CLIENT))
OBJ_M_S = $(addprefix ./$(OBJ_PATH)/, $(OBJ_M_SERVER))
OBJ_ALL = $(OBJ_M_C) $(OBJ_M_S)
####################################################
#################### RULES ########################
.PHONY: all libft clean fclean re
all: $(NAME)
$(NAME): lib $(OBJ_M_C) $(OBJ_M_S)
$(CC) $(OBJ_M_C) $(OBJ_M_U) -L ./libft -lft -o $(NAME_CLIENT)
$(CC) $(OBJ_M_S) $(OBJ_M_U) -L ./libft -lft -o $(NAME_SERVER)
$(OBJ_M_C): $(OBJ_PATH)%.o : $(SRC_PATH)/$(SRC_M_CLIENT_PATH)%.c
$(CC) $(CFLAGS) -I$(INC) -I $(INC_LIB) -c $< -o $#
$(OBJ_M_S) : $(OBJ_PATH)%.o : $(SRC_PATH)/$(SRC_M_SERVER_PATH)%.c
$(CC) $(CFLAGS) -I$(INC) -I $(INC_LIB) -c $< -o $#
lib:
#cd $(LIB_PATH) && make
cleanlib:
#cd $(LIB_PATH) && make clean
#echo "$(COL_WHITE)[ CLEAN LIBFT ]\n"
fcleanlib: cleanlib
#cd $(LIB_PATH) && make fclean
#echo "$(COL_WHITE)[ FCLEAN LIBFT ]\n"
clean: cleanlib
rm -rf $(OBJ_ALL) $(OBJ_M_M) $(INCLUDES_GCH)
fclean: fcleanlib clean
rm -rf $(NAME_CLIENT) $(NAME_SERVER)
re : fclean $(NAME)
When I use make command, it run $(NAME) and launch gcc.
I have this result:
make[1]: Nothing to be done for `all'. (ma lib)
gcc -Wall -Werror -Wextra ./srcs/client.o ./srcs/main_client.o ./srcs/manage_put_client.o ./srcs/manage_get_client.o ./srcs/create_client.o ./srcs/usage_builtin.o ./srcs/make_client.o ./srcs/remaster_prompt.o ./srcs/my_send_and_recv.o -L ./libft -lft -o client
gcc -Wall -Werror -Wextra ./srcs/server.o ./srcs/main_server.o ./srcs/manage_builtin.o ./srcs/ft_put.o ./srcs/create_server.o ./srcs/server_make.o ./srcs/ft_cd.o ./srcs/ft_mkdir.o ./srcs/ft_ls.o ./srcs/ft_pwd.o ./srcs/ft_quit.o ./srcs/ft_get.o ./srcs/network.o ./srcs/get_server_make.o -L ./libft -lft -o server
Any suggestion?
You have not 'made clear' all the details; however, the following Makefile should get you moving in the right direction.
Note: replace all<tab> with a tab
Note: use := so the macros are only evaluated once
CC := /usr/bin/gcc -Wall -Werror -Wextra
RM := /bin/rm -rf
MAKE := /usr/bin/make
INC := includes
INC_LIB := libft/includes
SRC_PATH := srcs
OBJ_PATH := srcs
NAME_CLIENT := client
NAME_SERVER := server
SERVER_INCLUDES := includes/server.h
CLIENT_INCLUDES := includes/client.h
LIB_PATH := libft
SRC_M_SERVER_PATH := server
SRC_M_CLIENT_PATH := client
################################################
### SOURCES
###############################################
SRC_M_CLIENT := client.c \
main_client.c \
manage_put_client.c \
manage_get_client.c \
create_client.c \
usage_builtin.c \
make_client.c \
remaster_prompt.c \
my_send_and_recv.c
SRC_M_SERVER := server.c \
main_server.c \
manage_builtin.c \
ft_put.c \
create_server.c \
server_make.c \
ft_cd.c \
ft_mkdir.c \
ft_ls.c \
ft_pwd.c \
ft_quit.c \
ft_get.c \
network.c \
get_server_make.c
SRC_M_C := $(addprefix ./$(SRC_M_CLIENT_PATH)/, $(SRC_M_CLIENT))
SRC_M_S := $(addprefix ./$(SRC_M_SERVER_PATH)/, $(SRC_M_SERVER))
###############################################
### OBJECT
##############################################
OBJ_M_CLIENT := $(patsubst %.c, %.o, $(SRC_M_CLIENT))
OBJ_M_SERVER := $(patsubst %.c, %.o, $(SRC_M_SERVER))
OBJ_M_C := $(addprefix ./$(OBJ_PATH)/, $(OBJ_M_CLIENT))
OBJ_M_S := $(addprefix ./$(OBJ_PATH)/, $(OBJ_M_SERVER))
####################################################
#################### RULES ########################
.PHONY: all clean libclean
all: $(NAME_CLIENT) $(NAME_SERVER)
# link client
$(NAME_CLIENT) : $(OBJ_M_C)
<tab>$(CC) $^ -o $# -L$(LIB_PATH) -lft
# link server
$(NAME_SERVER) : $(OBJ_M_S)
<tab>$(CC) $^ -o $# -L$(LIB_PATH) -lft
# compile sources
%.o : %.c $(INC_CLIENT) $(INC_SERVER) $(INC)
<tab>$(CC) $(CFLAGS) -c $< -o $# -I$(INC_CLIENT) $(INC_SERVER) -I$(INC)
# is there another Makefile in the $(LIB_PATH) directory?
cleanlib: clean
<tab>(#cd $(LIB_PATH) && $(MAKE) clean)
<tab>#echo "$(COL_WHITE)[ CLEAN LIBFT ]\n"
clean:
<tab>$(RM) $(OBJ_M_C) $(OBJ_M_S)
Change this line:
.PHONY: all libft clean fclean re
to
.PHONY: clean fclean re
.PHONY disables file association checks

I cannot link fortran code to my own C code on my laptop

I know this issue has been discussed several times here, but I cannot find help from the previous threads.
Here's the deal. I use a code written in fortran and I link it to my code in C by my makefile. The fortran makefile is ready to handle the compatibility, in fact, I got the command
CDEFS: -DAdd_
On my work machine everything seems fine. I do the link and run my own code.
However, I just tried to use the same code on my laptop and I got the classical linker error like:
undefined reference to 'dtrsm_' or
undefined reference to 'dcopy_'
refering to the fortran program. Nevertheless, the compilers are the same gcc and f95 for both machines and I didn't touch anything from the makefile.
How come I got this error?
thanks for help me.
EDIT1: sure, this is my makefile and MUMPS is the fortran code that uses a own makefile.
ROOT = $(addprefix $(PWD), /)
BUILDS_DIR = $(addprefix $(ROOT), builds/)
SRCS_DIR = $(addprefix $(ROOT), src/)
INCS_DIR = $(addprefix $(ROOT), src/)
OBJS_DIR = $(addprefix $(SRCS_DIR), objects/)
LIBS_DIR = ./
MUMPS_DIR = $(MUMPS_ROOT)
MUMPS_INCS_DIR = $(addprefix $(MUMPS_DIR), /include)
MUMPS_LIB_DIR = $(addprefix $(MUMPS_DIR), /lib)
MUMPS_MPI_DIR = $(addprefix $(MUMPS_DIR), /libseq)
SRCS = $(wildcard $(SRCS_DIR)*.c)
OBJS = $(SRCS:$(SRCS_DIR)%.c=$(OBJS_DIR)%.o)
MUMPS = MUMPS
TARGET = APOGEE
EXES = $(addprefix $(BUILDS_DIR), $(TARGET))
CC = gcc
CFLAGS = -O3 -MD -DTRILIBRARY
INCLUDES = -I$(INCS_DIR) -I$(MUMPS_INCS_DIR)
# CL = gcc
FL = f95
LFLAGS = -O
LIBS = -L$(LIBS_DIR) -lm -lblas -lpthread
LIBS += -L$(MUMPS_LIB_DIR) -ldmumps -lmumps_common -lpord -L$(MUMPS_MPI_DIR) -lmpiseq
RM = rm -f
.PHONY: all $(MUMPS) $(TARGET) distclean clean
default: $(MUMPS) $(TARGET)
$(TARGET): $(OBJS)
#echo -e "\n\n\t\t*** Compiled $(TARGET) successfully! ***\n" ;
$(FL) $(LFLAGS) -o $(BUILDS_DIR)$# \
$(OBJS) \
$(LIBS)
#echo -e "\n\n\t\t*** Linking $(TARGET) completed! ***\n"
$(OBJS): $(OBJS_DIR)%.o : $(SRCS_DIR)%.c
$(CC) $(CFLAGS) $(INCLUDES) \
-c $<\
-o $#
$(MUMPS):
(cd $(MUMPS_DIR) ; $(MAKE) ; cd $(ROOT)) ;
#echo -e "\n\n\t\t*** Compiled $(MUMPS) successfully! ***\n" ;
distclean: clean
$(RM) $(EXES)
(cd $(MUMPS_DIR) ; $(MAKE) clean ; cd $(ROOT)) ;
#echo -e "\n\n\t\t*** Purge $(MUMPS) and $(TARGET) completed! ***\n"
clean:
$(RM) $(OBJS_DIR)*.o \
$(SRCS_DIR)*~
#echo -e "\n\n\t\t*** Cleanup $(TARGET) completed! ***\n"
depend: $(SRCS)
makedepend $(INCLUDES) $^
EDIT2: chunks of the MUMPS makefile is here
include Makefile.inc
mumps_lib: requiredobj
(cd src ; $(MAKE) $(ARITH))
requiredobj: Makefile.inc $(LIBSEQNEEDED) $(libdir)/libpord$(PLAT)$(LIBEXT)
# dummy MPI library (sequential version)
libseqneeded:
(cd libseq; $(MAKE))
# Build the libpord.a library and copy it into $(topdir)/lib
$(libdir)/libpord$(PLAT)$(LIBEXT):
if [ "$(LPORDDIR)" != "" ] ; then \
cd $(LPORDDIR); \
$(MAKE) CC="$(CC)" CFLAGS="$(OPTC)" AR="$(AR)" RANLIB="$(RANLIB)" OUTC=$(OUTC) LIBEXT=$(LIBEXT); \
fi;
if [ "$(LPORDDIR)" != "" ] ; then \
cp $(LPORDDIR)/libpord$(LIBEXT) $#; \
fi;
and in Makefile.inc we got:
PLAT =
LIBEXT = .a
OUTC = -o
OUTF = -o
RM = /bin/rm -f
CC = cc
FC = f95
FL = f95
AR = ar vr
RANLIB = ranlib
INCSEQ = -I$(topdir)/libseq
LIBSEQ = -L$(topdir)/libseq -lmpiseq
LIBBLAS = -lblas
LIBOTHERS = -lpthread
CDEFS = -DAdd_
OPTF = -O
OPTC = -O -I.
OPTL = -O
INCS = $(INCSEQ)
LIBS = $(LIBSEQ)
LIBSEQNEEDED = libseqneeded

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