ds-5 ultimate evaluation version supports 64bit neon ( arm_v8 neon) - arm

I have installed the current "DS-5 Ultimate 64-bit evaluation " version but am not able to build for ARMv8 64-bit neon.
In armclang am not able to find the cpu list it shows only option "Target: aarch64-arm-none-eabi".
please help me to solve the below issues
Does this version support ARMv8 neon?
How to find available cpu list (as in armcc --cpu list) or equivalent armclang options.

aarch64 is ARMv8. And NEON is mandatory in ARMv8, so it's included.

Related

GNU GCC Intel i5 optimization settings?

I have a Microsoft Surface Pro (5th Generation) with the i5 processor and use the GNU GCC Compiler.
Now I want to use optimization settings for this compiler and I don't know what settings are "working" with my processor.
Overview of my system:
Microsoft Surface Pro
Intel Core i5-7300U CPU # 2,60 GHz
Microsoft Windows 10 Pro | 64-bit | Version 10.0.18363
IDE: Code::Blocks 20.03
Does anyone has an a similar system? Thanks in advance.
Kind Regards
randomcoder
You can always use the flag -march=native, which tells the compiler to detect the CPU of the computer that's being used to compile, and optimize the code for that type of CPU. This is ideal when you are compiling on the same machine you will be running the code on. Note that the resulting executable will not necessarily work on other computers with different CPUs.
Of course, you also have to use one of the -O options, typically -O2, to get optimizations at all. There are many other specific optimization options, but whether they are helpful will depend on what your program actually does.

ARMv8 backward compatibility with ARMv7 (Snapdragon 820 vs Cortex-A15)

I see that ARMv8 is merely an extension of ARMv7 architecture and all code compiled on ARMv7 should run on ARMv8. I am interested in the backward compatibility of ARMv8 to ARMv7. Will code that was compiled on ARMv8 run on ARMv7?
I have a particular exact case of interest: I would like to run the comma.ai's Openpilot visiond binary which was compiled for the OnePlus 3 smartphone (Qualcomm MSM8996 Snapdragon 820 CPU) on the Nvidia Jetson TK1 (NVIDIA Cortex-A15 CPU). Will the visiond run on Jetson?
EDIT: There may be more in question than CPU compatibility since visiond probably heavily uses GPU on that phone. Will probably depend whether they use some standard parallelization ways (OpenCL, NEON etc.) or have some custom code for Snapdragons GPU. Even with OpenCL the chance of compatibility is probably quite low on different HW.
I believe that aarch32 userland is fully or very highly backwards compatible with ARMv7, i.e. userland programs compiled for ARMv7 should just work in AArch32, but I couldn't find a precise quote in the ARM manual.
aarch32 does have new instructions added over ARMv7 however, most of them seem to be functionality that ARMv8 added and the designers decided to expose on aarch32. Therefore, aarch32 is not forward compatible with ARMv7, i.e., programs compiled for aarch32 might not run on ARMv7.
I'm not sure about system land. See also: Does ARMv8 AArch32 mode has backward compatible with armv4 , armv5 or armv6?

Availability of _rdrand_step intrinsics under Microsoft compilers?

According to Microsoft's x64 (amd64) Intrinsics List, Microsoft offers an intrinsic for RDRAND:
_rdrand16_step
_rdrand32_step
_rdrand64_step
However, the page does not discuss detecting the availability of the intrinsic. There is a footnote with [2], but it says its only available for Intel CPUs.
I have two questions. First, how can I detect the availability of the intrinsics. That is, what preprocessor macro should I use to guard the call to say _rdrand64_step.
Second, how can I access RDRAND under AMD CPUs? According to the AMD manual, AMD offers it too.
(More humorously, Microsoft titles the page amd64 Intrinsic List. Why do they call it AMD64 Intrinsic List when they don't include AMD???)
For AMD and the RDRAND instruction, reference AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions, page 278.
First, how can I detect the availability of the intrinsics. That is, what preprocessor macro should I use to guard the call to say _rdrand64_step.
Here are the compiler versions needed for RDRAND intrinsics:
Microsoft added RDRAND in August 2012, VS2012. Test for _MSC_VER >= 1700.
GCC added RDRAND in December 2010, GCC 4.6.
Clang added RDRAND in July 2012, Clang 3.2.
Intel added RDRAND in September 2011, ICC 12.1.
Second, how can I access RDRAND under AMD CPUs. According to the AMD manual, AMD offers it too.
AMD CPUs that provide the RDRAND instruction appear to be forth coming. That is, there are currently no CPUs shipping with the feature.
The Microsoft docs clearly state the intrinsics are for Intel CPUs only. To ensure AMD support given the anti-competitive history between Intel and AMD, the ASM should be crafted by hand and assembled with MASM/ML and MASM64/ML64.
you can check the version of MS compiler using:
MSVC++ 14.0 _MSC_VER == 1900 (Visual Studio 2015)
Detailed
I am not sure how to use it with AMD architecture. Will let you know if I get some solution
You can get the answer why MS documentation calls it amd64 in this post.

Compiling half float neon instructions for iOS

The issue I am having is with some neon instructions which I believe are supported on the arm7 architecture. I am using the default compiler (Apple LLVM 5.0), it recognises other neon instructions although it does not like the half-float instruction.
Here is the code:
vcvt.f32.f16, q0, d1
This has compiled on gcc although the apple compiler does not like this instruction and gives the error: Instruction requires: half-float
Is there a compiler flag I can give to XCode? I can't find out how to enable the half float instructions googling around.
Thanks!
The half-float format is actually not supported on all ARM v7 implementations. See the ARM manual here. It's required by vfp4, so if your chip supports that, that's a good start. In general I would recommend using run-time detection and dispatching. To enable the instruction in general, you would need to use one of several floating point support options, in general "fp16" is the keyword, for example:
-mfpu=neon-fp16 if you are sure that your target supports it for neon. I couldn't find all of the examples for llvm either, but I think they are generally compatible with the GCC options, found in the GCC manual.

Which compiler should be used for porting C code to ARM?

I am new to ARM. I have written C code,but I'm looking to port the code to ARM which runs on all ARM processors. I am going to develop high end applications such as those which run on smartphones/ tablets. Can you guys tell which is the best compiler for that? I have heard about RVDS, but that seems to be expensive.
My other question is: Can I use Microsoft Visual studio 2008 to program ARM Intrinsic like Neon? Are there any other alternatives for RVDS?
Your advice is greatly appreciated.
Several version of the gcc toolchain are available for ARM processors. You need to figure out the exact target for your code such as:
Which processor or set of processors ? What instruction sets and extensions are supported ? (There are many like ARMv6, ARMV7, ARMv7a). Some of them might have NEON support and some might not.
What kind of FPU support - hard FP vs soft FP ?
What kind of OS environment ? Linux ? Android ? Bare metal ?
Which C library - glibc, uclibc, bionic libc or something else ?
The last 2 are kind of built into the toolchain and cannot be modified. But choosing the exact instruction set and optimization can be controlled using ARM specific -m flags in gcc.
And distros like Ubuntu already have the ARM toolchain as part of their repos. You can give that a try too :
sudo apt-get install gcc-arm-linux-gnueabi

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