I am using Apache Camel in combination with Hawt.io administration console. I can enable tracing at route level, but I would need to enable tracing at a single processor level.
Is it possible in Apache Camel to enable tracing at a single processor? How ?
Tracing is by default for an entire route, so you cannot say you only want to trace a specific processor.
You can however use interceptors or other ways to do your own tracing and only capture that information for one processor.
http://camel.apache.org/intercept
But the out of the box tracing functionality is per route.
Related
Is there a way to run a background thread in solr that would run a systemd watchdog (ie sd_notify) to make systemd aware of solr's status?
This library seems like a reasonable way to implement sd_notify in java.
I can't find much information about a way to hook into SOLR's startup to kick off a background thread that would handle the sd_notify calls.
The situation is that multiple MIB custom handlers that access a hardware component if ever there was a time where 2 handlers we running in parallel it would cause errors. NOTE: Get and Set request use the same hardware component.
Net-SNMP is single-threaded. It can only run one piece of code at a time.
Net-SNMP is a protocol stack and not the framework, to make it run on the required platform or hardware you need to give the specific environment or encapsulation which can pick and poke hardware entities and other housekeeping.
For example: A single SNMP stack can run on distributed system having multiple blades and OS instances. And therefore scaling needs to be done by the platform.
I am working on an indoor vision based navigation in a GPS denied environment, and I'm using a 3DR Solo. I want to be able to send movement commands to the Solo through the DroneKit API. Are these mavlink commands supported for modes other than GUIDED and AUTO, or is channel overriding my only option?
It depends on how you want to control it. If you want to control the position of the copter, you will need to make hardware modifications to the solo, because it does not have the right sensors to be able to hold position indoors. If you want to control the raw angle of the copter, the cleanest way to do this is to send a SET_ATTITUDE_TARGET message. The problem is that this is only supported in guided mode, and guided mode won't arm without gps (even though low-level control like SET_ATTITUDE_TARGET doesn't rely on GPS). Guided-NoGPS mode is currently on the todo list for ArduCopter, so comment on the issue here to let the devs know that you are interested in this feature.
I have found some interesting information regarding CPU virtualization for ARM and I'm wondering if you guys could help me understand more about it.
Basically, folks at some company called SierraWare have developed an ARM secure-mode OS called SierraTEE that (they say) virtualizes a guest OS like Linux/Android running in non-secure mode, needing only the Security Extensions. A piece of information from one of their presentation documents has caught my attention, specifically at page 19 of this PDF http://www.sierraware.com/sierraware_tee_hypervisor_overview.pdf they state:
Integrity checks for Rootkits and Kernel Hacks:
Monitor Syscall interrupt and interrupt handler. This will ensure that core syscalls are not tampered with.
By "Syscall interrupt" I understand SVC (=old SWI) instruction executions (correct me if I'm wrong), but by "monitoring" I'm not really sure because it could be real-time monitoring, from-time-to-time monitoring or on certain-events monitoring. In my mind they could monitor the SVC handler to prevent tampering-with by either:
Inspect SVC handler from time to time (timer interrupt for instance, since IRQs and FIQs can be routed to monitor mode) - PatchGuard-like approach, doesn't seem very useful to me
Inspect SVC handler on SVC instruction execution (=certain-events monitoring)
Trap SVC handlers memory region write-access (=real-time monitoring)
Regarding approach 2: would it be possible to trap non-secure SVC instruction executions from secure-mode?
Regarding approach 3: would it be possible to hook non-secure memory-region writes by using only the Security Extensions?
Thanks very much in advance
"Monitor" here may refer to the Monitor mode, the new mode added by the Security Extensions.
I'm not very familiar with the Security Extensions but I imagine it should be possible to mark specific memory regions as secure so any access to them will result in a Monitor mode trap, which can then handle the access and resume the non-secure code execution.
However, I just found this notice in the ARM ARM (B1.8.7 Summaries of asynchronous exception behavior):
In an implementation that includes the Security Extensions but does
not include the Virtualization Extensions, the following
configurations permit the Non-secure state to deny service to the
Secure state. Therefore, ARM recommends that, wherever possible, these
configurations are not used:
Setting SCR.IRQ to 1. With this configuration, Non-secure PL1 software can set CPSR.I to 1, denying the required routing of IRQs to
Monitor mode.
Setting SCR.FW to 1 when SCR.FIQ is set to 1. With this configuration, Non-secure PL1 software can set CPSR.F to 1, denying
the required routing of FIQs to Monitor mode.
The changes introduced by the Virtualization Extensions remove these
possible denials of service.
So it would seem it's not possible to achieve perfect virtualization with just Security Extensions.
How can I determine if an ETW session is dropping events?
If it is dropping events, how can I configure the tracing session so that events are not dropped?
I've written a custom ETW provider to help with some debugging efforts. I'm currently capturing the trace data using logman.exe.
In viewing the results, it appears that some of the events are being dropped. Basically I'm seeking something like:
Event A
Event C
where their should be an intervening Event B, but one does not appear in the trace file. It should be impossible for that to happen, which leads me to believe that ETW is dropping events.
Of course, I'd like to verify that the problem I'm seeing is due to dropped events, and not caused by a bug in my code. I've tried Google, but wasn't able to come up with anything. Does any one know how I can check to see if events are being dropped?
It doesn't answer the question directly (how to detect drops), but it might explain drops:
EVENT_TRACE_NO_PER_PROCESSOR_BUFFERING
Writes events that were logged on different processors to a common
buffer. Using this mode can eliminate the issue of events appearing
out of order when events are being published on different processors
using system time. This mode can also eliminate the issue with
circular logs appearing to drop events on multiple processor
computers.
If you do not use this mode and you use system time, the events may
appear out of order on multiple processor computers. This is because
ETW buffers are associated with a processor instead of a thread. As a
result, if a thread is switched from one CPU to another, the buffer
associated with the latter CPU can be flushed to disk before the one
associated with the former CPU.
If you expect a high volume of events (for example, more than 1,000
events per second), you should not use this mode.
Note that the processor number is not included with the event. Not
available prior to Windows 7 and Windows Server 2008 R2.
I've been using logman to capture the results. It looks like tracelog will give me info about lost events, and I can tweek its buffer parameters to reduce the event loss.
If you use xperf to collect the logs, it generates a warning when events are lost. With xperf you can also play with the buffer size and can divide the logging to several loggers.