I'm getting a strange error when building this project. It compiles everything successfully, but on the end, make tells me:
make: *** No rule to make target `cc', needed by `game'. Stop.
Here's the makefile:
TARGET = game
SDL_INC_DIR = /usr/include/SDL
SDL_LIB_DIR = /usr/lib/SDL
CFLAGS = -D __SDL__ -O2 -g -Wall -I$(SDL_INC_DIR)
LDFLAGS = -L$(SDL_LIB_DIR) -lSDL
OBJECTS = game/ai/boost.o \
game/ai/bullet.o \
game/ai/death.o \
game/ai/explode.o \
game/ai/pickup.o \
game/ai/quad.o \
game/ai/sheba.o \
game/ai/static_model.o \
game/ai/static_sprite.o \
game/ai/teleporter.o \
game/ai/torch.o \
game/data.o \
game/entities.o \
game/game.o \
game/maps.o \
game/models.o \
game/screens.o \
game/sprites.o \
platform/main.o
$(TARGET): $(OBJECTS) $(CC) $(CFLAGS) $(LDFLAGS) -o $(TARGET) $(OBJECTS)
clean:
rm -f *.o game/*.o game/ai/*.o
You need to put $(CC) and the rest on the next line, after a tab:
$(TARGET): $(OBJECTS)
$(CC) $(CFLAGS) $(LDFLAGS) -o $(TARGET) $(OBJECTS)
It was able to compile the target successfully anyway using the default rule.
$(CC) is not defined. Add $(CC)=gcc also put it on a new line otherwise it will take them as dependencies
Related
I want to include in a random test.c file my own library to test if it works but I can't do it.
Even a simple make all doesn't work, but I'm supposed to have done everything right. I have the impression that my makefile doesn't even compile my .c files in .o
here is my make file:
SRCS = ft_atoi.c ft_isascii.c ft_memchr.c ft_putchar_fd.c ft_strchr.c ft_strlen.c ft_strtrim.c \
ft_bzero.c ft_isdigit.c ft_memcmp.c ft_putendl_fd.c ft_strdup.c ft_strmapi.c ft_substr.c \
ft_calloc.c ft_isprint.cft_memcpy.c ft_putnbr_fd.c ft_strjoin.c ft_strncmp.c ft_tolower.c \
ft_isalnum.c ft_itoa.c ft_memmove.c ft_putstr_fd.c ft_strlcat.c ft_strnstr.c ft_toupper.c \
ft_isalpha.c ft_memccpy.c ft_memset.c ft_split.c ft_strlcpy.c ft_strrchr.c \
\
CC = gcc
CFLAGS = -Wall -Wextra -Werror
HEADER = libft.h
OBJS = $(SRCS:.c=.o)
RM = rm -f
NAME = libft.a
.c.o:
$(CC) $(CFLAGS) -c $< -o ${<:.c=.o}
$(NAME): $(OBJS) $(HEADER)
ar rcs $(NAME) $(OBJS)
all: $(NAME)
clean:
$(RM) $(OBJS)
fclean: clean
$(RM) $(NAME)
re: fclean all
.PHONY: all clean fclean re
I am trying to compile a simple C function to handle two stacks of ints and sorting them with specific rules.
I had no problem compiling earlier but I can't anymore. and receive this error message :
make: *** No rule to make target `objs/main.c', needed by `push_swap'. Stop.
Below is my code;
NAME = push_swap
SRC_DIR = srcs
SRC = main.c \
instructions/swap.c \
instructions/rotate.c \
instructions/push.c \
instructions/reverse.c \
utils/check_duplicate.c \
utils/chunk_clear.c \
utils/chunk.c \
utils/ft_error.c \
utils/ft_split.c \
utils/highest.c \
utils/init_stack.c \
utils/is_sorted.c \
utils/lowest.c \
utils/num.c \
utils/tab.c \
sort/five.c \
sort/small.c \
sort/sorter.c \
OBJ_DIR = objs
OBJ = $(addprefix $(OBJ_DIR)/, $(SRC:.c =.o))
HEADER_FOLDER = inc
CC = gcc
CFLAGS = -Werror -Wextra -Wall -I$(HEADER_FOLDER) -g
RM = rm -rf
all: $(NAME)
$(OBJ_DIR):
#mkdir -p $(OBJ_DIR)
#mkdir -p $(OBJ_DIR)/operations
#mkdir -p $(OBJ_DIR)/sorters
#mkdir -p $(OBJ_DIR)/utils
$(NAME): $(OBJ_DIR) $(OBJ)
#cd libft && make && cd ../
#echo "making push_swap ... \033[32mok\033[0m"
#$(CC) $(CFLAGS) -o $(NAME) $(OBJ) $(HEADER)
$(OBJ_DIR)/%.o: $(SRC_DIR)/%.c
#echo "Compiling ... $# \033[32mok\033[0m"
#$(CC) $(CFLAGS) -c $< -o $#
clean:
#cd libft && make clean && cd ../
#echo "Removing object files ... \033[32mok\033[0m"
#$(RM) $(OBJ) $(OBJ_DIR)
fclean:
#cd libft && make fclean && cd ../
#echo "Removing files and program ... \033[32mok\033[0m"
#$(RM) $(NAME) $(OBJ) $(OBJ_DIR)
re: fclean all
.PHONY: all re fclean clean
The problem is that $(SRC:.c =.o) doesn't work because of that space (there are no SRC names ending with ".c " (including the last space).
It should be $(SRC:.c=.o).
I´m trying to create a Makefile that build a lib and compile the file. My problem is that depending on the %.c file I need to compile with different lib.
The SRC_MLX need the $(LFLAGS) and the SRC don´t. So the gcc compiler don´t allow me to compile the SRC with the LFLAGS. That´s the reason I need to separate.
I´ve tried this way:
SRCS = $(DIR_SRC)/ft_utils.c \
$(DIR_SRC)/ft_adt.c \
$(DIR_SRC)/ft_circle.c \
$(DIR_SRC)/ft_line.c \
$(DIR_SRC)/ft_trgb.c \
$(DIR_SRC)/ft_quadrilateral.c \
$(DIR_SRC)/ft_player.c \
$(DIR_SRC)/ft_color.c
SRCS_MLX = $(DIR_SRC)/win_update.c \
$(DIR_SRC)/ft_vars.c \
$(DIR_SRC)/ft_image.c \
$(DIR_SRC)/ft_map.c
$(NAME): $(LIB_NAME)
$(CC) $(CFLAGS) main.c -I. -I$(DIR_MLX) -L$(DIR_MLX) -L. $(LFLAGS) $(LIB_FLAG) -o $# -g
$(DIR_OBJ)/$(OBJ).o: $(DIR_SRC)/$(SRCS).c
mkdir -p $(DIR_OBJ)
$(CC) $(CFLAGS) -c $< -I. -I$(DIR_MLX) -o $#
$(DIR_OBJ)/$(OBJ_MLX).o: $(DIR_SRC)/$(SRCS_MLX).c
mkdir -p $(DIR_OBJ)
$(CC) $(CFLAGS) -c $< -I. -I$(DIR_MLX) -L$(DIR_MLX) $(LFLAGS) -o $#
$(LIB_NAME): $(OBJ_MLX) LIB_OBJ
$(AR) $(LIB_NAME) $(OBJ)
ranlib $(LIB_NAME)
LIB_OBJ: $(OBJ)
$(AR) $(LIB_NAME) $(OBJ)
In the example above I´ve tried to create a lib with one kind of files and after that create a lib with the first lib with the others files. But I keep getting this error:
Makefile:41: warning: overriding recipe for target '.objs/'
Makefile:37: warning: ignoring old recipe for target '.objs/'
make: Warning: File 'Makefile' has modification time 454 s in the future
rm -f .objs/ft_utils.o .objs/ft_adt.o .objs/ft_circle.o .objs/ft_line.o .objs/ft_trgb.o .objs/ft_quadrilateral.o .objs/ft_player.o .objs/ft_color.o
rm -f libcub3d.a
rm -f main
make: *** No rule to make target 'src/src/win_update.c', needed by '.objs/win_update.o'. Stop.
How can I compile this objects with different lib?
P.S. Those are my variables:
DIR_OBJ = .objs
DIR_SRC = src
DIR_LIB = lib
DIR_MLX = ./minilibx-linux
NAME = main
LIB_NAME = libcub3d.a
OBJ = $(patsubst $(DIR_SRC)/%.c, $(DIR_OBJ)/%.o, $(SRCS))
OBJ_MLX = $(patsubst $(DIR_SRC)/%.c, $(DIR_OBJ)/%.o, $(SRCS_MLX))
CC = clang
CFLAGS = -Wall -Werror -Wextra
LFLAGS = -lmlx -lm -lX11 -lXext -lbsd
LIB_FLAG = -lcub3d
AR = ar -rc
RM = rm -f
These lines are definitely not right:
$(DIR_OBJ)/$(OBJ).o: $(DIR_SRC)/$(SRCS).c
...
$(DIR_OBJ)/$(OBJ_MLX).o: $(DIR_SRC)/$(SRCS_MLX).c
along with the way you've defined SRCS and SRCS_MLX and these:
OBJ = $(patsubst $(DIR_SRC)/%.c, $(DIR_OBJ)/%.o, $(SRCS))
OBJ_MLX = $(patsubst $(DIR_SRC)/%.c, $(DIR_OBJ)/%.o, $(SRCS_MLX))
Just expand the variables in the rule in your head, or else ask make to expand it for you with the info function, and you'll see it's definitely not right:
$(info output is '$(DIR_OBJ)/$(OBJ).o: $(DIR_SRC)/$(SRCS).c')
I have a little problem on this Makefile, my makefile recompile each time, when I call make command. What is the problem?
CC = gcc -Wall -Werror -Wextra
INC=includes
INC_LIB=libft/includes
SRC_PATH = srcs
OBJ_PATH = srcs
NAME = vital
NAME_CLIENT = client
NAME_SERVER = server
INCLUDES = ./includes/server.h ./includes/client.h
INCLUDES_GCH = ./includes/server.h.gch ./includes/client.h.gch
LIB_PATH = libft
SRC_M_SERVER_PATH = server
SRC_M_CLIENT_PATH = client
################################################
### SOURCES
###############################################
SRC_M_CLIENT = client.c main_client.c manage_put_client.c manage_get_client.c create_client.c usage_builtin.c make_client.c remaster_prompt.c my_send_and_recv.c
SRC_M_SERVER = server.c main_server.c manage_builtin.c ft_put.c create_server.c server_make.c ft_cd.c ft_mkdir.c ft_ls.c ft_pwd.c ft_quit.c ft_get.c network.c get_server_make.c
SRC_M_C = $(addprefix ./$(SRC_M_CLIENT_PATH)/, $(SRC_M_CLIENT))
SRC_M_S = $(addprefix ./$(SRC_M_SERVER_PATH)/, $(SRC_M_SERVER))
###############################################
### OBJECT
##############################################
OBJ_M_CLIENT = $(patsubst %.c, %.o, $(SRC_M_CLIENT))
OBJ_M_SERVER = $(patsubst %.c, %.o, $(SRC_M_SERVER))
OBJ_M_C = $(addprefix ./$(OBJ_PATH)/, $(OBJ_M_CLIENT))
OBJ_M_S = $(addprefix ./$(OBJ_PATH)/, $(OBJ_M_SERVER))
OBJ_ALL = $(OBJ_M_C) $(OBJ_M_S)
####################################################
#################### RULES ########################
.PHONY: all libft clean fclean re
all: $(NAME)
$(NAME): lib $(OBJ_M_C) $(OBJ_M_S)
$(CC) $(OBJ_M_C) $(OBJ_M_U) -L ./libft -lft -o $(NAME_CLIENT)
$(CC) $(OBJ_M_S) $(OBJ_M_U) -L ./libft -lft -o $(NAME_SERVER)
$(OBJ_M_C): $(OBJ_PATH)%.o : $(SRC_PATH)/$(SRC_M_CLIENT_PATH)%.c
$(CC) $(CFLAGS) -I$(INC) -I $(INC_LIB) -c $< -o $#
$(OBJ_M_S) : $(OBJ_PATH)%.o : $(SRC_PATH)/$(SRC_M_SERVER_PATH)%.c
$(CC) $(CFLAGS) -I$(INC) -I $(INC_LIB) -c $< -o $#
lib:
#cd $(LIB_PATH) && make
cleanlib:
#cd $(LIB_PATH) && make clean
#echo "$(COL_WHITE)[ CLEAN LIBFT ]\n"
fcleanlib: cleanlib
#cd $(LIB_PATH) && make fclean
#echo "$(COL_WHITE)[ FCLEAN LIBFT ]\n"
clean: cleanlib
rm -rf $(OBJ_ALL) $(OBJ_M_M) $(INCLUDES_GCH)
fclean: fcleanlib clean
rm -rf $(NAME_CLIENT) $(NAME_SERVER)
re : fclean $(NAME)
When I use make command, it run $(NAME) and launch gcc.
I have this result:
make[1]: Nothing to be done for `all'. (ma lib)
gcc -Wall -Werror -Wextra ./srcs/client.o ./srcs/main_client.o ./srcs/manage_put_client.o ./srcs/manage_get_client.o ./srcs/create_client.o ./srcs/usage_builtin.o ./srcs/make_client.o ./srcs/remaster_prompt.o ./srcs/my_send_and_recv.o -L ./libft -lft -o client
gcc -Wall -Werror -Wextra ./srcs/server.o ./srcs/main_server.o ./srcs/manage_builtin.o ./srcs/ft_put.o ./srcs/create_server.o ./srcs/server_make.o ./srcs/ft_cd.o ./srcs/ft_mkdir.o ./srcs/ft_ls.o ./srcs/ft_pwd.o ./srcs/ft_quit.o ./srcs/ft_get.o ./srcs/network.o ./srcs/get_server_make.o -L ./libft -lft -o server
Any suggestion?
You have not 'made clear' all the details; however, the following Makefile should get you moving in the right direction.
Note: replace all<tab> with a tab
Note: use := so the macros are only evaluated once
CC := /usr/bin/gcc -Wall -Werror -Wextra
RM := /bin/rm -rf
MAKE := /usr/bin/make
INC := includes
INC_LIB := libft/includes
SRC_PATH := srcs
OBJ_PATH := srcs
NAME_CLIENT := client
NAME_SERVER := server
SERVER_INCLUDES := includes/server.h
CLIENT_INCLUDES := includes/client.h
LIB_PATH := libft
SRC_M_SERVER_PATH := server
SRC_M_CLIENT_PATH := client
################################################
### SOURCES
###############################################
SRC_M_CLIENT := client.c \
main_client.c \
manage_put_client.c \
manage_get_client.c \
create_client.c \
usage_builtin.c \
make_client.c \
remaster_prompt.c \
my_send_and_recv.c
SRC_M_SERVER := server.c \
main_server.c \
manage_builtin.c \
ft_put.c \
create_server.c \
server_make.c \
ft_cd.c \
ft_mkdir.c \
ft_ls.c \
ft_pwd.c \
ft_quit.c \
ft_get.c \
network.c \
get_server_make.c
SRC_M_C := $(addprefix ./$(SRC_M_CLIENT_PATH)/, $(SRC_M_CLIENT))
SRC_M_S := $(addprefix ./$(SRC_M_SERVER_PATH)/, $(SRC_M_SERVER))
###############################################
### OBJECT
##############################################
OBJ_M_CLIENT := $(patsubst %.c, %.o, $(SRC_M_CLIENT))
OBJ_M_SERVER := $(patsubst %.c, %.o, $(SRC_M_SERVER))
OBJ_M_C := $(addprefix ./$(OBJ_PATH)/, $(OBJ_M_CLIENT))
OBJ_M_S := $(addprefix ./$(OBJ_PATH)/, $(OBJ_M_SERVER))
####################################################
#################### RULES ########################
.PHONY: all clean libclean
all: $(NAME_CLIENT) $(NAME_SERVER)
# link client
$(NAME_CLIENT) : $(OBJ_M_C)
<tab>$(CC) $^ -o $# -L$(LIB_PATH) -lft
# link server
$(NAME_SERVER) : $(OBJ_M_S)
<tab>$(CC) $^ -o $# -L$(LIB_PATH) -lft
# compile sources
%.o : %.c $(INC_CLIENT) $(INC_SERVER) $(INC)
<tab>$(CC) $(CFLAGS) -c $< -o $# -I$(INC_CLIENT) $(INC_SERVER) -I$(INC)
# is there another Makefile in the $(LIB_PATH) directory?
cleanlib: clean
<tab>(#cd $(LIB_PATH) && $(MAKE) clean)
<tab>#echo "$(COL_WHITE)[ CLEAN LIBFT ]\n"
clean:
<tab>$(RM) $(OBJ_M_C) $(OBJ_M_S)
Change this line:
.PHONY: all libft clean fclean re
to
.PHONY: clean fclean re
.PHONY disables file association checks
I am trying to make a Makefile and I am getting errors:
make: * No rule to make target main.c, needed by main.o. Stop.
Can anyone explain why I am getting this error, or even suggest a fix if possible, Thank you.
TARGET = example
SRC_FILES = \
Makefile \
README \
a.c \
a.h \
b.c \
b.h \
main.c
OBJS = \
main.o \
a.o \
b.o
CC = gcc
CFLAGS = -g -Wall -std=c99
(TARGET): $(OBJS)
$(CC) $(OBJS) $(LDFLAGS) -o $#
$(TARGET): $(TARGET).html $(TARGET).pdf
$(TARGET).html: $(TARGET).umt
$(UMT) $< >$#
$(TARGET).pdf: $(TARGET).html
$(HTML2PS) -N 0 -n $(TARGET).html > $(TARGET).ps
$(PS2PDF) $(TARGET).ps
rm -f $(TARGET).ps
clean:
rm -f $(TARGET).html $(TARGET).pdf
a.o: a.c a.h
b.o: b.c b.h
main.o: main.c a.h b.h
Deduplicator already explained why you are getting this error. Suggested fix: Provide a main.c, or change the file names in the make file to the names of the files you have (example.c maybe).