Bloodshed Error 1 in C program (newbie, first C program) - c

So i just started learning C using bloodshed as my compiler and stuff....
i am using book "C for dummies".
So this is what i did->
File>New>Source File
Then wrote this code->
#include <stdio.h>
int main()
{
printf("Goodbye, cruel world!\n");
return(0);
}
Then went to Execute>Compile and Run.
But it says me in compiler as->
" C:\Users\Jaskaran\Documents\Makefile.win [Build Error] [Project1.exe] Error 1 "
Please help. This is basically my first C program.
My makefile.win content->
# Project: Project1
# Makefile created by Dev-C++ 4.9.9.2
CPP = g++.exe
CC = gcc.exe
WINDRES = windres.exe
RES =
OBJ = main.o $(RES)
LINKOBJ = main.o $(RES)
LIBS = -L"D:/Programs/Dev-Cpp/lib"
INCS = -I"D:/Programs/Dev-Cpp/include"
CXXINCS = -I"D:/Programs/Dev-Cpp/lib/gcc/mingw32/3.4.2/include" -I"D:/Programs/Dev-Cpp/include/c++/3.4.2/backward" -I"D:/Programs/Dev-Cpp/include/c++/3.4.2/mingw32" -I"D:/Programs/Dev-Cpp/include/c++/3.4.2" -I"D:/Programs/Dev-Cpp/include"
BIN = Project1.exe
CXXFLAGS = $(CXXINCS)
CFLAGS = $(INCS)
RM = rm -f
.PHONY: all all-before all-after clean clean-custom
all: all-before Project1.exe all-after
clean: clean-custom
${RM} $(OBJ) $(BIN)
$(BIN): $(OBJ)
$(CC) $(LINKOBJ) -o "Project1.exe" $(LIBS)
main.o: main.c
$(CC) -c main.c -o main.o $(CFLAGS)

Use regular double-quotes like this: "

Related

Linking is no occuring in my Makefile; returns 'undefined reference to `main'

This simple program (two .c files and one .h) compiles and links properly from the command line. However, my Makefile is throwing an error during the linking stage. Proper tab usage is in effect.
CC = gcc
BINDIR = bin/
OBJDIR = obj/
SRCDIR = src/
MKDIR = mkdir -p
RM = rm -rf
SRC = $(wildcard $(SRCDIR)*.c)
_OBJS = $(patsubst $(SRCDIR)%.c, %.o, $(SRC))
OBJS = $(addprefix $(OBJDIR), $(_OBJS))
CFLAGS = -Wall -g -Iinclude
.PHONY: all
all: $(BIN)
_BIN = a.out
BIN = $(addprefix $(BINDIR), $(_BIN))
$(BIN): $(OBJS) $(BINDIR)
$(CC) -o $# $(CFLAGS) $<
$(BINDIR):
$(MKDIR) $(BINDIR)
$(OBJS): $(SRC) $(OBJDIR)
$(CC) $(CFLAGS) -c $< -o $#
$(OBJDIR):
$(MKDIR) $(OBJDIR)
.PHONY: clean
clean:
#echo "Cleaning things up..."
$(RM) $(OBJDIR) $(BINDIR)
The program's files:
main.c
#include <stdio.h>
#include <stdlib.h>
#include "hellomake.h"
int main(void) {
myPrintHelloMake();
return EXIT_SUCCESS;
}
hellomake.c
#include <stdio.h>
#include "hellomake.h"
void myPrintHelloMake(void) {
puts("Hello makefiles!");
}
hellomake.h
#ifndef __HELLO_H__
#define __HELLO_H__
void myPrintHelloMake(void);
#endif
The .c files are in the src/ directory and the .h file is in the include/ directory. Makefile compiles the code, creates the obj/ directory, and places and main.o and hellomake.o therein. However, that is where things break down. Here is gcc's complaint:
$ make
mkdir -p obj/
gcc -Wall -g -Iinclude -c src/hellomake.c -o obj/hellomake.o gcc -Wall -g -Iinclude -c src/hellomake.c -o obj/main.o mkdir -p bin/ gcc -o bin/a.out -Wall -g -Iinclude
obj/hellomake.o /usr/bin/ld: /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/Scrt1.o: in function `_start': (.text+0x20): undefined reference to `main' collect2: error: ld returned 1 exit status make: *** [Makefile:34: bin/a.out] Error 1
There were a number of issues.
I'd leave off / from (e.g.) BINDIR et. al.
The patsubst was incorrect. It needed $(OBJDIR) in the the TO
Using _OBJS was unnecessary/harmful.
The rule for $(OBJS) was incorrect. It created the two .o files using the first prereq source, so [the function] main was defined twice. It needs a pattern rule instead.
Using $(BINDIR) as a prereq for $(BIN) added bin/ at the end of the gcc line [and it complained]
As M.Oehm mentioned, $< only gets the first prereq.
The all: was indented so it was not recognized properly
Anyway, here's the corrected Makefile:
CC = gcc
BINDIR = bin
OBJDIR = obj
SRCDIR = src
MKDIR = mkdir -p
RM = rm -rf
SRC = $(wildcard $(SRCDIR)/*.c)
###_OBJS = $(patsubst $(SRCDIR)%.c, %.o, $(SRC))
###OBJS = $(addprefix $(OBJDIR), $(_OBJS))
OBJS = $(patsubst $(SRCDIR)/%.c, $(OBJDIR)/%.o, $(SRC))
CFLAGS = -Wall -g -Iinclude
_BIN = a.out
BIN = $(addprefix $(BINDIR)/, $(_BIN))
.PHONY: all
all: $(BINDIR) $(OBJDIR) $(BIN)
####$(BIN): $(OBJS) $(BINDIR)
$(BIN): $(OBJS) $(BINDIR)
###$(CC) -o $# $(CFLAGS) $<
$(CC) -o $# $(CFLAGS) $(OBJS)
$(BINDIR):
$(MKDIR) $(BINDIR)
###$(OBJS): $(SRC) $(OBJDIR)
$(OBJDIR)/%.o: $(SRCDIR)/%.c
$(CC) $(CFLAGS) -c $< -o $#
$(OBJDIR):
$(MKDIR) $(OBJDIR)
.PHONY: clean
clean:
#echo "Cleaning things up..."
$(RM) $(OBJDIR) $(BINDIR)

Why is the Makefile not generating the objects?

When I compilate the library (4 folders: 1 inc -> mylib.h, lib, obj, src -> mylib.c) with this makefile:
makefile:
CC = gcc
AR = ar
CFLAGS = -c -Wall
all: Release
Release: my
my: my.o
$(AR) rc lib/libmy.a obj/my.o
bash gen_pc.sh
obj/my.o: src/my.c
$(CC) $(CFLAGS) src/my.c -o obj/my.o
clean:
rm -f obj/my.o lib/libmy.a lib/libmy.pc
gen_pc:
current_path=`readlink -e .`
cat > lib/libmy.pc << EOM
prefix=$current_path
includedir=\${prefix}/inc
libdir=\${prefix}/lib
Name: my
Description: My library
Version: 1.0
Cflags: -I\${includedir}
Libs: -L\${libdir} -lmy
Libs.private: -lm
EOM
no .o files / objects are generated in lib folder even if when running make in terminal I don't receive any errors:
make
gcc -c -Wall src/my.c -o obj/my.o
ar rc lib/libmy.a obj/my.o
Any idea why this happens?

Make file in C giving fatal error

I am trying to create a makefile in C but i am facing some issues.
I have my main .c, one .c which keeps the functions implementations and one .h which keeps the functions declarations.
When i try to run the makefile, i get a fatal error.
here is my makefile:
INCL = prog.h
SRC = prog.c prog_fun.c
OBJ = $(SRC:.c=.o)
EXE = prog
CC = gcc
CFLAGS = -c
RM = rm -rf
all: prog
prog: prog.o prog_fun.o
gcc -o prog prog.o prog_fun.o
prog.o: prog.c
gcc -c prog.c
prog_fun.o: prog_fun.c prog.h
gcc -c prog.c
clean:
$(RM) $(OBJ) $(EXE)
The error i get is this:
gcc -c prog.c
prog.c:11:19: fatal error: prog.h: No such file or directory
compilation terminated.
Makefile:17: recipe for target 'prog.o' failed
make: *** [prog.o] Error 1
Can anyone please help me with this?
What you are trying to do by using this
prog_fun.o: prog_fun.c header.h
It should be only
prog_fun.o: prog_fun.c
Modify your make file as
xyz#xyz-PC:~$ vi makefile
INCL = header.h
SRC = prog.c prog_fun.c
OBJ = $(SRC:.c=.o)
EXE = prog
CC = gcc
CFLAGS = -c
RM = rm -rf
all: prog
prog: prog.o prog_fun.o
gcc -o prog prog.o prog_fun.o
prog.o: prog.c
gcc -c prog.c header.h
prog_fun.o: prog_fun.c
gcc -c prog_fun.c header.h
clean:
$(RM) $(OBJ) $(EXE)
next run it
xxyz#xyz-PC:~$ make
gcc -c prog.c header.h
gcc -c prog_fun.c header.h
gcc -o prog prog.o prog_fun.o
I hope it will work now and make sure indention is correct(not manual spaces, it should be tab key)

SHA1 library link not found using makefile

I'm having trouble linking the sha library with my makefile while compiling.
Here is my makefile:
CFLAGS= -g -Wall -Werror -std=c99 -pedantic
LDFLAGS=-lssl -lcrypto
CC = gcc
LD = gcc
OBJS = dhtnode.o
PROG = dhtnode
.c.o:
gcc $< -o $# $(CFLAGS)
all: $(PROG)
$(PROG): $(OBJS)
$(LD) $(LDFLAGS) $(OBJS) -o $(PROG)
dhtnode.o: dhtnode.c dhtpackettypes.h
$(CC) $(CFLAGS) $(LDFLAGS) dhtnode.c
clean:
/bin/rm -f *.o dhtnode
My function using the lcrypto library is here:
#include <openssl/sha.h>
#include <stdlib.h>
#include <stdin.h>
//there are other includes but not concerning this part of the code
char sha() {
char *ibuf = malloc(sizeof(char));
ibuf ="172.0.0.1:11112";
char *obuf = malloc(SHA_DIGEST_LENGTH);
SHA1((unsigned char*)ibuf, strlen(ibuf), (unsigned char*)obuf);
int i;
for (i = 0; i < 20; i++) {
printf("%x" , (unsigned char)obuf[i]);
}
printf("\n");
return *ibuf;
}
Here is the error I get when building with Eclipse:
C/p2p/dhtnode.c:107: undefined reference to `SHA1'
Can anybody tell my what is wrong with my makefile or possible eclipse settings?
Thx in advance!
When compiling the object file, you don't need the LDFLAGS. You'll also need the -c compiler flag to produce an object file instead of linking a binary:
dhtnode.o: dhtnode.c dhtpackettypes.h
$(CC) $(CFLAGS) -c dhtnode.c
After making this change, the program compiles and links successfully for me.

Makefile Error : Command Not Found- while creating a shared library

I have 4 .c files hello.c,here.c,bye.c and main.c.
One header file mylib.h
The contents are as follows
hello.c
#include<stdio.h>
void hello()
{
printf("Hello!\n");
}
here.c
#include<stdio.h>
void here()
{
printf("I am here \n");
}
bye.c
#include<stdio.h>
void bye()
{
printf("Bye,Bye");
}
main.c
#include<stdio.h>
#include "mylib.h"
int main()
{
hello();
here();
bye();
return 1;
}
mylib.h
#ifndef _mylib_
#define _mylib_
void hello();
void here();
void bye();
#endif
The makefile for creating a static lib is :
Makefile
#Which Compiler
CC = gcc
#Compiler Flags
CFLAGS = - Wall -c -fPIC
DYNLINKFLAGS = -shared -W1,-soname,$#.0
PROG = main
PROG_OBJS = main.c
LIB = mylib
LIB_FILES = libmylib.so
LIB_MINOR = $(LIB_FILES).0.1
LIB_RELEASE = $(LIB_MINOR).0
LIB_OBJS = hello.o here.o bye.o
PATH = /home/srinivasa/cspp51081/labs/srinivasa.lab2.1
all: $(LIB_FILES) $(PROG)
#Create Lib with this file
$(LIB_FILES): $(LIB_OBJS)
$(CC) $(DYNLINKFLAGS) $^
ln -sf $(LIB_RELEASE) $(LIB_MINOR)
ln -sf $(LIB_MINOR) $#
ln -sf $# $#.0
#Compiling main program and link with shared library
$(PROG): $(PROG_OBJS)
$(CC) -o $(PROG) $(PORG_OBJS) -l$(LIB) -L$(PATH)
main.o: main.c
hello.o: hello.c
here.o: here.c
bye.o: bye.c
#clean files
clean:
rm -rf $(LIB_OBJS) $(LIB_FILES) $(LIB_RELEASE) $(LIB_MINOR) libmylib.so.0
Problem: When I execute the command
make -f Makefile all
I get the error:
gcc -Wall -fPIC -c -o hello.o hello.c
make: gcc: Command not found
make: * [hello.o] Error 127
Questions : How do I resolve this?
+++++
OK. Lets revert to your original code, but with a small difference.
Change DYNLINKFLAGS back to:
DYNLINKFLAGS = -shared -Wl,-soname,$#.0
Then change the library link to:
$(CC) $(DYNLINKFLAGS) -o $(LIB_RELEASE) $^
ln -sf $(LIB_RELEASE) $(LIB_MINOR)
ln -sf $(LIB_MINOR) $#
ln -sf $# $#.0
Do "rm -f lib*", build and then post make output.
There are a few bugs (just typos) I can see is:
space between - and Wall:
CFLAGS = - Wall -c -fPIC
^
PORG_OBJS should be PROG_OBJS
$(CC) -o $(PROG) $(PORG_OBJS) -L$(PATH)
^^^^
You are doing an absolute assignment to PATH. Now every executable called in makefile will be search in that directory. Since gcc is not found in that directory you get this error. To fix this you can either use a different variable name or add your directory to current path as:
PATH := $(PATH):/home/srinivasa/cspp51081/labs/srinivasa.lab2.1
^ ^^^^^^^^
Try changing this line from:
$(CC) -o $(PROG) $(PORG_OBJS) -l$(LIB) -L$(LIBPATH)
to:
$(CC) -o $(PROG) $(PORG_OBJS) -L$(LIBPATH) -l$(LIB)
The -L flag needs to precede the -l flags.
OK. First change:
DYNLINKFLAGS = -shared -W1,-soname,$#.0
to
DYNLINKFLAGS = -shared -W1,-soname,$#
Then change:
ln -sf $(LIB_RELEASE) $(LIB_MINOR)
ln -sf $(LIB_MINOR) $#
ln -sf $# $#.0
To:
ln -sf $# $(LIB_RELEASE)
ln -sf $# $(LIB_MINOR)
ln -sf $# $#.0
Then post the library links and the final executable link.

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