Calculation of CGMA in CUDA - c

Question

I am confused with the calculation of CGMA. I know that CGMA = # of operations / # of memory fetches. Firstly, when x = g_A[idx], should I count the write operation to x or ignore it because it is stored in register? Likewise, in z = (x*y) + (y/x) + (y-x);, should I count read of x and y as memory reads in the calculation of CGMA? Finally, should I count all the operations in the Kernel function (those five lines)?
__global__ void PerformSomeOperations(int* g_A,int* g_B,int* g_C, int Size)
{
const int idx = threadIdx.x + (blockIdx.x*blockDim.x);
if(idx < Size)
{
int x = g_A[idx];
int y = g_B[idx];
int z = 0;
z = (x*y) + (y/x) + (y-x);
g_C[idx] = z;
}
}

Answer 1

The disassembled code corresponding to your kernel (compiled for compute_20,sm_20) is the following
/*0000*/ MOV R1, c[0x1][0x100];
/*0008*/ S2R R0, SR_CTAID.X;
/*0010*/ S2R R2, SR_TID.X;
/*0018*/ IMAD R0, R0, c[0x0][0x8], R2;
/*0020*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x2c], PT;
/*0028*/ #P0 EXIT ;
/*0030*/ SHL R0, R0, 0x2;
/*0038*/ IADD R2, R0, c[0x0][0x20];
/*0040*/ IADD R3, R0, c[0x0][0x24];
/*0048*/ IADD R0, R0, c[0x0][0x28];
/*0050*/ LD R2, [R2]; R2 = x = g_A[idx]
/*0058*/ LD R3, [R3]; R3 = y = g_B[idx]
/*0060*/ I2I.S32.S32 R5, |R2|;
/*0068*/ I2F.F32.U32.RP R4, R5; R4 = (float)x
/*0070*/ MUFU.RCP R4, R4; R4 = 1/R4
/*0078*/ IADD32I R4, R4, 0xffffffe;
/*0080*/ F2I.FTZ.U32.F32.TRUNC R4, R4;
/*0088*/ IMUL.U32.U32 R6, R5, R4; R6 = x * (1/y)
/*0090*/ I2I.S32.S32 R7, -R6;
/*0098*/ I2I.S32.S32 R6, |R3|;
/*00a0*/ IMAD.U32.U32.HI R7, R4, R7, R4;
/*00a8*/ IMUL.U32.U32.HI R4, R7, R6;
/*00b0*/ LOP.XOR R7, R3, R2;
/*00b8*/ IMAD.U32.U32 R6, -R5, R4, R6;
/*00c0*/ ISETP.GE.AND P1, PT, R7, RZ, PT;
/*00c8*/ ISETP.LE.U32.AND P0, PT, R5, R6, PT;
/*00d0*/ #P0 ISUB R6, R6, R5;
/*00d8*/ #P0 IADD R4, R4, 0x1;
/*00e0*/ ISETP.GE.U32.AND P0, PT, R6, R5, PT;
/*00e8*/ LOP.PASS_B R6, RZ, ~R2;
/*00f0*/ ISUB R5, R3, R2;
/*00f8*/ #P0 IADD R4, R4, 0x1;
/*0100*/ #!P1 I2I.S32.S32 R4, -R4;
/*0108*/ ICMP.EQ R4, R6, R4, R2;
/*0110*/ IADD R4, R5, R4;
/*0118*/ IMAD R2, R3, R2, R4;
/*0120*/ ST [R0], R2;
/*0128*/ EXIT ;
From the above code, there are the following floating point operations
I2F.F32.U32.RP R4, R5; Integer to Float conversion
MUFU.RCP R4, R4; Multifunction Floating Point Operation (Reciprocal)
F2I.FTZ.U32.F32.TRUNC R4, R4; Float to Integer conversion
Those operations appear to be related to (x/y) which is a division between two integers but require conversion to floating point. I'm not really aware of whether the conversions are counted as floating point operations or not. I do not see any other floating point operation within the code.
The global memory operations are the following 3
LD R2, [R2];
LD R3, [R3];
ST [R0], R2;
I would say that CGMA = 3/3 = 1 for your case (counting the int2float and float2int conversions as floating point operations).

Answer 2

Looks like CGMA stands for Compute to Global Memory Access and is defined as the number
of floating-point calculations performed for each access to the global memory within a
region of a CUDA program.
The best way to calculate the ratio will be to run your program in a CUDA profiler and use the performance counters for memory accesses and floating point operations. According to the definition I found, your kernel has a CGMA of zero because it performs integer arithmetic, not floating point. If you change the definition, then x = g_A[idx] is one read operation and no write operations. That is because the register file is not stored in global memory (the "G" in CGMA). There are no global memory reads in z = (x*y) + (y/x) + (y-x);, so count that as 5 operations. If all threads run with idx < Size, then you have 3 global memory accesses and 8 operations. Note, though, that in CUDA, performance of global memory accesses depends on if they are coalesced. Many coalesced memory accesses can run much faster than a few uncoalesced ones. So the CGMA is not necessarily going to give an accurate picture of the performance potential of your kernel.
References:
http://www.greatlakesconsortium.org/events/GPUMulticore/Chapter4-CudaMemoryModel.pdf
http://cs.nyu.edu/courses/spring12/CSCI-GA.3033-012/lecture6.pdf