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Linker errors when compiling against glib…?
Okay, I know this may be a duplicate, but I can't find any other answer to my problem.
I am trying to install Pintos and when I run 'make' in the src/utils directory, I get the error that there is an undefined reference to 'floor'. I checked the makefile and here's what I got:
all: setitimer-helper squish-pty squish-unix
# 2207718881418
CC = gcc
CFLAGS = -Wall -W
LDFLAGS = -lm
setitimer-helper: setitimer-helper.o
squish-pty: squish-pty.o
squish-unix: squish-unix.o
clean:
rm -f *.o setitimer-helper squish-pty squish-unix
I tried adding LIBS = -lm but that didn't help.
Output of make:
gcc -lm setitimer-helper.o -o setitimer-helper
setitimer-helper.o: In function `main':
setitimer-helper.c:(.text+0xbb): undefined reference to `floor'
collect2: ld returned 1 exit status
make: *** [setitimer-helper] Error 1
Any solutions to this dilemma?
Your original makefile defines a bunch of variables
CC = gcc
# etc
and lists some dependencies
setitimer-helper: setitimer-helper.o
# etc
but doesn't have any recipes giving the exact commands to be used to remake the targets, except for the clean rule. This means that built-in implicit rules will be used; e.g., to link setitimer-helper the following built-in rule will be used:
$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $#
For setitemer-helper, the automatic variables are filled in using the relevant dependency:
$(CC) $(LDFLAGS) setitimer-helper.o $(LDLIBS) -o setitimer-helper
and from this you can see how the remaining variables -- $(CC), $(LDFLAGS), and $(LDLIBS) -- were filled in to give the output of make that you saw.
As various people have noted, you need to make sure that -lm goes at the end of the link command so that it can be used to satisfy references to library functions like floor(). At the moment, your makefile sets $(LDFLAGS) to -lm, but that variable is used at the start of the link command.
The conventional variables are set up in this built-in rule so that LDFLAGS can be used for options (a.k.a. "flags") that (historically) need to be at the start of the link command, and LDLIBS can be used for libraries that need to be specified after the *.o object files.
So to fix this in terms of the makefile you are using, you need to remove -lm from the LDFLAGS variable that is defined, and instead add another variable definition for LDLIBS:
LDLIBS = -lm
(I'm oversummarising slightly: the built-in rule also contains $(TARGET_ARCH) and $(LOADLIBES), but those aren't of interest here.)
It's compiled in wrong order, the way to proceed is:
CC = gcc
CFLAGS = -Wall -W
LDFLAGS = -lm
myprog: myprog.o more_code.o
${CC} ${CFLAGS} myprog.o more_code.o ${LDFLAGS} -o myprog
myprog.o: myprog.c
${CC} ${CFLAGS} -c myprog.c
more_code.o: more_code.c
${CC} ${CFLAGS} -c more_code.c
clean:
\rm myprog.o more_code.o myprog
More info: http://www.physics.utah.edu/~p5720/rsrc/make.html
Can you show me in terms of the original makefile?
I can try :)
CC = gcc
CFLAGS = -Wall -W
LDFLAGS = -lm
OBJECTS = setitimer-helper.o squish-pty.o squish-unix.o
all: setitimer-helper
setitimer-helper: $(OBJECTS)
${CC} ${CFLAGS} $(OBJECTS) ${LDFLAGS} -o setitimer-helper
setitimer-helper.o: setitimer-helper.c
${CC} ${CFLAGS} -c setitimer-helper.c
squish-pty.o: squish-pty.c
${CC} ${CFLAGS} -c squish-pty.c
squish-unix.o: squish-unix.c
${CC} ${CFLAGS} -c squish-unix.c
And since you are new to Makefile, it's a good idea to add -Wextra -pedantic to CFLAGS
Related
I am able to run and compile my c example program with openssl using
gcc azureconn.c -o azureconn -lssl -lcrypto
but when I try to compile using makefile with LDLIBS flag in make file, it result into error as undefined reference OPENSSL_Init
Below is my make file
DEFINES = $(GDEFINES)
INCLUDES = $(DIR_PATH)
CFLAGS = $(GCFLAGS) $(DEFINES) $(INCLUDES) -D_GNU_SOURCE
LDLIBS = -lssl -lcrypto
MAIN_OBJECTS = xxxx.o yyy.o zzz.o \
aaaa.o
all: $(MAIN_OBJECTS)
mv $(MAIN_OBJECTS) $(BIN_PATH)
%.o: %.c
$(CC) $(CFLAGS) -c $< -o $# $(LDLIBS)
clean:
rm -rf *.o
Error
undefined reference to `OPENSSL_init_ssl' collect2: error: ld returned
1 exit status
Since you've changed your question. Which module has the main(...) function in it? I assumed it was azureconn.c since you said you can compile with this.
gcc azureconn.c -o azureconn -lssl -lcrypto
Try using a rule like this to build your executable;
azureconn:
$(CC) $(CFLAGS) azureconn.c -o $# $(LDLIBS)
The %.o:%.c rule is not typically used to link, just create object files as the name implies
I have 6 programs: HOSpital.c, GenPazienti.c, Triage.c, Paziente.c, Prestazione.c and Reparto.c.
No one of them includes any other.
How can i do the makefile?
I tried with:
all: HOSpital GenPazienti Paziente Prestazione Reparto Triage
HOSpital: HOSpital.o
gcc -o HOSpital HOSpital.c
HOSpital.o: HOSpital.c
gcc -c HOSpital HOSpital.c
GenPazienti: GenPazienti.o
gcc -o GenPazienti GenPazienti.c
GenPazienti.o: GenPazienti.c
gcc -c GenPazienti GenPazienti.c
Paziente: Paziente.o
gcc -o Paziente Paziente.c
Paziente.o: Paziente.c
gcc -c Paziente Paziente.c
Prestazione: Prestazione.o
gcc -o Prestazione Pretazione.c
Prestazione.o: Prestazione.c
gcc -c Prestazione Prestazione.c
Reparto: Reparto.o
gcc -o Reparto Reparto.c
Reparto.o: Reparto.c
gcc -c Reparto Reparto.c
Triage: Triage.o
gcc -o Triage Triage.c
Triage.o: Triage.c
gcc -c Triage Triage.c
clean:
rm -f *.o
But if i change something and i type "make" i get the error:
"Program_name: linker input file unused because linking not done"
Lets take a single example:
gcc -c HOSpital HOSpital.c
This will attempt to use HOSpital as an input file.
Either use the correct option to name the output file, -o, and name it correctly. Like in
gcc -c -o HOSpital.o HOSpital.c
Or don't specify the output file name at all, then the compiler will use the input source file and change the .c suffix to .o. Like in
gcc -c HOSpital.c
It's the same problem all over.
Not that it matters in the end, the rule is used so the object file will be built, but you don't actually use the object file:
gcc -o HOSpital HOSpital.c
Here you use the source file directly to create the program. I think you meant to use
gcc -o HOSpital.o HOSpital.o
And as with the previous problem, you make this mistake all over.
Finally some general tips.
First, build with more warnings enabled. It will help you in the long run to find mistakes in the code, and will help find out places where there's possible undefined behaviors. I recommend at least adding -Wall -Wextra -pedantic.
Then you don't need to list all the object files and their rules explicitly in the makefile. The make program already knows how to make e.g. object files through implicit rules.
That last point means you can shorten down the makefile to something like
CFLAGS = -Wall -Wextra -pedantic -pipe
LD = gcc
LDFLAGS = -pipe
HOSpital: HOSpital.o
$(LD) $(LDFLAGS) -o $# $^
GenPazienti: GenPazienti.o
$(LD) $(LDFLAGS) -o $# $^
Paziente: Paziente.o
$(LD) $(LDFLAGS) -o $# $^
Prestazione: Prestazione.o
$(LD) $(LDFLAGS) -o $# $^
Reparto: Reparto.o
$(LD) $(LDFLAGS) -o $# $^
Triage: Triage.o
$(LD) $(LDFLAGS) -o $# $^
clean:
-rm -f *.o
The variable $# is the target of the rule, and the variable $^ is all prerequisites. For e.g.
HOSpital: HOSpital.o
the variable $# is HOSpital and $^ is HOSpital.o.
A static library is linked fine in the command line, but not through makefile. Compiling part accessing include files seems ok, but ld process must be wrong in the makefile.
Thanks for your help in advance!
Here is my command line:
gcc -o quadEq.exe quadEq.c -I../include -L../lib -lnowic
Here is my Makefile:
CFLAGS = -Wall -g -c
INCLUDE = -I../include
LDFLAGS = -L../lib
LDLIBS = -lnowic
SOURCES = quadEq.c
OBJECTS = $(SOURCES:.c=.o)
EXE = quadEq
all: $(SOURCES) $(EXE)
$(EXE): $(OBJECTS)
gcc $(OBJECTS) $(LDFLAGS) $(LDLIBS) -o $#
.c.o:
gcc $(CFLAGS) $(INCLUDE) $< -o $#
Here is my screen capture that ran Makefile and the command line.
Static libraries care in which order you link them. If libA.a depends on libB.a, then you have to do -lB -lA.
If a libA.a symbol depends on libB.a that depends on a libA.a symbol, you have to cyclically link: -lB -lA -lB. I've seen some cycles get to about 3 or 4 loops, but generally 2 is enough in my experience.
This is different from dynamic library linking which not only doesn't care what order you link them, but you don't need to also link dependent libraries since the .so specifies them.
Based on Aggieboy's suggestions, I rewrote the makefile and made it work.;
CC = gcc
CFLAGS = -x c -Wall -g
INCPATH = -I../include
LIBPATH = -L../lib
LLIBS = -lnowic
%: %.c
$(CC) -o $# $(CFLAGS) $(INCPATH) $< $(LIBPATH) $(LLIBS)
By the way, this accepts a filename to make from the command line argument.
Thank you Aggieboy again!
When I execute this Makefile without clean, it functions OK and both the shared library and the main executable are created correctly. However, when I add the clean target, the "make all" fails. What could be the reason?
CC = gcc
CFLAGS = -fPIC -Wall -Werror
LDFLAGS = -shared
TARGET_LIB= libnsd.so
lib: nsd.o nd.o
$(CC) $(LDFLAGS) -o ${TARGET_LIB} nsd.o nd.o -lm
nd.o : nd.c nd.h
$(CC) -c $(CFLAGS) nd.c
nsd.o : nsd.c nsd.h
$(CC) -c $(CFLAGS) nsd.c
all: main.c
$(CC) -o -I. -L. main.c -lnsd
clean:
rm -f libnsd.so nd.o nsd.o
Your all: target needs to depend on the lib target, so the library is built first.
The -o argument to the compiler also needs a name for executable it should create.
all: lib main.c
$(CC) -o main -I. -L. main.c -lnsd
Normally you want the target name to be the file that you create, otherwise things get rebuilt when it's not needed. (the lib: target has the same issue) but as an exampe for the executable:
.PHONY: all
all: lib main
main: lib main.c
$(CC) -o main -I. -L. main.c -lnsd
nos's answer is on the right track.
It only appeared to work before, because you happened to run make in the right order. It won't work after a clean operation because, as nos points out, you have not declared all of your prerequisites. The rule that links main.o must depend on the shared library target, so make knows the right order to build things.
Also, you REALLY want your targets to be the actual file you're building. If they're something else, then make will always think they're out of date even if you haven't changed anything, and always rebuild them.
Something like this will be better:
CC = gcc
CFLAGS = -fPIC -Wall -Werror
CPPFLAGS = -I.
LDFLAGS = -shared
PROGRAM = main
TARGET_LIB= libnsd.so
all: $(PROGRAM)
$(PROGRAM): main.o $(TARGET_LIB)
$(CC) -o $# -L. main.o -lnsd
$(TARGET_LIB): nsd.o nd.o
$(CC) $(LDFLAGS) -o $# nsd.o nd.o -lm
nd.o : nd.c nd.h
nsd.o : nsd.c nsd.h
clean:
rm -f libnsd.so *.o
I am trying to create my first makefile. I tested my program by using the following commands:
Command 1: gcc -Wall -ggdb3 -std=c99 -o file1 file1.c -lm -lpthread -l
Command 2: gcc -Wall -ggdb3 -std=c99 -o file2 file2.c -lm -lpthread
Everything works great. Then I created a makefile (please see below). I keep getting an error message. Can someone take a look at my code and give me a hint on what the problem is?
file2.o: In function `seed_primes':
file2.c:(.text+0x461): undefined reference to `sqrt'
file2.c:(.text+0x466): undefined reference to `sqrt'
file2:(.text+0x533): undefined reference to `sqrt'
file2.o: In function `create_threads':
file2.c:(.text+0x668): undefined reference to `pthread_create'
file2.c:(.text+0x6b5): undefined reference to `pthread_join'
file2.o: In function `next_seed':
file2.c:(.text+0x860): undefined reference to `sqrt'
collect2: ld returned 1 exit status
make: *** [file2] Error 1
Here is my makefile:
CC=gcc
DEBUG=-ggdb3
CFLAGS=#(DEBUG) -Wall -lm -lpthread -lrt -l
PROGS=file1 file2
all: $(PROGS)
file1: file1.o
$(CC) $(CFLAGS) -o file1 file1.o
file1.o: file1.c
$(CC) $(CFLAGS) -c file1.c
file2: file2.o
$(CC) $(CFLAGS) -o file2 file2.o
file2.o: file2.c
$(CC) $(CFLAGS) -c file2.c
clean:
rm -f $(PROGS) *.o *~
You've set CFLAGS to an empty string because of the # comment character (you probably intended to use a $ instead).
You should not set libraries into CFLAGS; they belong in LDLIBS.
You don't need the file1: rule, the file2: rule, or the object file rules.
CC = gcc
DEBUG = -ggdb3
CFLAGS = $(DEBUG) -Wall
LDLIBS = -lm -lpthread -lrt -l
PROGS = file1 file2
all: $(PROGS)
clean:
rm -f $(PROGS) *.o *~
NB: LDLIBS and the related LDFLAGS are not 100% uniform across variants of make. LDFLAGS should be used for library paths; LDLIBS is for the library names (-lxyz etc).
If you need different libraries for the two programs, you will need to create separate build rules (as you had originally), or use conditional macro assignments (GNU make).
You put all of your flags in CFLAGS which makes them appear before the object files in the command line. Notice that your test commands didn't do that.
Change your flags:
CFLAGS=$(DEBUG) -Wall
LDFLAGS=-lm -lpthread -lrt
And then in the recipes:
$(CC) $(CFLAGS) -o file1 file1.o $(LDFLAGS)