If make fails with: "bmake: don't know how to make blah", what/where is the best place to start looking for problems? why did it fail? What does it mean by "don't know"?
See the GNU Make Debugger
It means the Makefile doesn't have that target. It doesn't know what you're talking about.
the Makefile should include all your source file like .c and .o (and .h if necessary)
and the point is that the compiling step should follow like this :
FileName ---> FileName.o ---> FileName.c
hope it does help you.
0r try search keyword "makefile" on google
it's not difficult to read it.
Related
Now I'm writing a makefile for my C project, and I want to implement a RELEASE&DEBUG compilation branch, it's like the script within the makefile could know which target name the user inputted in the command line, then it can decide what kind of GCC options it will use to compile the current program, is there any way to achieve this? Thank U.
I tried to define a variable in the makefile and pass its value through the command line like make type=release, but this is not what I wanted.
Assuming you're talking about GNU make then there is: look up the MAKECMDGOALS macro in the GNU make manual.
But, this is really not the right way to do things. I recommend that instead you look up target-specific variables in the manual and see if that gives any ideas.
I have some old codes which I use for my database.
I wrongly deleted the EXE files and now I only have some .BAT files for Clipper. The PRG files of my program which contains the source codes, and other files (DBF, NTX, ...).
How to make the exe files again? I found only a command to compile the PRG.
clipper myfile.prg
Execute:
clipper test.prg test.obj
blinker fi test.obj test.exe
if you have dependencies, check on your .rmk file.
touch project.rmk
rmake project.rmk
hope this helps
When using clipper to compile and plink86 to link, you need to also specify the clipper libraries. For example, if the only .prg file you are working on is zmenu.prg, then you would first:
clipper zmenu.prg
And then to link it:
plink86 fi zmenu lib clipper, extend
That's off the top of my head, but it should be close. If you can get your hands on a clipper manual I know it has more details on how to do this in the apendix of the manual.
I preferred linkfiles myself, but I dont remember the format. Then you just had to do:
plink86 #linkfile
So if you were doing compiling and testing a lot, it was easy to do without having to type the longer command each time.
I hope this helps. Wow, dusting off my clipper cobwebs :)
Very old question, but just to clarify in case anybody else has this issue, any MS compatible linker will work. You don't need a "Clipper" linker.
I'm trying to accelerate a key function in a c project (not c++) using CUDA.
For some reason, i can't get the Makefile's to recognise the .cu extension when I change the name of one of the files to .cu.
It's using a configure script and .am/.in/.deps files, which I don't really understand all that well, but basically I grepped references to file.c and changed them all to file.cu, but it produces a file.o: File Not Found error.
Top level make file
https://www.dropbox.com/s/g282qvbdu8pdas0/Makefile
Src folder makefile
https://www.dropbox.com/s/b4pq026od8gauqi/Makefile
The search command I used was
grep -R -i "file.c"
and I simply changed them all to file.cu, then re-ran configure, make clean, make all - result is File Not Found.
I suppose it must be something to do with extensions being ignored/accepted by the Makefile, but as it's been a long time since I've programmed in C and I've never used such complex Makefiles I don't know how to fix it.
Any ideas?
*PS Also, file.cu has compile errors at the moment, but the error message I'm getting is File Not Found, so I think that's not the problem.
You need to have a rule to build o file from a cu file:
cudafile.o: cudafile.cu
nvcc $(NVCC_FLAGS) -c %< -o $#
So you also need to specify the rule for the cu file, and use nvcc for compilation.
The following guide seems to cover it...
http://mcclanahoochie.com/blog/2011/02/automake-and-cuda/
Actually, most of the advice given in the link seems unnecessary for basic compilation, but for some reason I found that when I re-created the config file using autoconf it worked. No explanation comes to mind.
So, most of the times I'm testing if every include is correct on a given C/C++ code, I have a makefile with a gcc/g++ call with proper -I option for searching headers on specific directories (like every program) when I'm compiling sources to headers.
However, if the included directory is not correct and an undefined header appears (e.g. foo.h has #include and was not found), the gcc/g++ will just spit a bunch of errors for every include I have of that foo.h header for all other sources I'm compiling afterwards (and I'm already using -Werror -Wfatal-errors to make gcc/g++ to stop).
So, my question is simple: how can I tell makefile stop after the first error of the type "No such file or directory" it finds? It is really annoying it continue to compile sources and sources, giving me hundreds of errors just for a repeated error I already understood.
It probably continues because you told it to. See the following two options of GNU make:
-k, --keep-going Keep going when some targets can't be made.
-S, --no-keep-going, --stop
Turns off -k.
Put the header files into a variable and use that variable as a dependency. The following snippet will not build anything until the specified headers exist.
HEADERS=test.h other.h /usr/include/special.h
all: $(HEADERS) $(BINPROGS)
[... all other rules go here as usual ...]
*.h:
echo found $#
The ".h:" simply prints out each header that is found before any building even starts. The makefile itself stops if a header cannot be found (and it will stop before trying to compile anything).
I believe that that is what you wanted?
you can write a shell script to check for error conditions before running the make script.
I tried to use a make file in code::blocks but I am doing it wrong. I have the version installed with the compilers included. http://sourceforge.net/projects/codeblocks/files/Binaries/10.05/Windows/codeblocks-10.05mingw-setup.exe/download. What do I do with the make file? It starts with:
CC=gcc
best, US
You don't tend to execute the make file itself, rather you execute make, giving it the make file as an argument:
make -f pax.mk
If your make file is actually one of the standard names (like makefile or Makefile), you don't even need to specify it. It'll be picked up by default (if you have more than one of these standard names in your build directory, you better look up the make man page to see which takes precedence).
As paxdiablo said make -f pax.mk would execute the pax.mk makefile, if you directly execute it by typing ./pax.mk, then you would get syntax error.
Also you can just type make if your file name is makefile/Makefile.
Suppose you have two files named makefile and Makefile in the same directory then makefile is executed if make alone is given. You can even pass arguments to makefile.
Check out more about makefile at this Tutorial : Basic understanding of Makefile