How ARM cortex-M chip boot from 0x00000000? - arm

My target is Atmel SAM4S series
Here is mapping table
internal Flash start address is 0x00400000 and internal ROM start address is 0x00800000
As I know, ARM chip always boot from address 0x00000000, and I can select boot from internal ROM or from internal Flash by controlling boot register.
But how arm chip load ROM / Flash data into 0x00000000 by my selection?

I found answer from YouTube
https://www.youtube.com/watch?v=3brOzLJmeek&list=PLRJhV4hUhIymmp5CCeIFPyxbknsdcXCc8&index=16&t=3s
Seems hardware will map internal flash/ROM by boot select.

Related

How Does STM32 Factory Bootloader Allow for Reflashing at any Time?

I'm aware that on some STM32 boards, they come with a built in bootloader in their ROM. Quoting from STM32 Application Note
The bootloader is stored in the internal boot ROM (system memory) of STM32 devices, and is
programmed by ST during production. Its main task is to download the application program to the
internal Flash memory through one of the available serial peripherals (such as USART, CAN,
USB, I2C, SPI).
However the ability to reflash at any time, i.e. trigger a reflash when your board is a running a program confuses me. My understanding is that a bootloader is the first piece of code to execute and then launches your user program. However, to facilitate this flashing at any time, won't the bootloader have to constantly poll for a request to reflash?
The bootloader only polls for an update on start-up/reset. So not "anytime" in the sense of "spontaneously" - you do have to trigger it. If the programmer has access to the reset pin or control of power, it can of course invoke a restart.
Moreover the ROM bootloader only runs at all if the BOOT pins are set appropriatlely. The boot modes are Flash, SRAM or ROM.
Your understanding is right. Almost.
In case of STM32, you need to set up the chip to run the bootloader, typically using BOOT pins. When the bootloader runs, it checks if the programming is necessary by monitoring the specific peripherals. If the programming is not triggered, it jumps to the user program.
Therefore, you cannot reprogram at any time, only at boot time.
Here is an example bootloader flowchart for programming over UART or I2C.
See this application note on STM32 bootloader for more details.

Atmel SAM3X8E dual bank switching for booting different behaviour

I’m currently working with an Arduino Due board which has an Atmel SAM3X8E processor embedded. I’m programming it using the Atmel Studio (version 7.0.1645) and the provided Atmel Software Framework (version 3.28.1).
The purpose of the program running on the SAM is to gain reprogramming functionality. Therefore the program gets the image from a host PC, flashes it block by block in the unused flash bank and verifies the image. All that is working fine, but I’m running into the same issue as this post (Atmel SAM3X dual bank switching not working).
The Atmel SAM3X8E has two 256-kByte flash banks, Flash0 and Flash1. My application easily fits in the Flash0 and is programming the received image to Flash1. My idea is to use the features of the SAM3X to boot from the other flash bank (default is Flash0). The datasheet of the SAM3X states at page 35 that GPNVM Bits can be used not only to choose the boot memory (ROM or Flash) but also to choose the bank to boot from (Flash0 or Flash1). If GPNVM2 is set the µC will boot from Flash1. This is achieved by remapping the memory layout. Therefore if GPNVM2 is set the Flash1 is mapped at address 0x0008_0000 (while Flash1 and Flash0 are continuous). If GPNVM2 is cleared Flash0 is mapped at address 0x0008_0000 (now Flash0 and Flash1 are continuous).
What I’ve done is to manipulate the GPNVM2 bit before resetting the processor, but it did not work (the memory was not remapped properly).
I was also playing around with the Atmel Studio’s options. Atmel Studio can program an application to Bank0 or Bank1 using the “Project Options” -> “Tool” -> “Program Settings”. I tried to program my application with these settings to Bank1. It is only possible if the checkbox “Override Vector Table Offset Register (exception_table)” is checked and if the device is programmed using “Start Debugging”. If the device is programmed using “Start without Debugging” it does not boot at all, to get it booting (remember the application was flashed to Bank1, if the remapping was successful Bank1 should be located at the address 0x0008_0000 where originally Bank0 is mapped to) I had to change the GPNVM bits manually (using the “Tools” -> “Device programming” Tool) to ‘boot from bank0’. Then it worked.
The described behaviour taught me that I must have missed to manipulate some registers. Obviously the “Override Vector Table Offset Register (exception_table)” is important therefore I also set the “Vector Offset Table Register (VTOR)” to the start address of Flash1 which didn’t help either. I’ve got the feeling I’m missing some functions or register that I have to call/manipulate.
To reprogram the processor it is normally necessary to have some kind of bootloader running which I hoped to avoid using the bank switching mechanics. Has anybody any experience about this bank switching using the ASF functions or in general about the bank switching on a SAM3X?
Thank you in advance!

How ARM CPU loading bootloader?

As I know, CPU can access RAM directly. Device RAM is empty on start and CPU don't know from where to load bootloader into the RAM for executing it. Even it can do nothing because call stack should be empty too as I think.
Yet how is bootloader program copied into the RAM for further execution?
This should happening with embedded devices such as smartphones. On a x86 PCs BIOS is responsible for loading MBR section from disk to RAM as I know.
A bootloader in RAM is a secondary bootloader; invariably there is code in a ROM of some kind containing a primary bootstrap that loads the secondary bootstrap. Often that ROM is mask-ROM on the chip it self.
Typically on an ARM application processor such as a Cortex-A the primary bootstrap will load code to RAM from NAND flash or SD card. ARM Cortex-M often run code directly from ROM in any case.
you have the same problem with an x86. and the same solution in general (as with any other processor as well), you put a rom/flash in the address space where the processor boots and/or where its vector table is.
there are some other solutions like having other logic that reads from some non volatile storage and places it in the boot/vector space, or other logic that provides an interface for some other processor/computer to download into the board/chip and then release reset.

is there any MCU based on cortex-A who's on-chip mask primary bootloader can be changed?

I want study cortex-A inside. but AM335X and S5PV210's inside flash can not be changed, so I want to know if there is there any MCU based on cortex-A who's on-chip mask primary bootloader can be changed?
please recommend some for me, if there has.
please forgive my pool English, thank you!
There is usually no flash in a Cortex-A. The ROM code is usually, well.., in a Read Only Memory. When there is a bug in this code, you need to produce a new wafer mask to fix it, but, as millions of parts are produced, the cost reduction is significant, and ROM avoid data retention issues.
Flash memory is by definition re-writable; the parts you mentioned simply have no on-chip flash.
Parts that have on-chip flash typically execute code directly from it, so because of the relatively low speed of flash memory it is usually used on lower frequency processors sub-200KHz.
Fast "applications" processors do not normally have on-chip flash because it takes up a large amount of die space and and has insufficient capacity to support the for the kind of applications and OS (such as Linux, Android or Windows) typically used on such processors. Instead they often have an on-chip mask ROM primary bootloader than loads a secondary bootloader from external media such as NOR flash, NAND flash, SD card, eMMC etc. The secondary bootloader then boots the OS and/or application code.
Code on such processors is loaded to and executed from SDRAM which is much faster than flash. Also the boot media is not always memory mapped so cannot be executed directly in any case.

IAR EWARM, virtual section out of flash, how to debug without flashing virtual segment

My STM32F401VB MCU has 128KB flash #0x08000000. I have defined a section # 0x09000000 to keep static color images, so the compiled executable has:
- 128KB # 0x08000000 (embedded flash)
- 16MB # 0x09000000 (SPI flash N25Q)
A custom loader running in a computer sends this executable hex image to the MCU, and my custom bootloader running in MCU flashes data:
- # 0x08000000 in embedded flash
- # 0x09000000 in SPI flash
My application checks every image address and it reads from embedded flash or SPI flash accordingly.
The problem is debugging, when I start debugging IAR IDE programs embedded flash #0x08000000 and SPI flash contents # 0x09000000, but MCU has nothing in this address, I don't know how to program the embedded flash and ignore the data outside embedded flash (or program both memories, embedded and SPI).
Removing images is not an option because the application needs to know image addresses to read them from SPI flash. Images won't be modified but application is modified many times every day and I need to debug as easy as possible.
What is the best approach to debug an application using images in SPI flash?.
Best regards and thank you in advance.

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