MAKEFILE,COMPILE,GCC and LINKING - c

I am getting this error while running make file to link the .o files.
command is $make build PLATFORM=HOST or $make build PLATFORM=MSP432,both gives the same error.
gcc main.o memory.o -DHOST -g -O0 -std=c99 -Wall -Werror -I../src/ -I../include/CMSIS/ -I../include/msp432/ -I../include/common/ -I../ -Wl,-Map=c1m2.map -L/usr/local/lib -T ../msp432p401r.lds -o c1m2.out
/usr/bin/ld: c1m2.out: Not enough room for program headers, try linking with -N
/usr/bin/ld: final link failed: Bad value
collect2: error: ld returned 1 exit status
Makefile:79: recipe for target 'c1m2.out' failed
make: *** [c1m2.out] Error 1
and my makefile script:
include sources.mk
# Platform Overrides
PLATFORM = HOST
# Architectures Specific Flags
LINKER_FILE = msp432p401r.lds
CPU = cortex-m4
ARCH = armv7e-m
SPECS = nosys.specs
# Compiler Flags and Defines
# Conditional statements to choose the platform(host/msp432) else invalid platform message is diplayed.
ifeq ($(PLATFORM),HOST)
CC = gcc
CFLAGS = -DHOST
LD = ld
else
CC = arm-none-eabi-gcc
CFLAGS = -DMSP432 -mcpu=$(CPU) -march=$(ARCH) --specs=$(SPECS) -mfloat-abi=hard -mfpu=fpv4-sp-d16
LD = arm-none-eabi-ld
endif
TARGET = c1m2
LDFLAGS = -Wl,-Map=$(TARGET).map -T ../msp432p401r.lds
CPPFLAGS = -g -O0 -std=c99 -Wall -Werror $(INCLUDES)
OBJS = $(SRCS:.c=.o)
%.o : %.c
$(CC) -c $< $(CFLAGS) $(CPPFLAGS) -o $#
pre = $(SRCS:.c=.i)
%.i : %.c
$(CC) -c $< $(CFLAGS) $(CPPFLAGS) -E -o $#
asem =$(SRCS:.c=.asm):
%.asm : %.c
$(CC) -c $< $(CFLAGS) $(CPPFLAGS) -S -o $#
.PHONY: build
build: all
.PHONY: all
all: $(TARGET).out
$(TARGET).out: $(OBJS)
$(CC) $(OBJS) $(CFLAGS) $(CPPFLAGS) $(LDFLAGS) -o $#
.PHONY: clean
clean:
rm -f $(OBJS) $(pre) $(asem) $(TARGET).out $(TARGET).map
I have created this for running both in HOST and the given processor(MSP432),please don't bother poor formatting.

Related

How to make a Makefile that includes my header?

I am new to c programming, and I am having a problem with making Makefile for it.
I did like
CC = gcc
CFLAGS = -fsanitize=address -g -Wall -Wvla
OUTPUT = prac
all: $(OUTPUT)
mymalloc.o: mymalloc.c mymalloc.h
$(CC) $(CFLAGS) -c $# mymalloc.c
%: %.c
$(CC) $(CFLAGS) -o $# mymalloc.o $^
and I try to make file with just typing "make"
But it keep says
gcc -fsanitize=address -g -Wall -Wvla -o prac mymalloc.o prac.c
clang: error: no such file or directory: 'mymalloc.o'
make: *** [prac] Error 1
whenever I try to make it , did I do something wrong?
Thank you.
Edit)
I got it right with using this!
CC = gcc
CFLAGS = -fsanitize=address -g -Wall -Wvla
DEPS = mymalloc.h
OBJS = prac.o mymalloc.o
%.o: %.c $(DEPS)
$(CC) $(CFLAGS) -c -o $# $<
prac: $(OBJS)
$(CC) $(CFLAGS) -o $# $^
You need to make the executable dependent on mymalloc.o:
%: %.c mymalloc.o
$(CC) $(CFLAGS) -o $# mymalloc.o $^
The dependency tells make that it needs to execute the rule for creating mymalloc.o.
Also your rule for making mymalloc.o is wrong. You need -o before $#:
mymalloc.o: mymalloc.c mymalloc.h
$(CC) $(CFLAGS) -c -o $# mymalloc.c
Otherwise it's trying to use the output file as one of the input files.

Can't compile a C program in Windows 7 with MinGW make

I want to compile a C program from GitHub on Windows 7 and get an error that a file is not found. I have installed MinGW Make and its dependancies. I think maybe this program is only intended to run on Linux.
The Console output:
E:\work-c\iso2opl-clone\iso2opl>make
gcc -std=gnu99 -pedantic -usr\include -usr\local\inc
lude -D_FILE_OFFSET_BITS=64 -D_LARGEFILE64_SOURCE -c isofs.c -o isofs.o
process_begin: CreateProcess(NULL, gcc -std=gnu99 -pedantic -F:\programs\mingw\i
nclude -F:\programs\mingw\local\include -D_FILE_OFFSET_BITS=64 -D_LARGEFILE64_SO
URCE -c isofs.c -o isofs.o, ...) failed.
make (e=2): Le fichier spécifié est introuvable.
make: *** [isofs.o] Erreur 2
the makefile:
CC = gcc
CFLAGS = -std=gnu99 -pedantic -I/usr/include -I/usr/local/include -D_FILE_OFFSET_BITS=64 -D_LARGEFILE64_SOURCE
#CFLAGS += -DDEBUG
ifeq ($(_WIN32),1)
CFLAGS += -D_WIN32
endif
OBJS = isofs.o \
iso2opl.o
all: $(TARGET)
rm-elf:
-rm -f $(TARGET) $(OBJS)
$(TARGET): $(OBJS)
$(CC) $(OBJS) -o $(TARGET) $(LIBS)
%.o: %.c
$(CC) $(CFLAGS) -c $< -o $#
%.o: %.cpp
$(CC) $(CFLAGS) -c $< -o $#
clean:
rm -r $(OBJS) $(TARGET)
I don't know maybe the paths are wrongs.
Best Regards
Try to run the make in the MSYS2 shell (https://www.msys2.org/). I was able to build the sources from https://github.com/arcadenea/iso2opl without issue.

Makefile for custom raspberry pi OS not working

I'm trying to make a custom OS for the raspberry pi. I follow this tutorial and used their Makefile, but when I try to compile it, I get this error:
echo objects/kernel.o objects/uart.o objects/stdio.o objects/stdlib.o objects/boot.o
objects/kernel.o objects/uart.o objects/stdio.o objects/stdlib.o objects/boot.o
./gcc-arm-none-eabi-6-2017-q2-update/bin/arm-none-eabi-gcc -T linker.ld -o kernel.img -ffreestanding -O2 -nostdlib objects/kernel.o objects/uart.o objects/stdio.o objects/stdlib.o objects/boot.o
process_begin: CreateProcess(NULL, ./gcc-arm-none-eabi-6-2017-q2-update/bin/arm-none-eabi-gcc -T linker.ld -o kernel.img -ffreestanding -O2 -nostdlib objects/kernel.o objects/uart.o objects/stdio.o objects/stdlib.o objects/boot.o, ...) failed.
make (e=2): Das System kann die angegebene Datei nicht finden. (Translation: The system can't find the given file)
Makefile:33: recipe for target 'build' failed
mingw32-make: *** [build] Error 2
and the Makefile:
# Don't use normal gcc, use the arm cross compiler
CC = ./gcc-arm-none-eabi-6-2017-q2-update/bin/arm-none-eabi-gcc
# Set any constants based on the raspberry pi model. Version 1 has some differences to 2 and 3
ifeq ($(RASPI_MODEL),1)
CPU = arm1176jzf-s
DIRECTIVES = -D MODEL_1
else
CPU = cortex-a7
endif
CFLAGS= -mcpu=$(CPU) -fpic -ffreestanding $(DIRECTIVES)
CSRCFLAGS= -O2 -Wall -Wextra
LFLAGS= -ffreestanding -O2 -nostdlib
# Location of the files
KER_SRC = ../src/kernel
KER_HEAD = ../include
COMMON_SRC = ../src/common
OBJ_DIR = objects
KERSOURCES = $(wildcard $(KER_SRC)/*.c)
COMMONSOURCES = $(wildcard $(COMMON_SRC)/*.c)
ASMSOURCES = $(wildcard $(KER_SRC)/*.S)
OBJECTS = $(patsubst $(KER_SRC)/%.c, $(OBJ_DIR)/%.o, $(KERSOURCES))
OBJECTS += $(patsubst $(COMMON_SRC)/%.c, $(OBJ_DIR)/%.o, $(COMMONSOURCES))
OBJECTS += $(patsubst $(KER_SRC)/%.S, $(OBJ_DIR)/%.o, $(ASMSOURCES))
HEADERS = $(wildcard $(KER_HEAD)/*.h)
IMG_NAME=kernel.img
build: $(OBJECTS) $(HEADERS)
echo $(OBJECTS)
$(CC) -T linker.ld -o $(IMG_NAME) $(LFLAGS) $(OBJECTS)
$(OBJ_DIR)/%.o: $(KER_SRC)/%.c
mkdir -p $(#D)
$(CC) $(CFLAGS) -I$(KER_SRC) -I$(KER_HEAD) -c $< -o $# $(CSRCFLAGS)
$(OBJ_DIR)/%.o: $(KER_SRC)/%.S
mkdir -p $(#D)
$(CC) $(CFLAGS) -I$(KER_SRC) -c $< -o $#
$(OBJ_DIR)/%.o: $(COMMON_SRC)/%.c
mkdir -p $(#D)
$(CC) $(CFLAGS) -I$(KER_SRC) -I$(KER_HEAD) -c $< -o $# $(CSRCFLAGS)
clean:
rm -rf $(OBJ_DIR)
rm $(IMG_NAME)
run: build
qemu-system-arm -m 1024 -M raspi2 -serial stdio -kernel kernel.img
But because I've never worked with Makefiles before, I don't know what is wrong with the Makefile

GNU make doesn't include headerfile

I have been searching for 6 hours and I can't seem to find the issue with this GNU make file, everytime I try to compile by main.o by the order
make main.o
it gives me this error:
arm-none-eabi-gcc -c main.c -mcpu=cortex-m4 -mthumb --
specs=nosys.specs -Wall -Werror -g -O0 -std=c99 -o main.o
main.c:23:22: fatal error: platform.h: No such file or directory
#include "platform.h"
^
compilation terminated.
Makefile:52: recipe for target 'main.o' failed
make: *** [main.o] Error 1
makefile:
include sources.mk
# Platform Overrides
PLATFORM = MSP432
# Architectures Specific Flags
LINKER_FILE = msp432p401r.lds
CPU = cortex-m4
ARCH = thumb
SPECS = nosys.specs
# Compiler Flags and Defines
CC = arm-none-eabi-gcc
LD = arm-none-eabi-ld
TARGET = c1m1
LDFLAGS = -Wl,-Map=$(TARGET).map -T $(LINKER_FILE)
CFLAGS = -mcpu=$(CPU) -m$(ARCH) --specs=$(SPECS) -Wall -Werror -g -O0 -std=c99
CPPFLAGs =
.PHONY: all
all: $(TARGET).out
.PHONY: clean
clean:
rm -f $(OBJS) $(TARGET).out $(TARGET).map
%.o : %.c
$(CC) -c $< $(CFLAGS) -o $#
OBJS = $(SOURCES:.c=.o)
$(TARGET).out: $(OBJS)
$(CC) $(OBJS) $(CFLAGS) $(LDFLAGS) -o $#
sources.mk:
# Add your Source files to this variable
SOURCES =./main.c \
./memory.c \
./startup_msp432p401r_gcc.c \
./system_msp432p401r.c \
./interrupts_msp432p401r_gcc.c
# Add your include paths to this variable
INCLUDES =-I./include/CMSIS \
-I./include/common \
-I./include/msp432
here's my code on github:
github repository
You have not used the INCLUDES macro in makefile's CFLAGS macro. Consequently the arm-none-eabi-gcc ... command line does not specify the include paths to the compiler (or strictly the pre-processor).
CFLAGS = -mcpu=$(CPU) -m$(ARCH) --specs=$(SPECS) $(INCLUDES) -Wall -Werror -g -O0 -std=c99
^^^^^^^^^^^

gcc - file not recognized: File format not recognized

I'm trying to get a small project compiled but am getting this error, I've been searching around and people get this error mainly because of incorrect file extension, but I don't really think that's the cause here:
gcc -c -W -Wall -ggdb -I. router.c -o router.o
router.c:106: warning: unused parameter ‘hname’
router.c: In function ‘flood_neighbors’:
router.c:464: warning: unused variable ‘bytes_rcvd’
router.c: At top level:
router.c:536: warning: unused parameter ‘fd’
gcc -c -W -Wall -ggdb -I. link_info.h -o link_info.o
gcc -c -W -Wall -ggdb -I. route.h -o route.o
gcc -c -W -Wall -ggdb -I. sequence.h -o sequence.o
gcc -W -Wall -ggdb -I. router.o link_info.o route.o sequence.o -o router
link_info.o: file not recognized: File format not recognized
collect2: ld returned 1 exit status
make: *** [router] Error 1
and my make file looks like:
CC = gcc
INC = -I.
FLAGS = -W -Wall -ggdb
router: router.o link_info.o route.o sequence.o
$(CC) $(FLAGS) $(INC) $^ -o $#
router.o: router.c
$(CC) -c $(FLAGS) $(INC) $< -o $#
sequence.o: sequence.h sequence.h
$(CC) -c $(FLAGS) $(INC) $< -o $#
link_info.o: link_info.h link_info.c
$(CC) -c $(FLAGS) $(INC) $< -o $#
route.o: route.h route.c
$(CC) -c $(FLAGS) $(INC) $< -o $#
What I'm confused on is the rules for three object files are of the same format, but why only the link one yells? Thanks a lot!
I would like to suggest few edits in your makefile.
CC = gcc
INC = -I.
FLAGS = -W -Wall -ggdb
router: router.o link_info.o route.o sequence.o
$(CC) $(FLAGS) $(INC) $^ -o $#
router.o: router.c
$(CC) -c $(FLAGS) $(INC) $< -o $#
sequence.o: sequence.h sequence.h //Where is the c file ?
$(CC) -c $(FLAGS) $(INC) $< -o $#
link_info.o: link_info.h link_info.c //Change the order. Put c file first and then the header
$(CC) -c $(FLAGS) $(INC) $< -o $#
route.o: route.h route.c //Same as above
$(CC) -c $(FLAGS) $(INC) $< -o $#
With recent versions of make you can remove all the object rules because make uses a default rule to build an object from .c or .cpp files. Just leave the rule to build the final executable in place.
For example, change the file so it contains this line only:
router: router.o link_info.o route.o sequence.o
$(CC) $(FLAGS) $(INC) $^ -o $#
Move link_info.o to the end of the list in the router: dependencies and I suspect you'll blow up on route.o instead.
You seem to be compiling a headers as C files. I have no idea what GCC does in that case. In your makefile rules, the .c file must be the first dependency if you are going to use $< to generate the source file to compile.
The link_info: and route: rules have the .c and .h files reversed and the sequence: rule lists the .h file twice!

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