I'm trying to compile a C program on Windows for use on a linux dev board.
When I try to compile using a makefile I get this output:
$ make
arm-linux-gnueabihf-gcc -g -Wall main.c -o filetest
process_begin: CreateProcess(NULL, arm-linux-gnueabihf-gcc -g -Wall main.c -o filetest, ...) failed.
make (e=2): The system cannot find the file specified.
make: *** [filetest] Error 2
This happens whether or not a blank file called filetest is present or not in the same directory. If it is present, I can run make clean and it will remove the file.
Here is the makefile I'm using:
#
TARGET = filetest
ALT_DEVICE_FAMILY ?= soc_cv_av
SOCEDS_ROOT ?= $(SOCEDS_DEST_ROOT)
HWLIBS_ROOT = $(SOCEDS_ROOT)/ip/altera/hps/altera_hps/hwlib
CROSS_COMPILE = arm-linux-gnueabihf-
CFLAGS = -g -Wall -D$(ALT_DEVICE_FAMILY) -I$(HWLIBS_ROOT)/include/$(ALT_DEVICE_FAMILY) -I$(HWLIBS_ROOT)/include/
LDFLAGS = -g -Wall
CC = $(CROSS_COMPILE)gcc
ARCH= arm
build: $(TARGET)
#
$(TARGET):main.c
$(CC) $(LDFLAGS) $^ -o $#
%.o : %.c
$(CC) $(CFLAGS) -c $< -o $#
.PHONY: clean
clean:
rm -f $(TARGET) *.a *.o *~
I used tabs in my actual makefile instead of spaces for the code block above ^^
Also, I'm working within Intel's FPGA SoC EDS for a Cyclone V board.
Related
So I have two C files which are master.c, slave.c and then config.h and I'm trying to build a makefile for the execution of these files and I'm getting an error.
I'm using a normal terminal on MacOS and when executing make I get the following error:
ss#US3FHIM0XQ86TJG: ~/project-2[master*]$ make
gcc -o master config.h master.c -g -I -std=gnu99
clang: error: cannot specify -o when generating multiple output files
make: *** [master] Error 1
Here is what my makefile looks like:
CC = gcc
CFLAGS = -g -I -std=gnu99
all: master slave
master: config.h master.c
$(CC) -o $# $^ $(CFLAGS)
slave: config.h slave.c
$(CC) -o $# $^ $(CFLAGS)
clean:
rm master slave cstest logfile.*
Can someone spot what might be causing this issue?
Remove config.h. You can compile it on the command line and omit "config.h", ie:
gcc -o master master.c -g -I -std=gnu99
Some people like to put that -o at the end:
gcc -g -I -std=gnu99 -c master.c -o master
A more appropriate way would be:
gcc -g -I/usr/include -std=gnu99 -c master.c -o master
Generally, the -I has a path, such as -I/usr/include, but you can omit the -I as your compiler usually looks there first.
Also, you may have to tweak your Makefile and omit the config.h if it is happening when you type make.
Some little errors you can fix by compiling the object by hand (ie, as above, gcc -g -I/usr/include -std=gnu99 -c master.c -o master)
Once you edit Makefile and remove config.h, and perhaps use -I/usr/include or path to your headers, you can run:
make clean
make all
or just:
make slave
or:
make master
etc, etc
$^ is a placeholder for the list of dependencies. That is why the rule
master: config.h master.c
$(CC) -o $# $^ $(CFLAGS)
runs the command
gcc -o master config.h master.c -g -I -std=gnu99
Compiling .h produces one output, compiling .c produces another output. The compiler does not know to which of them to apply -o. The proper way is using rules
master: master.c config.h
$(CC) -o $# $< $(CFLAGS)
slave: slave.c config.h
$(CC) -o $# $< $(CFLAGS)
$< is a placeholder for the first item in the list of dependencies. These rules run gcc properly
gcc -o master master.c -g -I -std=gnu99
gcc -o slave slave.c -g -I -std=gnu99
I have 4 files: 1.c, 1.h, 2.c, 2.h.
I need a makefile, which will create a dynamic library (.so) from those 4 files.
I have tried to write a makefile like this:
library.so : 1.c 1.h 2.c 2.h
but it did not work. It would be great, if someone helps me, thanks.
Something like
CC=gcc
CFLAGS= -Wall -g -O -fPIC
RM= rm -f
.PHONY: all clean
all: library.so
clean:
$(RM) *.o *.so
library.so: 1.o 2.o
$(LINK.c) -shared $^ -o $#
1.o: 1.c 1.h 2.h
2.o: 2.c 1.h 2.h
But this is untested! I am assuming Linux with GNU make, and a directory containing only the source code of your library (with the above Makefile), which might be bad practice -you might want a test case- (you could have a special Makefile rule for %.pic.o depending on %.c, etc...)
Hints: use make -p to understand the builtin rules. Then make --trace or (with remake) remake -x to understand a bit more what make is doing.
Read also Drepper's paper: How to Write Shared Libraries, documentation of GNU make, Program Library HowTo, this answer, ...
The simplest way is:
CXXFLAGS += -fPIC
CXXFLAGS += -O3
x.so: 1.o 2.o
$(LINK.cc) -shared $^ $(LOADLIBS) $(LDLIBS) -o $#
Slightly more advanced:
CC = gcc
FLAGS = # -std=gnu99 -Iinclude
CFLAGS = -fPIC -g #-pedantic -Wall -Wextra -ggdb3
LDFLAGS = -shared
DEBUGFLAGS = -O0 -D _DEBUG
RELEASEFLAGS = -O2 -D NDEBUG -combine -fwhole-program
TARGET = example.so
SOURCES = $(wildcard *.c)
HEADERS = $(wildcard *.h)
OBJECTS = $(SOURCES:.c=.o)
all: $(TARGET)
$(TARGET): $(OBJECTS)
$(CC) $(FLAGS) $(CFLAGS) $(DEBUGFLAGS) -o $(TARGET) $(OBJECTS)
CC = gcc # C compiler
CFLAGS = -fPIC -Wall -Wextra -g # C flags
LDFLAGS = -shared # linking flags
RM = rm -f # rm command
TARGET_LIB = sh_main.so # target lib
SRCS = add.c sub.c main.c # source file
DEPS = header.h # header file
OBJS = $(SRCS:.c=.o) # object file
.PHONY: all
all: ${TARGET_LIB}
$(TARGET_LIB): $(OBJS)
$(CC) ${LDFLAGS} -o $# $^ # -o $# says, put the output of the compilation in the file named on the left side of the :
$(SRCS:.c=.d):%.d:%.c
$(CC) $(CFLAGS) -MM $< >$# # the $< is the first item in the dependencies list, and the CFLAGS macro is defined as above
include $(SRCS:.c=.d)
.PHONY: clean
clean:
-${RM} ${TARGET_LIB} ${OBJS} $(SRCS:.c=.d)
After the shared library created successfully. We need to install it.
Become the root user.
Copy the shared library into standard directory "/usr/lib".
Run ldcofig command.
Recompile your .c file with shared library.
root#Admin:~/C/SharedLibrary# gcc -c main.c
root#Admin:~/C/SharedLibrary# gcc -o main main.o sh_main.so
root#Admin:~/C/SharedLibrary# ldd main
Note: In my case.
main.c: main C file
sh_main.so: shared library.
I'm no gnu make expert, this seems reasonable to me
CFLAGS+=-fPIC
%.so: ; $(LINK.c) $(LDFLAGS) -shared $^ -o $#
library.so: 1.o 2.o # default target first
# changes to `1.h` imply `1.o` needs to be rebuilt
1.o: 1.h
2.o: 2.h
I have a makefile that works fine when I compile using /usr/bin/gcc to compile it. However I'm trying to compile it using a crosstool-ng compiler. I've changed CC to the cross-compilers location, and added a prefix to the directory that holds the compiler, but I get an error compiling.
The Makefile is here (sorry, it's long):
CFLAGS ?= -Wall -O0 -ggdb3
PREFIX = /home/me/crosstool-ng-1.18.0/x-tools/i586-system-linux-gnu/
CC = /home/me/crosstool-ng-1.18.0/x-tools/i586-system-linux-gnu/bin/i586-system-linux-gnu-gcc
ALL_CFLAGS = $(CFLAGS) -D_GNU_SOURCE
.phony: all
all: food libfood.so.1.0.0 foo_query
.phony: tools
tool tools: libfood_print foo_print
.phony: install
install: libfood.so.1.0.0
cp libfood.so.1.0.0 $(PREFIX)/lib
cd $(PREFIX)/lib ; \
ln -sf libfood.so.1.0.0 libfood.so.1 ; \
ln -sf libfood.so.1 libfood.so
cp libfood.h $(PREFIX)/include
cp foo_data.h $(PREFIX)/include
cp food $(PREFIX)/bin
cp foo_query $(PREFIX)/bin
%.o: %.c
$(CC) $(ALL_CFLAGS) -c $<
food: food.o foo.o
$(CC) $(ALL_CFLAGS) -o $# $^ -lm -lpthread
libfood.so.1.0.0: libfood.o
$(CC) -shared -Wl,-soname,libfood.so.1 -o libfood.so.1.0.0 libfood.o
libfood_print: libfood_print.o
$(CC) $(ALL_CFLAGS) -o $# $^ -lfood
foo_print: foo_print.o foo.o
$(CC) $(ALL_CFLAGS) -o $# $^ -lm -lpthread
foo_query: foo_query.o
$(CC) $(ALL_CFLAGS) -o $# $^ -lfood
food.o: food.c foo.h foo_data.h
foo.o: foo.c foo.h foo_data.h
foo_print.o: foo_print.c foo_data.h
foo_query.o: foo_query.c foo_data.h
libfood.o: libfood.c libfood.h
$(CC) $(ALL_CFLAGS) -fPIC -c $<
foo_print.o: foo_print.c foo.h
.phony:clean
clean:
rm -rf *.o *~ food libfood.so.1.0.0 foo_print libfood_print foo_query
The error message I'm getting says cannot find -lfood
collect2: ld returned 1 exit status
If anyone could suggest a fix for this I'd be very grateful.
EDIT: My Solution:
I should probably have been clearer but this Makefile was being used to build a package that was included in buildroot. I tried the suggestion by Jonatan, but unfortunately I still got the same error. My workaround was to run buildroot using make -k, and then build again using make.
An easy way to solve this would be:
ALL_CFLAGS += -L$(PREFIX)/lib
If you really want to install your lib in the toolchain, you should look for the usr/lib directory, usually the path is TOOLCHAIN_DIR/TOOLCHAIN_PREFIX/sysroot/usr/lib
Check other binaries in the $(PREFIX)/lib directory, you will notice that they were compile to run in you host, and not in your target.
The files the compiler need to check dependencies, link, and execute in your target, are installed in the sysroot directory.
gcc 4.7.2
c89
GNU Make 3.82
I am trying compile this program I have using this Makefile. I have only 1 src file at the moment, but I will have more later to include.
I am trying to get the Makefile to create the bin directory if it doesn't exist and put the binary executable in there.
INC_PATH=-I/home/dev_tools/apr/include/apr-1
LIB_PATH=-L/home/dev_tools/apr/lib
LIBS=-lapr-1
RUNTIME_PATH=/home/dev_tools/apr/lib
CC=gcc
CFLAGS=-Wall -Wextra -g -m32 -D_DEBUG -D_THREAD_SAFE -D_REENTRANT -D_LARGEFILE64_SOURCE -O2 $(INC_PATH)
OBJECTS=timeout.o
EXECUTABLE=bin/to
all: build $(EXECUTABLE)
$(EXECUTABLE):
$(CC) -m32 -o $# -Wl,-rpath,$(RUNTIME_PATH), $(LIB_PATH) $(OBJECTS) $(LIBS)
build:
#mkdir -p bin
clean:
rm -rf *~ timeout *.o
I am getting this error:
make
gcc -m32 -o bin/to -Wl,-rpath,/home/dev_tools/apr/lib, -L/home/dev_tools/apr/lib timeout.o -lapr-1
gcc: error: timeout.o: No such file or directory
make: *** [bin/to] Error 1
When I remove the $(OBJECTS) I get the following:
gcc -m32 -o bin/to -Wl,-rpath,/home/dev_tools/apr/lib, -L/home/dev_tools/apr/lib -lapr-1
/usr/bin/ld: cannot find : No such file or directory
collect2: error: ld returned 1 exit status
make: *** [bin/to] Error 1
Not sure where I am going wrong with this.
You have not specified how to build the target timeout.o.
You need to add the following code:
timeout.o: timeout.c
$(CC) $(CFLAGS) -c -o $# $<
If you end up with more source file that you need compiled, you can use a pattern matching rule like this:
%.o: %.c
$(CC) $(CFLAGS) -c $< -o $#
Makefiles can be a bit tricky. Because you want to continue adding more objects to your OBJECT variable, I would actually add a prerequisite to EXECUTABLE to make sure all of your objects are compiled. From there, the automatic rule inference should take care of the rest.
Basically replace the line with:
$(EXECUTABLE): $(OBJECTS)
$(CC) -m32 -o $# -Wl,-rpath,$(RUNTIME_PATH), $(LIB_PATH) $(OBJECTS) $(LIBS)
Its showing error because make is not able to find timeout.o file in the current directory.
If you have timeout.c file then add the following to your makefile
OBJECTS: timeout.c
$(CC) -c timeout.c
I'm trying to compile svdlibc on a 64 bit mac. Running the make file returns the error message:
main.c:1: error: CPU you selected does not support x86-64 instruction set
main.c:1: error: CPU you selected does not support x86-64 instruction set
make: *** [main.o] Error 1
Which doesn't make much sense.
The make file is:
# Linux or Windows:
CC = gcc -Wall -O4 -march=i486
# CC = icc -w1 -O3 -march=i486
# Macintosh:
ifeq ($(HOSTTYPE),powerpc)
CC = cc -pipe -O3 -Wall -fno-common -arch ppc
endif
LIBS=-lm
OBJ=svdlib.o svdutil.o las2.o
svd: Makefile main.o libsvd.a
${CC} ${CFLAGS} -o svd main.o libsvd.a ${LIBS}
mv -f $# ${HOSTTYPE}/$#
ln -s ${HOSTTYPE}/$# $#
main.o: Makefile main.c svdlib.h
${CC} ${CFLAGS} -c main.c
libsvd.a: ${HOSTTYPE} ${OBJ}
rm -f $# ${HOSTTYPE}/$#
ar cr $# ${OBJ}
ranlib $#
mv -f $# ${HOSTTYPE}/$#
ln -s ${HOSTTYPE}/$# $#
svdlib.o: Makefile svdlib.h svdlib.c
${CC} ${CFLAGS} -c svdlib.c
svdutil.o: Makefile svdutil.c svdutil.h
${CC} ${CFLAGS} -c svdutil.c
las2.o: Makefile las2.c svdlib.h svdutil.h
${CC} ${CFLAGS} -c las2.c
clean:
rm *.o
$(HOSTTYPE):
if test ! -d $(HOSTTYPE); \
then mkdir $(HOSTTYPE); fi
Editing the make file to alter the -march flag lets the compilation proceed but apparently the linking fails with:
ld: lto: could not merge in main.o because Invalid ALLOCA record for
architecture x86_64
Has anyone done this? Or is there a different svd library that I should use instead? (For large sparse matrices?)
EDIT: porneL seems to have found the problem. Changing the top line in the makefile to:
CC = gcc -Wall -O3 -march=x86-64
compilation work. Haven't tested the results yet, but looks very promising.
-O4 causes this for some reason. Use -O3 instead.
You could try with port ( http://www.macports.org/ ) it seems it s availablee :
svdlibc #1.34 (math, science)
SVDLIBC is a C library to perform singular value decomposition
Basically you ll install macports then , sudo port install svdlibc.