Compiling C using make in windows (MinGW) - c

I am following the book "Learn C the Hard Way" and I have reached the section where you compile the code using makefiles. I keep getting errors that the file was not found when running make clean.
Here is the error followed by the make file and the directory
C:\Users\Me\Desktop\C Code\HARD WAY\Dust off that compiler>make clean
rm -f main.c
process_begin: CreateProcess(NULL, rm -f main.c, ...) failed.
make (e=2): The system cannot find the file specified.
make: *** [makefile:7: clean] Error 2
EXECUTABLE=main.exe
CC="C:\Program Files\mingw-w64\x86_64-8.1.0-posix-seh-rt_v6-rev0\mingw64\bin\gcc.exe"
CFLAGS=-Wall -g
clean:
rm -f main
directories
EDIT: I removed the .c from the "rm -f main" as it seems to be a small error but has made no difference to the end result
EDIT 2: I worked out that the make file is issuing linux commands which is why it wasn't working, replacing rm with del fixes the issue

I worked out that the make file is issuing linux commands which is why it wasn't working, replacing rm with del and removing -f fixes the issue

Related

"cannot find -lc" Compiling via linux terminal

I make a premise: I'm a "newborn" in the Linux world, I have very little experience. I decided to switch to this operating system after studying it in a university course and I fell in love with it.
Having said that, let me tell you my problem...
I installed Linux Mint 21.1 initially in dual-boot with a fairly small partition size. To extend the partition I thought of reinstalling it from 0 thus avoiding some problems that were appearing. For university reasons I find myself programming and compiling from a terminal. At the first installation of Linux I managed to install everything necessary and to solve the various problems that arose. On reinstallation, when I try to compile a file from the terminal, I get the following message:
gcc -c procedure.c
gcc -c semafori.c
gcc -c prodcons_singolo_buffer.c
gcc -o prodcons_singolo_buffer procedure.o semafori.o prodcons_singolo_buffer.o
/usr/bin/ld: impossibile trovare -lc: File o directory non esistente
collect2: error: ld returned 1 exit status
make: *** [Makefile:4: prodcons_singolo_buffer] Errore
In particular, the error Is:
usr/bin/ld: impossibile trovare -lc: File o directory non esistente
Unfortunately I can't find anything about it on the web. Thank you all for your availability and for any response.
EDIT:
This is Makefile:
all: prodcons_singolo_buffer
prodcons_singolo_buffer: procedure.o semafori.o prodcons_singolo_buffer.o
gcc -o prodcons_singolo_buffer procedure.o semafori.o prodcons_singolo_buffer.o
prodcons_singolo_buffer.o: prodcons_singolo_buffer.c
gcc -c prodcons_singolo_buffer.c
procedure.o: procedure.h procedure.c
gcc -c procedure.c
semafori.o: semafori.c semafori.h
gcc -c semafori.c
clean:
rm -rf *.o
rm -rf prodcons_singolo_buffer
I agree that your compiler/library install is borked.
Unrelated but here is how I would write your Makefile (untested). Let me know when you tried it out and I will delete this answer.
.PHONY: all clean
all: prodcons_singolo_buffer
prodcons_singolo_buffer: procedure.o semafori.o prodcons_singolo_buffer.o
procedure.o: procedure.c procedure.h
semafori.o: semafori.c semafori.h
clean:
rm -f prodcons_singolo_buffer *.o

Using rm -i !(*.c|Makefile) in Makefile?

I have a directory where I have some C program files and a Makefile with executables of those C files. I can simply run this to remove all the executable at once in rm !(*.c|Makefile).
But when i am adding this to my makefile
CFLAGS= -Wall -g -lm
SHELL=/bin/bash
careful:
echo "nothing"
clean:
rm -i !(*.c|Makefile)
I am getting this error while executing the command
/bin/bash: -c: line 1: syntax error near unexpected token `('
/bin/bash: -c: line 1: `rm -i !(*.c|Makefile)'
make: *** [Makefile:8: clean] Error 2
I am not too knowledgeable about Bash syntax but I know that () is treated as a subshell, I think that's why I can't run rm (*.c) directly in the terminal because *.c is not a command (or any valid syntax). But running rm -i !(*.c) works in the terminal. So I guess !() is treated differently in Bash.
My assumption on all this: in Makefile when I am running make clean it is treating !(*.c|Makefile), differently than in normal terminal, or somehow it is disregarding ! in !(*.c|Makefile)
So my questions are:
Are !() and () treated differently in Bash?
Why does !(wildcard) work in the terminal but not in my Makefile
How can I make it work in the Makefile?
The Bash-specific extended globbing patterns are not enabled out of the box for noninteractive shells.
!(...) is purely part of this wildcard syntax, and has nothing with subshells to do.
Probably a better solution anyway is to refactor this so you don't depend on Bash.
.PHONY: clean
clean:
rm -i $(filter-out $(wildcard *.c) Makefile,$(wildcard *))
The Bash Reference Manual doesn't have a good anchor to link to, but the extended globbing syntax available with extglob is described in the section on Pattern Matching
If you really wanted to, you could shopt -s extglob in your Makefile, too, but this gets rather complicated as you will have to hide the statement from the parser until the shell is configured to understand this syntax. For example,
.PHONY: clean
clean:
shopt -s extglob; \
eval 'rm -i !(*.c|Makefile)'
Notice also how shopt and eval need to be on the same logical line, as make out of the box executes each recipe line in a separate new shell instance (though you can change that with .ONESHELL)

Makefile with 2 files

Hello!
I want to make Makefile.win which will make a tar.gz with 2 other files(dodaj.c and another Makefile, both are in the same directory where i want use commend make ).My problem is
make dodaj.tar.gz
make: *** No rule to make target 'dodaj.tar.gz'. Stop
Here is my code:
dodaj.tar.gz: dodaj.c Makefile
mkdir dodaj-434686
cp ./dodaj.c ./dodaj-434686
cp ./Makefile ./dodaj-434686
tar -czvf dodaj.tar.gz ./dodaj-43468
rm -rf ./dodaj-434686
Make will look for files named 'makefile' and 'Makefile'. If you are using Gnu make, it will also look for 'GNUmakefile'. It does not look for 'Makefile.win'. To use that file, you must do make -f Makefile.win dodaj.tar.gz

Writing Makefile in C

I am writing(at first time) a makefile for my program in C. This is my make file:
CC = gcc
FILES = in_one.c in_two.c in_two.h
OUT_EXE = out_executable
build: $(FILES)
$(CC) -o $(OUT_EXE) $(FILES)
clean:
rm -f *.o core
rebuild: clean build
Actually, everything works properly : Gcc compiler doesn't show any errors, but maybe someone could explain what does these lines mean:
clean:
rm -f *.o core
rebuild: clean build
The clean lines say that if you want to make clean it does not depend on anything (nothing behind ":"). Furthermore the rm command deletes all object files.
The rebuild: clean build says that if you want to make rebuild it depends on clean and build. So the first thing to do is clean (= delete all object files) and then make build (= compile all source files). After that there is nothing more to do so make stops.
For a quick start, make recipes have the following syntax:
target: dependency1 dependency2 ... dependencyN
command1
command2
...
command3
So if target needs to be made at first all dependencies (dependency1 - dependencyN) are made. After this is done command1 - commandN are executed in that order.
You are rm (removing) or deleting all (*) the existing .o Files. So the next time you compile or call the make file you are just left with the new ones.
Build: $(Files) is creating the .o so the compiler can link them together into an executable

C development under NETBEANS, cc1

I installed netbeans to write code in C. But there is problem using Mingw compilers. It works just fine, till i try to run the project.
First it was unable to find cc1.exe while trying to run it. When i found it and manually copied into the same folder there is just another error.
"C:/bin/make.exe" -f nbproject/Makefile-Debug.mk QMAKE= SUBPROJECTS= .build-conf
C:\bin\make.exe[1]: Entering directory `D:/1/2/Skola/IZP/programovani/projekt4netbeans/CppApplication_6'
"C:/bin/make.exe" -f nbproject/Makefile-Debug.mk dist/Debug/MinGW_1-Windows/cppapplication_6.exe
C:\bin\make.exe[2]: Entering directory `D:/1/2/Skola/IZP/programovani/projekt4netbeans/CppApplication_6'
mkdir -p build/Debug/MinGW_1-Windows
rm -f build/Debug/MinGW_1-Windows/main.o.d
gcc.exe -c -g -MMD -MP -MF build/Debug/MinGW_1-Windows/main.o.d -o build/Debug/MinGW_1-Windows/main.o main.c
cc1: error: command line option '-lang-c' is valid for the driver but not for C
C:\bin\make.exe[2]: *** [build/Debug/MinGW_1-Windows/main.o] Error 1
C:\bin\make.exe[2]: Leaving directory `D:/1/2/Skola/IZP/programovani/projekt4netbeans/CppApplication_6'
C:\bin\make.exe[1]: *** [.build-conf] Error 2
C:\bin\make.exe[1]: Leaving directory `D:/1/2/Skola/IZP/programovani/projekt4netbeans/CppApplication_6'
C:\bin\make.exe: *** [.build-impl] Error 2
BUILD FAILED (exit value 2, total time: 2s)
if someone could help me with that.. thanks :)
Make shure you have current versions of Netbeans and MinGw and that you have a correct installation (Configuring the NetBeans IDE for C/C++/Fortran).
On mingw you should not use make from mingw/bin, but the one from msys (<mingw>/msys/1.0/bin/make.exe)

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