I am trying to make a makefile on linux. When i run "make" on my makefile it only says " 'mkFile' is up to date", where mkFile is the name of my makefile. I dont have any .o files or a compiled program prior to running the make command. I only have C files in the directory, so i dont know why it wont generate the executable and .o files. I have 5 files: Main.c, convertSentence.c, convertAll.c, convertSentence.h, and convertAll.h
Main.c includes convertAll.h, and convertAll.c includes convertAll.h.
Here is my code:
main: Main.o convertSentence.o convertAll.o
gcc -o program Main.o convertSentence.o convertAll.o
Main.o: Main.c convertAll.h
gcc -c Main.c
convertAll.o: convertAll.c convertSentence.h
gcc -c convertAll.c
convertSentence.o: convertSentence.c
gcc -c convertSentence.c
clean:
rm *.o
When i run "make" on my makefile it only says " 'mkFile' is up to date", where mkFile is the name of my makefile.
That indicates to me that you are using the following command line:
make mkFile
When you use that, it thinks it needs to build the target named mkFile.
You need to use:
make -f mkFile
When you use that, it indicates to make that the targets and dependencies for make are defined in the file named mkFile.
Another option is to rename mkFile to makefile or Makefile and then just use
make
Related
I am trying to run the c program remoteServer.c. I compiled it using a Makefile. When i try to run it with ./remoteServer.o I get the following error. I read that it could be cause of different architecture but I saw that both were x86-64. I am running ubuntu 18.04.03 on a VM. The code for the make file is after the commands. Also i used chmod 777 on both the .c and .o files.
isidoros#isidoros-VirtualBox:~/choice$ ./remoteServer.o
bash: ./remoteServer.o: cannot execute binary file: Exec format error
isidoros#isidoros-VirtualBox:~/choice$ file remoteServer.c
remoteServer.c: C source, ASCII text
isidoros#isidoros-VirtualBox:~/choice$ file remoteServer.o
remoteServer.o: ELF 64-bit LSB relocatable, x86-64, version 1 (SYSV), with debug_info, not stripped
isidoros#isidoros-VirtualBox:~/choice$ uname -m
x86_64
Makefile:
OBJS = remoteServer.o
SOURCE = remoteServer.c
HEADER =
OUT = make
CC = gcc
FLAGS = -g -c -Wall
LFLAGS =
all: $(OBJS)
$(CC) -g $(OBJS) -o $(OUT) $(LFLAGS)
remoteServer.o: remoteServer.c
$(CC) $(FLAGS) remoteServer.c
clean:
rm -f $(OBJS) $(OUT)
Do note that gcc -c compiles source files without linking.
Then, consider that "Compilation refers to the processing of source code files (.c, .cc, or .cpp) and the creation of an 'object' file. This step doesn't create anything the user can actually run. " reference
Meanwhile: "Linking refers to the creation of a single executable file from multiple object files."
So, you probably wanted to link the program, even if it contained a single source file (from your perspective, that might depend on libraries you are including).
I also think that your makefile is trying to name the executable as "make" which might be a problem, since you are probably calling the GNU make program to compile you code.
I created a file.h and a file.c how can I compile them on Ubuntu?
You only need to compile your .c file(s), not your .h file(s).
To compile file.c on Ubuntu, you can use GCC:
gcc file.c -o my_program
...or Clang:
clang file.c -o my_program
It is possible to precompile your header files, but you only need precompiled headers in particular cases. More information here.
If file.h is not in the same folder as file.c, you can use GCC or Clang's -I option.
Example if file.h is in the include/ folder:
gcc -I include/ file.c -o my_program
In file.c you still have this instruction, with only the filename:
#include "file.h"
You can also use a more generic approach by the usage of a makefile.
Here is a short example of such a file:
# Declaration of variables
CC = gcc
CC_FLAGS = -w -Werror -Wall
# File names
# "prgoram" will be the name of the output produced from the make process
EXEC = program
#Incorporates all the files with .c extension
SOURCES = $(wildcard *.c)
OBJECTS = $(SOURCES:.c=.o)
# Main target
$(EXEC): $(OBJECTS)
$(CC) $(OBJECTS) -o $(EXEC)
# To obtain object files
%.o: %.c
$(CC) -c $(CC_FLAGS) $< -o $#
# To remove generated files
clean:
rm -f $(EXEC) $(OBJECTS)
To use this utility just make sure that the file itself is within the directory containing your source files and its name is either "makefile" or "Makefile".
To compile the code simply run the following command from your working directory:
make program
This command will automatically link all the source files within your working directory into one executable file with the name of "program". To run the program itself just use the command:
./program
To clean your project and the created executable you can run the command:
make clean
The makefile is very powerful when dealing with larger projects that contain a larger number of source files. Here you can check for more guidance on how to use makefiles. This is also a very detailed tutorial on the topic.
Use following command to compile your program(For GCC Compiler):
gcc file.c -o file
No need to compile file.h file.
Hi I am trying to run makefile using %make but it tells me "no such jobs" I am not sure how makefile should be saved as but it is in the same directory as my other files that I am trying to run.
So here is an example of a simple Makefile using g++:
makefile:
all:
g++ main.cpp anotherFile.cpp -o someBinaryOutput
Now all you have to do is call the make keyword to compile and the ./ to run i.e:
user#comp:path/to/directory$make
user#comp:path/to/directory$./someBinaryOutput
I'm expecting a lot of difficulties to make my program working with the library libmodbus on Linux.
I've installed libmodbus with the command sudo make install and after make but the problem is when I want to link the library in my C program.
My Makefile for now is like:
all: test
test: main.o com.o
gcc main.o com.o -o test
main.o: main.c
gcc -c main.c -o main.o
com.o: com.c
gcc -c com.c -Wl,-rpath=/usr/local/lib -Wl,LIBDIR -o com.o
clean:
rm -rf *o test
In my file com.c I include the file modbus.h like this:
#include <modbus.h>
And I always get the error:
fatal error: modbus.h: No such file or directory.
If it can help when I did make install, the code return me this:
If you ever happen to want to link against installed libraries
in a given directory, LIBDIR, you must either use libtool, and
specify the full pathname of the library, or use the '-LLIBDIR'
flag during linking and do at least one of the following:
add LIBDIR to the `LD_LIBRARY_PATH' environment variable during execution
add LIBDIR to the `LD_RUN_PATH' environment variable during linking
use the `-Wl,-rpath -Wl,LIBDIR' linker flag
have your system administrator add LIBDIR to `/etc/ld.so.conf'
It seems like the modbus.h is not in the standard include directory.
You should to add the -I/<includes_path> flag to gcc options.
I suppose here:
gcc -I/<include_dir_path> -c com.c -Wl,-rpath=/usr/local/lib -Wl,LIBDIR -o com.o
I'm trying to write a makefile and I compiled main.c. Then I'm trying to create main.o, but I'm confused as how to do so. I'm using a vi editor in UNIX. I tried gcc -o main.c, I get a fatal error saying that there's no input files. What went wrong?
You can use gcc's -c option to compile a source file without linking. This will leave you with a .o file:
gcc -c main.c
You can then create an executable by linking that .o file with the standard libraries, and other .o or .c files if you like:
gcc -o myprogram main.o
The primary advantage of this is when you have multiple .c files. In that case you can save time by not recompiling them all when one of them changes.
If you are using a Makefile, then you probably have too much in it. Warning: the following will overwrite your Makefile. Try:
echo 'all: main.o' > Makefile
make
or even:
> Makefile # truncate the Makefile. That is, make it empty
make main.o
or even:
rm Makefile
make main.o
Stop working so hard.