Hi I am trying to run makefile using %make but it tells me "no such jobs" I am not sure how makefile should be saved as but it is in the same directory as my other files that I am trying to run.
So here is an example of a simple Makefile using g++:
makefile:
all:
g++ main.cpp anotherFile.cpp -o someBinaryOutput
Now all you have to do is call the make keyword to compile and the ./ to run i.e:
user#comp:path/to/directory$make
user#comp:path/to/directory$./someBinaryOutput
Related
I have a source file asd.c and the build in rule for compiling and linking this file is not working for some reason.
Here is my super simple makefile:
asd.exe: asd.o
I am getting the following errors
cc -c -o asd.o asd.c
process_begin: CreateProcess(NULL, cc -c -o asd.o asd.c, ...) failed.
make (e=2): The system cannot find the file specified.
<builtin>: recipe for target 'asd.o' failed
mingw32-make: *** [asd.o] Error 2
several possibilities :
there is no file asd.c in the directory containing the makefile/Makefile
you do not have cc or it cannot be found through PATH. Just enter cc by hand in a shell to check
you start make from an other directory, e.g. make -f elsewhere/makefile, in that case asd.c cannot be found
Note that if you only have the line asd.exe: asd.o that will build the executable named asd.o
You can change your makefile like that :
CC = gcc
asd.exe: asd.c
<tab>$(CC) -o asd.exe asd.c
Your simple makefile should suffice, the most probable thing is that make(1) is unable to execute the default rule to compile a .c file, the default compiler is named cc and to change it to use gcc instead, you should change your Makefile to this:
CC=gcc
asd.exe: asd.o
that should work. You can also create a link to cc from gcc (that doesn't hurt, and normally cc is an alias of gcc on sites that have gcc installed as the only compiler)
Indeed, you could make asd just by saying
make asd.exe
with no makefile at all, as there's an implicit rule to generate an executable directly from its .c source file. But also you need to specify the compiler if you don't have cc, so the command should be:
make CC=gcc asd.exe
or, if you are going to always use gcc as your favourite compiler, just create an environment variable CC and assign it gcc in login environment (I'm assuming you are in Windows ---for the .exe extension--- and you know how to include a new environment variable in it)
I am trying to make a makefile on linux. When i run "make" on my makefile it only says " 'mkFile' is up to date", where mkFile is the name of my makefile. I dont have any .o files or a compiled program prior to running the make command. I only have C files in the directory, so i dont know why it wont generate the executable and .o files. I have 5 files: Main.c, convertSentence.c, convertAll.c, convertSentence.h, and convertAll.h
Main.c includes convertAll.h, and convertAll.c includes convertAll.h.
Here is my code:
main: Main.o convertSentence.o convertAll.o
gcc -o program Main.o convertSentence.o convertAll.o
Main.o: Main.c convertAll.h
gcc -c Main.c
convertAll.o: convertAll.c convertSentence.h
gcc -c convertAll.c
convertSentence.o: convertSentence.c
gcc -c convertSentence.c
clean:
rm *.o
When i run "make" on my makefile it only says " 'mkFile' is up to date", where mkFile is the name of my makefile.
That indicates to me that you are using the following command line:
make mkFile
When you use that, it thinks it needs to build the target named mkFile.
You need to use:
make -f mkFile
When you use that, it indicates to make that the targets and dependencies for make are defined in the file named mkFile.
Another option is to rename mkFile to makefile or Makefile and then just use
make
I'm writing a small C library for some basic polygon operations and I'm trying to use LLDB from the command line for debugging. I am able to run LLDB with my compiled test runner, but I can only see assembly instructions and not C code as I step through.
I've compiled my library and test runner with the -g flag as shown here in this Makefile:
#Define compiler flags
CFLAGS = -g -Wall -Werror
#Define objects
OBJECTS = MASClip.o MASGraph.o MASClipTest.o
tests : $(OBJECTS)
cc $(CFLAGS) $(OBJECTS) -o tests
MASClip.o : MASClip.h MASClip.c
cc $(CFLAGS) -c MASClip.c
MASGraph.o : MASGraph.h MASGraph.c
cc $(CFLAGS) -c MASGraph.c
MASClipTest.o : MASClipTest.c
cc $(CFLAGS) -c MASClipTest.c
test :
make
make clean
./tests
.PHONY : clean
clean :
rm *.o
I can set breakpoints by function name so I don't understand why the code is not displayed.
I've searched around, but I don't see that I'm doing anything different from what the tutorials and other questions say. I must be missing something obvious.
Also, I realise I could just do this in Xcode, but when I write straight C I like to use VIM and it would be nice to be able to use LLDB from the command line.
How do I get LLDB to display the actual C code when debugging?
On OS X debug info is stored in .o files. The debugger refers back to the .o files using a "debug map" in the executable. Looks like you are deleting the .o files before you try to debug, so there's no debug information for the debugger.
Either leave the .o files in place when you debug, or run the dsymutil tool on the executable to produce a linked debug output file (.dSYM.) If you put the dSYM next to the executable (or anywhere that Spotlight searches) then lldb will find it automatically.
Note that if you just give the compiler a list of .c files, it will make a dSYM for you automatically - since it will delete the .o files when it is done - so that debugging is still possible.
I'm on Windows 7 and have MinGW/gcc installed. I'm using the Eclipse CDT plugin to compile and build my first simple C programs, and am trying to follow what exactly the plugin is doing under the hood.
I create a new "Hello World!" C project with the following directory structure:
helloworld/
src/
helloworld.c
Where helloworld.c is:
#include <stdio.h>
#include <stdlib.h>
int main(void) {
puts("Hello World!");
return EXIT_SUCCESS;
}
So I created a Run Configuration in Debug Mode (as opposed to "Release Mode", not a "Debug Configuration" in typical Eclipse parlance!) and ran my app, and it works beautifully, printing "Hello World!" to the Eclipse console.
Now I'm looking on my file system and the file/project structure is like so:
helloworld/
src/
helloworld.c
Debug/
src/
helloworld.d
helloworld.o
subdir.mk
helloworld.exe
makefile
objects.mk
source.mk
I assume that running my Run Configuration in Eclipse (hence compiling/building/running helloworld inside Eclipse) created everything under Debug. Furthermore I assume that helloworld.d and helloworld.o are compiled binaries, and that helloworld.exe is the packaged executable containing those binaries and everything they'red linked to (stdio and stdlib). I also assume makefile is the actual Make file (buildscript), and that the *.mk files are somehow inputs to that buildscript. So, for starters, if any of those assumptions are wrong, please begin by correcting me!
When I open makefile I see this:
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
# All of the sources participating in the build are defined here
-include sources.mk
-include src/subdir.mk
-include subdir.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
endif
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
# All Target
all: helloworld
# Tool invocations
helloworld: $(OBJS) $(USER_OBJS)
#echo 'Building target: $#'
#echo 'Invoking: Cross GCC Linker'
gcc -o "helloworld" $(OBJS) $(USER_OBJS) $(LIBS)
#echo 'Finished building target: $#'
#echo ' '
# Other Targets
clean:
-$(RM) $(EXECUTABLES)$(OBJS)$(C_DEPS) helloworld
-#echo ' '
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets
Please note: I am not looking for someone to explain to me how Make works, I can RTFM for that ;-)
I am just trying to understand what it would take to compile, build and run helloworld from the command-line, outside of Eclipse. What command line invocations would I need to accomplish this, and why? Once I see that, combined with perusing Make docs, I should be able to fill in the gaps and understand everything that is going on.
That depends a bit on the paths that Eclipse generates in the files source.mk and objects.mk but most likely you need to cd into the Debug folder.
Inside of that, you can then run make all to compile the project.
If Eclipse generated absolute paths, you can use make -f .../path/to/helloworld/Debug/makefile all from anywhere.
The *.o files are the object file(s) created by compilation. these files are typically build by a command like:
Gcc -ansi -Wall -pedantic -c helloworld.c -o helloworld.o
(apologies foe capitalization of gcc, my iPad insists on correct my typing)
The *.exe is the actual executable, which may or may not contain the library functions. This depends on static versus dynamic linking. The executable is created typically by:
Gcc helloworld.o -o helloworld.exe
The *.d files are dependency files, built by gcc attempting to determine dependencies between files, typically built with the following command
MAKEDEPEND = gcc -M $(CPPFLAGS) -o $*.d $<
(Rule taken from make online documentation).
So,to answer your final question, to compile from the command line, a command like:
Foo gcc -ansi -WAll -pedantic helloworld.c -o helloworld.exe
Should do the trick for you. Note, the flags to the compiler are the minimum that I like to use, you will probably have a different set of switches.
Hopes this help,
T
I'm trying to write a makefile and I compiled main.c. Then I'm trying to create main.o, but I'm confused as how to do so. I'm using a vi editor in UNIX. I tried gcc -o main.c, I get a fatal error saying that there's no input files. What went wrong?
You can use gcc's -c option to compile a source file without linking. This will leave you with a .o file:
gcc -c main.c
You can then create an executable by linking that .o file with the standard libraries, and other .o or .c files if you like:
gcc -o myprogram main.o
The primary advantage of this is when you have multiple .c files. In that case you can save time by not recompiling them all when one of them changes.
If you are using a Makefile, then you probably have too much in it. Warning: the following will overwrite your Makefile. Try:
echo 'all: main.o' > Makefile
make
or even:
> Makefile # truncate the Makefile. That is, make it empty
make main.o
or even:
rm Makefile
make main.o
Stop working so hard.