I try to create bare metal application for TI am335x soc based board. One thing I need to do is to invoke callback1 on rising edge and callback2 on falling edge. From the datasheet I figured out, that simultaneous detection for rising and falling edge could be enabled by writing 1 << pin to RISINGDETECT and FALLINGDETECT GPIO registers. However, I can't understand (see no signs of it in datasheet), how could I determine if the currently appeared interrupt was caused by RISING edge on GPIO or by FALLING edge?
how could I determine if the currently appeared interrupt was caused by RISING edge on GPIO or by FALLING edge?
Try checking the state of the pin.
A rising edge results in a on state, whereas a falling edge results in a off state.
So the current state of the pin implies the direction of the most-recent interrupt.
Related
I have a strange problem that I dont understand. Please bare with me as this is a difficult problem to deconstruct. I will thus give as much information as I can with test cases and results I have found.
The problem:
I need to set PA6 LOW and then use the DAC. When the DAC is changed in a transient manner, the pin PA6 will not return to 3V when set to HIGH.
In other words, the DAC causes the upper voltage limit of PA6 to be 0.6-0.8V.
I have confirmed this with oscilloscope.
The following piece of code is called inside a task/thread and executed at 50Hz:
if (enable == 1)
{
HAL_GPIO_WritePin(PROPULSION_ENABLE_GPIO_PORT, PROPULSION_ENABLE_GPIO_PIN, GPIO_PIN_RESET);
HAL_DAC_SetValue(&PropulsionModule_DAC, PropulsionModule_DAC_CHANNEL, DAC_ALIGN_12B_R, PropulsionData.propulsionSetPoint_12bit);
}
else
{
HAL_GPIO_WritePin(PROPULSION_ENABLE_GPIO_PORT, PROPULSION_ENABLE_GPIO_PIN, GPIO_PIN_SET);
HAL_DAC_SetValue(&PropulsionModule_DAC, PropulsionModule_DAC_CHANNEL, DAC_ALIGN_12B_R, 0);
}
Setup and environment
STM32F4 Discovery board
FreeRTOS configured with threads, queues and everything else works as expected
I have a single DAC set up on DAC_channel_2 (PA5) and a GPIO_output (PA6).
I also have these peripherals enabled, CAN bus, UART, several GPIO's, etc. Please see attached picture
Findings:
When I change the PA6 pin to PC4 (the adjacent pin) the problem goes away
When I change DAC_channel_2 to DAC_channel_1 the problem goes away
I flashed the code to two other brand new, out of the box, boards with the same errors.
Once PA6 is faulty and its high state is at 0.6V, resetting the microcontroller will reset the pin PA6 and PA6 will return to 3V in its HIGH state.
Any help would be greatly appreciated.
I found the problem. The problem is the MEMS chip on the discovery board. It is vitally important one realizes that not all pins on the discovery board are usable.
Refer to the first link below from Page 22 on which pins are available. Please note that some of the pins that are "not free" can still be used. See the application notes on each of the chips on the board in the second link.
Link 1: https://www.st.com/resource/en/user_manual/dm00039084-discovery-kit-with-stm32f407vg-mcu-stmicroelectronics.pdf
Link 2: https://ucilnica.fri.uni-lj.si/pluginfile.php/29604/mod_resource/content/1/en.DM00039084.pdf
I encountered some problems when using M93C46. I can read data in 93C46 through spi communication, but I cannot write data to 93C46. I checked the timing of my spi, but no problem was found.
Here are the sequences pictures:
Here is the code table and sequences pictures:
It looks like your D signal (what would be MOSI if this were SPI) is transitioning simultaneously with the rising edge of the clock. This would be SPI mode 1.
These "microwire" parts are not SPI, they are a pain in the backside.
You have to use a different clock edge when reading and writing. Write data before the rising edge of clock, the memory samples it on the rising edge (equivalent to SPI mode 0). However, the memory only outputs data on Q (equivalent to MISO) after the rising edge of the clock, so you have to read it on the falling edge of the clock (SPI mode 1).
I want to enable the PA8 pin in a processor (Atmel SAM3X / SAM3A). I have set PIOA_MDERp[7]=0 and PIOA_MDDR[7]=0 and PIO_OER[7]=0 and PIO_ODR[7]=1, so that the tri-state buffer will no longer send data out of the pin, and the pin is enabled to receive data from the environment and to send interrupts if needed. I also want to set my interrupt to rising edge, so I also did PIOA_RHLSR[7]=1 and PIOA_FELLSR[7]=0 and also PIO_ESR[7]=1 and PIOA_LSR[7]=0.
My problem now is how to modify NVIC registers so that this interrupt is enabled. I mean, on a rising edge on this pin, the state of this pin is pending, and then the changes I will apply to NVIC causes this pending state to active state.
My interrupt group priority and subgroup priority are both 3.
I know how to modify Interrupt set-enable register, interrupt clear-enable register, application interrupt and reset control register, and interrupt priority register. Still, my problem is that now I don't have any number for interrupts from this specific pin (PIOA8), so it is different from the time I had my interrupt number (from 1 to 240), and so I could know which register in the NVIC I should modify.
Thanks for your help.
I need to create a virtual uart port on a stm32 microcontroller. The pins are given and can be changed to timer input channels. The recieving signal is going to be modulated in current and voltage and i need to detect both. Those two pins can not be assigned to a uart. Does somebody has a tutorial or something, that can lead me in the right direction? I just started programming microcontrollers and i am still strugeling with all the timer, interrupts and details stuff.
If we are talking aobut baudrates for small (9600), then you can achieve this with timer and EXTI.
On EXTI set pin to rising and falling edge and between each IRQs check timer value.
If value is greater than start and stop condition time, you failed, else you have to check time spent for EXTi and calculate whether you received 10101010 or 11001100 or any other combination.
For TX mode, use timer for precise interrupts at bit slice for UART output data and create state machine for data output bit by bit.
Another option is to use SPI as virtual UART.
I would like to implement a pulse-sensitive, aka edge-triggered, interrupt on an LPC1759 microcontroller. In the UM10360.pdf datasheet and ARM Cortex-M3 user guide, it says that interrupts can be triggered based on level- or pulse-sensitive behavior, but I am unable to find how to set this to be pulse-sensitive. Can someone please tell me where to set this?
For my particular application(interfacing the LPC1759 with an AD7794 ADC), I would like to trigger an interrupt based on the falling edge of the MISO pin. Although it is not explicitly stated that the interrupt is trigger on the MISO value, I am assuming this based on the fact that, of the four SPI signals, the MISO is the only input to the microcontroller. Please let me know if this is not correct.
See UM10360.pdf, chapter 9.5.6: "GPIO interrupt registers". You can enable rising and falling edge interrupts only on port 0 and 2 pins. The interrupt vector is the same as external interrupt 3.