ADC on AT91SAM7 with DMA - arm

Question

I'm trying to write a code for ADC DMA. In my perspective, I've initiated ADC correctly. But it doesn't work and it doesn't interrupt. What am I missing? I initiated ADC and Interrupt and I am willing to access data on the interrupt.
Here is my code:
void __irq ISR_adc(void)
{
volatile AT91PS_ADC pADC = AT91C_BASE_ADC;
unsigned int AdcStatus = AT91C_BASE_ADC->ADC_SR;
unsigned short* ADC_Ptr;
unsigned short* ADC_Ptr_Next;
printf("ADC is: %d\n",Buffer1[0]);
if(((AdcStatus & AT91C_ADC_RXBUFF) == AT91C_ADC_RXBUFF) &&
((AdcStatus & AT91C_ADC_ENDRX) == AT91C_ADC_ENDRX))
{//Both bit set when get the end of next buffer
pADC->ADC_RPR = (unsigned long) Buffer1; // Receive Pointer Register
pADC->ADC_RCR = AD_DATA_BUFFER_SIZE; // Receive Counter Register
pADC->ADC_RNPR = (unsigned long)0; // Receive Next Pointer Register
pADC->ADC_RNCR = 0 ; // Receive Next Counter Registe
}
else if((AdcStatus & AT91C_ADC_ENDRX) == AT91C_ADC_ENDRX)
{//ENDRX bit set when reach the end of buffer.
pADC->ADC_RNCR = AD_DATA_BUFFER_SIZE;
}
*AT91C_AIC_EOICR = 0; // end of interrupts
}
void Configure_AD(void)
{
int i;
volatile AT91PS_ADC pADC = AT91C_BASE_ADC; // create a pointer to USART0 structure
volatile AT91PS_AIC pAIC = AT91C_BASE_AIC; // pointer to AIC data structure
volatile AT91PS_PIO pPIO = AT91C_BASE_PIOA; // pointer to PIO data structure
volatile AT91PS_PMC pPMC = AT91C_BASE_PMC; // pointer to PMC data structure
#define AD_PRESCAL 1
#define AD_STARTUP 1
#define AD_SHTIM 2
// Enable peripheral clock
pPMC->PMC_PCER = 1 << AT91C_ID_ADC;
//Notice: After ADC_SR = 0xc000 after Reset;
pADC->ADC_CR = AT91C_ADC_SWRST; //Reset AD
//Rxternal trigger: TIOA2 output pulse; Get data using ISP.
pADC->ADC_MR = ((AD_SHTIM << 24) | (AD_STARTUP << 16) | (AD_PRESCAL <<8) | AT91C_ADC_TRGEN_EN | AT91C_ADC_TRGSEL_TIOA2);
pADC->ADC_CHER = AT91C_ADC_CH4; //channel 4 enable
//Configure PDC; Write Counter Register reset ADC_SR.
pADC->ADC_PTCR = AT91C_PDC_RXTDIS ;
pADC->ADC_RPR = (unsigned long)Buffer1; // Receive Pointer Register
pADC->ADC_RCR = AD_DATA_BUFFER_SIZE; // Receive Counter Register
pADC->ADC_RNPR = (unsigned long)0; // Receive Next Pointer Register
pADC-> ADC_RNCR = 0 ; // Receive Next Counter Register
pADC->ADC_PTCR = AT91C_PDC_RXTEN ; //Enable PDC
pADC->ADC_IER = AT91C_ADC_ENDRX | AT91C_ADC_RXBUFF; //enable interrupt on transfer complete
pAIC->AIC_IDCR = (1<<AT91C_ID_ADC);
pAIC->AIC_SVR[AT91C_ID_ADC] = (unsigned int)ISR_adc;
pAIC->AIC_SMR[AT91C_ID_ADC] = (AT91C_AIC_PRIOR_LOWEST | 0x4 );
pAIC->AIC_IECR = (1<<AT91C_ID_ADC);
}