ld.exe permission denied Makefile gcc - c

Question

I want to compile and link my Project. I have Problems with linking of the target. It is the first time I`m using a makefile.
I think there may be a Problem with the $OBJ or call of the gcc.
I got the following error message:
C:\Projekte\playground\Modultest>make all
gcc -O0 -g -Wall -fmessage-length=0 -fprofile-arcs -ftest-coverage ./CUnit/headers ./CUnit/sources ./stub ./source ./test --coverage -o CUnit-Target
c:/mingw/bin/../lib/gcc/mingw32/4.8.1/../../../../mingw32/bin/ld.exe: cannot find ./CUnit/headers: Permission denied
c:/mingw/bin/../lib/gcc/mingw32/4.8.1/../../../../mingw32/bin/ld.exe: cannot find ./CUnit/sources: Permission denied
c:/mingw/bin/../lib/gcc/mingw32/4.8.1/../../../../mingw32/bin/ld.exe: cannot find ./stub: Permission denied
c:/mingw/bin/../lib/gcc/mingw32/4.8.1/../../../../mingw32/bin/ld.exe: cannot find ./source: Permission denied
c:/mingw/bin/../lib/gcc/mingw32/4.8.1/../../../../mingw32/bin/ld.exe: cannot find ./test: Permission denied
collect2.exe: error: ld returned 1 exit status
makefile:54: recipe for target 'CUnit-Target' failed
make: *** [CUnit-Target] Error 1
I have no spaces in the path.
This is my makefile
# makefile to generate UNIT-tests
# define the C compiler to use
CC = gcc
# define any compile-time flags
CFLAGS = -O0 -g -Wall -fmessage-length=0 -fprofile-arcs -ftest-coverage
# define any directories containing header files other than /usr/include
# TODO
HEADERS = ./CUnit/headers \
./CUnit/sources \
./stub \
./source \
./test
SOURCES = ./CUnit/sources \
./stub \
./source \
./test
#TODO Linkerflags
LFLAGS = --coverage -o
# define any libraries to link into executable:
# if I want to link in libraries (libx.so or libx.a) I use the -llibname
# option, something like (this will link in libmylib.so and libm.so:
LIBS =
# TODO define the C source files
TST_SRCS = min.c max.c
SRCS = CUnit.c Automated.c Basic.c Console.c CUCurses.c CUError.c Cunit_intl.c \
MyMem.c TestDB.c TestRun.c Util.c wxWidget.c \
$(TST_SRCS)
# define the C object files
#
# This uses Suffix Replacement within a macro:
# $(name:string1=string2)
# For each word in 'name' replace 'string1' with 'string2'
#OBJ = $(SRCS:%.c=%.o)
#OBJ = $(TST_SRCS:%.c=%.o)
OBJ=$(join($(dir $(SOURCES))), $(notdir $(SRCS:%.c=%.o)))
# define the executable file
TARGET = CUnit-Target
all: $(TARGET)
$(TARGET): $(OBJ)
$(CC) $(CFLAGS) $(HEADERS) $(OBJ) $(LFLAGS) $(TARGET)
#echo build finished
#execute tests
#Cunit.exe
# create coverage files
# TODO SRCS max.c min.c ?
# gcov -b -c -f max min
clean:
$(RM) *.o *~ $(MAIN)
# DO NOT DELETE THIS LINE -- make depend needs it