CC = gcc
OPTS = -W -O3
SRCDIR=./src
OBJDIR=./obj
INCDIR=./inc
BINDIR=./bin
SRCS=$(SRCDIR)/Functions.c \
SRCS=$(SRCDIR)/Function1.c \
SRCS=$(SRCDIR)/Function2.c \
SRCS=$(SRCDIR)/Function3.c \
INCLUDE = $(addprefix -I,$(INCDIR))
OBJS=${SRCS:$(SRCDIR)/%.c=$(OBJDIR)/%.o}
CFLAGS = $(OPTS) $(INCLUDE) $(DEBUG)
TARGET = $(BINDIR)/ Functions
all: $(TARGET)
$(TARGET): $(OBJS)
${CC} ${CFLAGS} -o $# $(OBJS)
$(OBJS): $(OBJDIR)/%.o : $(SRCDIR)/%.c
$(CC) $(CFLAGS) -c $< -o $#
Functions.c has a main inside that calls Function1(); .....Function3();
I'm trying to add the debug flag based on #ifndef
How to add a debug flag and set the Debug compiler directive inside this Makefile? I have #ifndef NDEBUG...#endif from Functions.h
TARGET = $(BINDIR)/ Functions
should be ?
TARGET = $(BINDIR)/Functions
CC=gcc
OPTS=-W -O3
DEBUG=
RM=rm
SRCDIR=src
OBJDIR=obj
INCDIR=inc
BINDIR=bin
SRCS=$(SRCDIR)/*.c
INCLUDE=$(addprefix -I, $(INCDIR))
OBJS=obj/Functions.o obj/Function1.o obj/Function2.o obj/Function3.o
CFLAGS = $(OPTS) $(INCLUDE) $(DEBUG)
TARGET = $(BINDIR)/Functions
all: $(TARGET)
$(TARGET): $(OBJS)
$(CC) $(CFLAGS) -o $# $(OBJS)
$(OBJS): $(OBJDIR)/%.o : $(SRCDIR)/%.c
$(CC) $(CFLAGS) -c $< -o $#
clean:
$(RM) -f $(TARGET) $(OBJDIR)/*.o
I couldn't get your OBJS expansion working, but the adove works on my end.
Related
I want to include in a random test.c file my own library to test if it works but I can't do it.
Even a simple make all doesn't work, but I'm supposed to have done everything right. I have the impression that my makefile doesn't even compile my .c files in .o
here is my make file:
SRCS = ft_atoi.c ft_isascii.c ft_memchr.c ft_putchar_fd.c ft_strchr.c ft_strlen.c ft_strtrim.c \
ft_bzero.c ft_isdigit.c ft_memcmp.c ft_putendl_fd.c ft_strdup.c ft_strmapi.c ft_substr.c \
ft_calloc.c ft_isprint.cft_memcpy.c ft_putnbr_fd.c ft_strjoin.c ft_strncmp.c ft_tolower.c \
ft_isalnum.c ft_itoa.c ft_memmove.c ft_putstr_fd.c ft_strlcat.c ft_strnstr.c ft_toupper.c \
ft_isalpha.c ft_memccpy.c ft_memset.c ft_split.c ft_strlcpy.c ft_strrchr.c \
\
CC = gcc
CFLAGS = -Wall -Wextra -Werror
HEADER = libft.h
OBJS = $(SRCS:.c=.o)
RM = rm -f
NAME = libft.a
.c.o:
$(CC) $(CFLAGS) -c $< -o ${<:.c=.o}
$(NAME): $(OBJS) $(HEADER)
ar rcs $(NAME) $(OBJS)
all: $(NAME)
clean:
$(RM) $(OBJS)
fclean: clean
$(RM) $(NAME)
re: fclean all
.PHONY: all clean fclean re
This simple program (two .c files and one .h) compiles and links properly from the command line. However, my Makefile is throwing an error during the linking stage. Proper tab usage is in effect.
CC = gcc
BINDIR = bin/
OBJDIR = obj/
SRCDIR = src/
MKDIR = mkdir -p
RM = rm -rf
SRC = $(wildcard $(SRCDIR)*.c)
_OBJS = $(patsubst $(SRCDIR)%.c, %.o, $(SRC))
OBJS = $(addprefix $(OBJDIR), $(_OBJS))
CFLAGS = -Wall -g -Iinclude
.PHONY: all
all: $(BIN)
_BIN = a.out
BIN = $(addprefix $(BINDIR), $(_BIN))
$(BIN): $(OBJS) $(BINDIR)
$(CC) -o $# $(CFLAGS) $<
$(BINDIR):
$(MKDIR) $(BINDIR)
$(OBJS): $(SRC) $(OBJDIR)
$(CC) $(CFLAGS) -c $< -o $#
$(OBJDIR):
$(MKDIR) $(OBJDIR)
.PHONY: clean
clean:
#echo "Cleaning things up..."
$(RM) $(OBJDIR) $(BINDIR)
The program's files:
main.c
#include <stdio.h>
#include <stdlib.h>
#include "hellomake.h"
int main(void) {
myPrintHelloMake();
return EXIT_SUCCESS;
}
hellomake.c
#include <stdio.h>
#include "hellomake.h"
void myPrintHelloMake(void) {
puts("Hello makefiles!");
}
hellomake.h
#ifndef __HELLO_H__
#define __HELLO_H__
void myPrintHelloMake(void);
#endif
The .c files are in the src/ directory and the .h file is in the include/ directory. Makefile compiles the code, creates the obj/ directory, and places and main.o and hellomake.o therein. However, that is where things break down. Here is gcc's complaint:
$ make
mkdir -p obj/
gcc -Wall -g -Iinclude -c src/hellomake.c -o obj/hellomake.o gcc -Wall -g -Iinclude -c src/hellomake.c -o obj/main.o mkdir -p bin/ gcc -o bin/a.out -Wall -g -Iinclude
obj/hellomake.o /usr/bin/ld: /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/Scrt1.o: in function `_start': (.text+0x20): undefined reference to `main' collect2: error: ld returned 1 exit status make: *** [Makefile:34: bin/a.out] Error 1
There were a number of issues.
I'd leave off / from (e.g.) BINDIR et. al.
The patsubst was incorrect. It needed $(OBJDIR) in the the TO
Using _OBJS was unnecessary/harmful.
The rule for $(OBJS) was incorrect. It created the two .o files using the first prereq source, so [the function] main was defined twice. It needs a pattern rule instead.
Using $(BINDIR) as a prereq for $(BIN) added bin/ at the end of the gcc line [and it complained]
As M.Oehm mentioned, $< only gets the first prereq.
The all: was indented so it was not recognized properly
Anyway, here's the corrected Makefile:
CC = gcc
BINDIR = bin
OBJDIR = obj
SRCDIR = src
MKDIR = mkdir -p
RM = rm -rf
SRC = $(wildcard $(SRCDIR)/*.c)
###_OBJS = $(patsubst $(SRCDIR)%.c, %.o, $(SRC))
###OBJS = $(addprefix $(OBJDIR), $(_OBJS))
OBJS = $(patsubst $(SRCDIR)/%.c, $(OBJDIR)/%.o, $(SRC))
CFLAGS = -Wall -g -Iinclude
_BIN = a.out
BIN = $(addprefix $(BINDIR)/, $(_BIN))
.PHONY: all
all: $(BINDIR) $(OBJDIR) $(BIN)
####$(BIN): $(OBJS) $(BINDIR)
$(BIN): $(OBJS) $(BINDIR)
###$(CC) -o $# $(CFLAGS) $<
$(CC) -o $# $(CFLAGS) $(OBJS)
$(BINDIR):
$(MKDIR) $(BINDIR)
###$(OBJS): $(SRC) $(OBJDIR)
$(OBJDIR)/%.o: $(SRCDIR)/%.c
$(CC) $(CFLAGS) -c $< -o $#
$(OBJDIR):
$(MKDIR) $(OBJDIR)
.PHONY: clean
clean:
#echo "Cleaning things up..."
$(RM) $(OBJDIR) $(BINDIR)
I want to create a Makefile for a big C project, with files divided into directories. What I wrote is
CC = gcc
AR = ar
ARFLAGS = rvs
CFLAGS += -std=c99 -Wall -g
INCDIR = ./include
LIBDIR = ./lib
SRCDIR = ./src
BINDIR = ./bin
OBJDIR = ./obj
TESTDIR = ./testfile
INCLUDES = -I.
LDFLAGS = -L/lib
LIBFUNCTIONS = /-lfunctions
LIBTH = -lpthread
LIBUTILITY = /-lutility
OPTFLAGS = -O3 -DNDEBUG
TARGETS = $(BINDIR)/test_functions \
.PHONY: all clean cleanall test1 test2
.SUFFIXES: .c .h
$(BINDIR)/%: $(SRCDIR)/%.c
$(CC) $(CFLAGS) $(INCLUDES) $(OPTFLAGS) -o $# $<
$(OBJDIR)/%.o: $(SRCDIR)/%.c
$(CC) $(CFLAGS) $(INCLUDES) $(OPTFLAGS) -c -o $# $<
all : $(TARGETS)
$(BINDIR)/test_functions: $(OBJDIR)/test_functions.o $(LIBDIR)/libutility.a $(LIBDIR)/libfunctions.a
$(CC) $(CFLAGS) $(INCLUDES) $(FLAGS) $(LDFLAGS) -o $# $< $(LIBUTILITY) $(LIBFUNCTIONS)
$(OBJDIR)/test_functions.o: $(SRCDIR)/test_functions.c $(INCDIR)/utility.h $(LIBDIR)/libutility.a $(INCDIR)/functions.h $(LIBDIR)/libfunctions.a
$(CC) $(CCFLAGS) $(INCLUDES) $(FLAGS) -c -o $# $<
$(LIBDIR)/libutility.a: $(OBJDIR)/utility.o $(INCDIR)/utility.h
$(AR) $(ARFLAGS) $# $<
$(LIBDIR)/libfunctions.a: $(OBJDIR)/functions.o $(INCDIR)/functions.h $(INCDIR)/utility.h
$(AR) $(ARFLAGS) $# $<
clean :
rm -f $(TARGETS)
cleanall : clean
\rm -f *.o *~
the problem is that when I try to compile the project using the makefile, the result is
gcc -std=c99 -Wall -g -I. -L/lib -o bin/test_functions obj/test_functions.o -lutility -lfunctions
/usr/bin/ld: impossibile trovare -lutility
/usr/bin/ld: impossibile trovare -lfunctions
collect2: error: ld returned 1 exit status
make: *** [Makefile:54: bin/test_functions] Error 1
it seems that the compiler cannot find the libraries. what can I do to make it work properly?
You have this:
LIBDIR = ./lib
then in your link line you have this:
LDFLAGS = -L/lib
Notice the difference?
Why don't you just say:
LDFLAGS = -L$(LIBDIR)
to avoid repeating yourself (and getting it wrong)?
I am new to makefile and am trying to compile several files.
First is called s-chat and the others are RWT (reader-writer) and DP (dining philosopher). They both use my list library, but s-chat needs it to compile with the -m32 flags.
This is what I tried to do: I called one libMonitor.a using lib-adders.o, lib_movers.o, lib_removers.o. The other one is liblist_32 using lib_adders_32.o, lib_removers_32.o, lib_movers_32.o. For some reason, only the first of these two libraries is made, and the other says it cannot find its first dependency.
PTHREADS = /student/cmpt332/pthreads
RTT = /student/cmpt332/rtt
CC = gcc
CFLAGS = -g
CPPFLAGS = -std=c90 -Wall -pedantic
.PHONEY: all clean
ARCH = $(shell uname -sm | tr -d ' ')
ifeq ($(ARCH),SunOS)
ARCH = $(PLATFORM)
PROCESSOR = "$(shell uname -p)"
ifeq ($(PROCESSOR),i386)
ARCH = i86pc
endif
endif
all: s-chat reader-writer-test dining-philosophers-test
RWT_OBJS = reader-writer_$(ARCH).o reader-writer-monitor_$(ARCH).o Monitor_$(ARCH).o libMonitor_$(ARCH).a
reader-writer-test: CPPFLAGS += -I$(PTHREADS)
reader-writer-test: LDFLAGS += -L$(PTHREADS)/lib/$(ARCH)
reader-writer-test: LDLIBS += -lpthreads
reader-writer-test: $(RWT_OBJS)
$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $#
reader-writer_$(ARCH).o: reader-writer.c reader_writer_monitor.h Monitor.h
reader-writer-monitor_$(ARCH).o: reader-writer-monitor.c reader_writer_monitor.h Monitor.h
DP_OBJS = dining-philosophers_$(ARCH).o dining-philosophers-monitor_$(ARCH).o Monitor_$(ARCH).o libMonitor_$(ARCH).a
dining-philosophers-test: CPPFLAGS += -I$(PTHREADS)
dining-philosophers-test: LDFLAGS += -L$(PTHREADS)/lib/$(ARCH)
dining-philosophers-test: LDLIBS += -lpthreads
dining-philosophers-test: $(DP_OBJS)
$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $#
dining-philosophers_$(ARCH).o: dining-philosophers.c dining_philosophers_monitor.h Monitor.h
dining-philosophers-monitor_$(ARCH).o: dining-philosophers-monitor.c dining_philosophers_monitor.h Monitor.h
Monitor_$(ARCH).o: Monitor.c Monitor.h
list_adders.o: list_adders.c list.h
list_movers.o: list_movers.c list.h
list_removers.o: list_removers.c list.h
libMonitor_$(ARCH).a: list_adders.o list_movers.o list_removers.o
ar rcs $# $^
list_adders_32.o: CFLAGS += -m32
list_adders_32.o: LDFLAGS += -m32
list_adders_32.o: list_adders.c list.h
list_movers_32.o: CFLAGS += -m32
list_movers_32.o: LDFLAGS += -m32
list_movers_32.o: list_movers.c list.h
list_removers_32.o: CFLAGS += -m32
list_removers_32.o: LDFLAGS += -m32
list_removers_32.o: list_removers.c list.h
liblist_32_$(ARCH).a: list_adders_32.o list_movers_32.o list_removers_32.o
ar rcs $# $^
s-chat: CPPFLAGS += -I$(RTT)/include
s-chat: CFLAGS += -m32
s-chat: LDFLAGS += -L$(RTT)/lib/$(ARCH) -m32
s-chat: LDLIBS += -lRtt -lRttUtils
s-chat: s-chat.o liblist_32_$(ARCH).a
s-chat.o: s-chat.c
%_$(ARCH).o %_32_$(ARCH).o %.o %_32.o: %.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $# $<
%: %.o
$(CC) $(LDFLAGS) $(LDLIBS) $^ -o $#
clean:
rm -rf *.o *.a reader-writer-test dining-philosophers-test s-chat
This is the error I get:
ar rcs libMonitor_Linuxx86_64.a list_adders.o list_movers.o list_removers.o
ar: list_adders.o: No such file or directory
Makefile:66: recipe for target 'libMonitor_Linuxx86_64.a' failed
make: *** [libMonitor_Linuxx86_64.a] Error 1
And if I make s-chat last, libMonitor is made, but I get the exact same error with liblist_32 and it says it can't find list_adders_32.o
Anyone know what's going on and how to fix this?
Thanks in advance!!
https://www.gnu.org/software/make/manual/make.html#Pattern-Intro
If a pattern rule has multiple targets, make knows that the rule’s recipe is responsible for making all of the targets. The recipe is executed only once to make all the targets.
%_$(ARCH).o %_32_$(ARCH).o %.o %_32.o: %.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $# $<
Should be something like
%_$(ARCH).o: %.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $# $<
%_32_$(ARCH).o: %.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $# $<
%.o: %.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $# $<
%_32.o: %.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $# $<
But since it seems like all of your sources are in the same directory anyway, you could just delete these rules completely because make already has a built-in rule for %.o: %.c.
i wrote a makefile with some commands.after running command make got a errors undefined reference to sqrtand undefined reference to exp
my make file :
CFILES = smLe.c iniTra.c le.c res.c uti.c smClass.c ini.c clas.c
OBJECTS = smLe.o iniTra.o le.o res.o uti.o smClass.o ini.o clas.o
OBJECTS1 = smLe.o iniTra.o le.o res.o uti.o
OBJECTS2 = smClass.o ini.o clas.o
CFLAGS = -O -lm
CC = gcc
.c .o:
$(CC) $(CFLAGS) $(OBJECTS) -c $<
p1: $(OBJECTS1)
$(CC) $(CFLAGS) $(OBJECTS1) -o $#
p2: $(OBJECTS)
$(CC) $(CFLAGS) $(OBJECTS2) -o $#
smLe.o: iniTra.h le.h res.h
iniTra.o: iniTra.h
le.o: iniTra.h uti.h le.h
res.o: iniTra.h le.h res.h
smClass.o: ini.h clas.h
ini.o: ini.h clas.h
clas.o: ini.h clas.h
Is it any thing missing in my make file.why this error occur in this make file code?please help me ..thanks
-lm is an LDLIB, you pass it to the linker
CFLAGS = -O
LDLIBS = -lm
CC = gcc
.c .o:
$(CC) $(CFLAGS) $(OBJECTS) -c $<
p1: $(OBJECTS1)
$(CC) $(OBJECTS1) -o $# $(LDLIBS)
Libraries have to appear after object files that call what is in them on the command line.