I got a Nios 2 project that is supposed to be able to run as hardware on my FPGA but how?
I've built it and I can run it in the simulator:
I've chose the uart0 in the BSP editor
But then when I run it as Nios hardware nothing happens
Can you tell me how it should be done?
It works to load the FPGA with a system in Quartus II programmer:
Update
The instructor has answered.
It's possible to run the OS on the DE2 board but the program will
execute quickly. The > output comes on the serial port uart0, i.e.
the 9-polar D-sub contact. Since the program is running so quickly
it can be wise to disconnect the USB-to-serial > adapter from the DE2
(but not from the PC) when the number 2333 has been consumed. >
Otherwise the buffer in putty will be full so that the output from the
beginning of the run is lost.
I've read your other thread, about Hello World on Nios II and nowhere do you mention that you configure the FPGA for running the NIOS II, so maybe that's the problem?
I quote from Nios II handbook (see page 2-5 and 2-6):
"Configuring the FPGA.
Before you can run your software, you must ensure that the correct hardware design is running on the FPGA. To configure the FPGA, you use the Quartus® II Programmer.
In the Windows operating system, you start the Quartus II Programmer from the Nios II SBT for Eclipse, through the Nios II menu. In the Linux operating system, you start Quartus II Programmer from the Quartus II software.
The project directory for your hardware design contains an SRAM Object File (.sof)
along with the .sopcinfo file. The .sof file contains the hardware design to be programmed in the FPGA."
Also se the Qartus II FPGA programmer handbook for info on how to program your FPGA.
Related
I am trying to understand how can I write tasks for VxWorks. I have VxWorks on a board that is mounted on a development board.
I can access the board through Putty and a serial terminal connected to the UART of the system. How can I write other tasks (maybe to communicate with other UARTs or other Serial Interfaces) ?
And how do I know where to find the documentation describing how I can access those serial interfaces? (for example write/read methods, which file to include etc)*
Thank you
VxWorks is cross development environment, so you need a licensed development system on Windows or Linux desktop to create applications.
Then you load the compiled code on the target reference board as process/RTP or LKM/DKM. How you get it there varies by board: FTP, TFTP, removable USB or SD card....
At the C shell on booted system you can start a task in the kernel context with any public symbol. But if your working with deployed system, it shouldn't have the C shell, that's a serious security risk :)
Try..
-> sp printf, "\nHello VxWorks World!\n"
I want to reprogram the external flash of a raspberry Pico via SWD line.
This feature must be implemented in a different microcontroller, not from a Linux computer so the OpenOCD library cannot be used.
I already wrote a C library that is able to read and write in RAM and in core registers via SWD and I'm able to put the Cortex-M0+ into halt state.
I read many tutorials and documentation and those that are useful are:
http://markding.github.io/swd_programing_sram/
https://www.silabs.com/documents/public/application-notes/an0062.pdf
https://community.silabs.com/s/article/how-to-program-internal-sram-over-swd?language=en_US
but unfortunately they aren't clear enough.
Can you explain the sequence of commands that I should send to RP2040 to correctly upload the new firmware?
Thanks for your help!
I'm trying to boot a kernel (extracted from a firmware) using QEMU.
Qemu emulation seems to start at 0x0.
The problem is that the memory from 0x0 to 0x04000000 is only filled with 0.
How can i debug the bootloader?
You don't say what your command line is. The address where QEMU starts execution depends on many things:
the guest CPU architecture
which board model you are emulating
whether you passed QEMU a BIOS image file
the file format of any file passed to -kernel (ELF, plain kernel image, uImage, etc)
In general, though, you should not expect to be able to pull a random kernel image out of a firmware dump for a piece of Arm hardware and run it under QEMU. This is because every Arm board or machine is different -- RAM may be in different places, the devices such as the serial port are at different addresses, and so on -- and the kernel will only boot on systems which it has been compiled to support. The chances are very high that (a) QEMU does not have a specific emulation of the bit of hardware that the firmware dump is for and (b) the kernel from the firmware has not been built to also run on any of the board types that QEMU does support. So it will almost certainly simply crash very early on in bootup without producing any output.
If you want to debug what's going on in early bootup, the best approach is probably to use QEMU's built in gdbstub, and attach a guest-architecture-aware gdb to it. You may also find QEMU's internal logging via the '-d' option useful, though it requires some familiarity with how QEMU works to make sense of the output.
I successfully implemented an "[accelerator in 15 minutes]"1 on parallella board. Now I need to send an interrupt from pl to ps. So I connected it to IRQ_F2P of Zynq processing system.
Now, how can I get this interrupt in arm processor?
Usual interrupt example using "XILINX SDK" tool which uses a JTAG. But in parallella , I don't have a JTAG. (I am coping the program to SD card and execute it from SD card using Ubuntu). So any suggestions are most welcome.
So for parallella, I tried to use the Xilinx SDK, but the header files are creating an error..
My one more doubt is "Is it possible to create a bsp using sdk tool and copy it into sd card and then make it run on parallella board. Will it work ?
If not, how do we get this interrupt in arm processor, because all example uses Xilinx header files like "xparameters.h, xil_printf.h, xcugic.h, etc" and these are connected to many other Xilinx functions.
I've managed to run a complicated project on the Nios 2 Altera DE2 board where I created a timer with assembly and C code using the input and output. With the Nios 2 IDE I can download the project to the DE2 FPGA and the clock runs as expected. But I don't understanding everything about the programming model and I'm also trying to understand the basic Hello World example and the diagnostics example that comes with the IDE.
The Hello World example is just
/*
* "Hello World" example.
*
* This example prints 'Hello from Nios II' to the STDOUT stream. It runs on
* the Nios II 'standard', 'full_featured', 'fast', and 'low_cost' example
* designs. It runs with or without the MicroC/OS-II RTOS and requires a STDOUT
* device in your system's hardware.
* The memory footprint of this hosted application is ~69 kbytes by default
* using the standard reference design.
*
* For a reduced footprint version of this template, and an explanation of how
* to reduce the memory footprint for a given application, see the
* "small_hello_world" template.
*
*/
#include <stdio.h>
int main()
{
printf("Hello from Nios II!\n");
return 0;
}
But when I compile and run this "as Nios 2 hardware", it only prints Hello World to the standard out in the IDE, it does not download and run on the board - isn't is supposed to do that? What is the point of the example if it does't run on the board? Did I do anything wrong, if so what since the example compiles and runs? Do I have to set the BSD editor to something?
Update
It's not working at all. I tried the different combinations in the BSP editor and none work. When I try to run the project as "Nios II hardware" nothing happens on the board even though it says in the IDE that the project is downloading to the board. Why is the easy thing difficult? The UX is horrible and having to guess is not scientific.
Here's a link from an Embedded Systems Design Course in Columbia University.
Check the link to lab 3 for an implementation of flashing LEDs with VHDL and C on the Altera DE2 Board.
This implementation uses Altera Quartus, Nios II and the SOPC Builder. I'll try to summarize the steps below:
You would need to write SRAM and LED controllers in VHDL/Verilog to connect to the Avalon Bus. Create a system on the SOPC Builder. Use these controllers to create components in the SOPC Builder (SRAM and LED components).
Connect the components to the Nios II processor, and the JTAG debug module. Assign base addresses and generate your system.
In Nios II, create a C project (Nios II Application and BSP from template) using the SOPC file generated by the SOPC Builder.
Replace the code in the template with a C Program (in this case an LED flasher program). Access the LEDs using the base addresses you generated earlier.
Build and run your program as Nios II Hardware.
More info here.
The program IS running on the board. From the program comments...
This example prints 'Hello from Nios II' to the STDOUT stream.
The STDOUT stream in this case is the software terminal. So the Nios II board is running the hello world program and sending the output to the computer. To use the screen on the board you'll have to include the LCD display in the configuration with the SOPC builder, then write to the LCD screen directly.
From the Nios II documentation (Nios II Software Developer’s Handbook), you have to update your BSP to set stdout as the correct device.
Example:
nios2-bsp hal my_bsp --default_stdio uart1
Probably you didn't understood the flow about how its working, basically
You have to include JTAG-UART module to all your NIOS II System. which is a combination of CPU Debugger and UART communication for the system.
Whenever you use pritnf or scanf statements, there is no standard IO in the hardware. so the system will use JTAG- UART peripheral to communicate with IDE.
The same USB cable is used for downloading as well as JTAG UART
Actually the program is downloading in the hardware and using the USB cable connected with the Kit, printing in the console.
if user wish to change it, do it in BSP Editor but with respective IP added in the system.