exedarken: darken.c
gcc -o exedarken darken.c
exeimagestats: imagestats.c
gcc -o exeimagestats imagestats.c
exelighten: lighten.c
gcc -o exelighten lighten.c
exerotate: rotate.c
gcc -o exerotate rotate.c
exeflip: flip.c
gcc -o exeflip flip.c
exematte: matte.c
gcc -o exematte matte.c
Theres my makefile. Is there a way for when I execute this makefile, I get to see the compile errors I get?
By default, make prints the output of any command it executes, ie if there are compilation errors, they should be shown.
On an unrelated note: repeating yourself is bad; your makefile can be simplified to
executables := exedarken exeimagestats exelighten exerotate exeflip exematte
$(executables) : exe% : %.c
gcc -o $# $<
Write in console:
make VERBOSE=1
Related
Im having trouble creating a makefile for 5 c programs. I now that each of the c programs are able to compile on its own but when I try to make a makefile I get this error when running make
Makefile:2: *** missing separator. Stop.
The file names that I am trying to put into the makefile are first.c, second.c, third.c, fourth.c, and fifth.c. This is what I have for my makefile as of right now:
program: first.o second.o third.o fourth.o fifth.o
gcc -o program first.o second.o third.o fourth.o fifth.o
first.o: first.c
gcc -c first.c
second.o: second.c
gcc -c second.c
third.o: third.c
gcc -c third.c
fourth.o: fourth.c
gcc -c fourth.c
fifth.o: fifth.c
gcc -c fifth.c
How many times are we going to give the same answer but here is my take on the same thing.
The Makefile should consist of the following:
program: first.o second.o third.o fourth.o fifth.o
gcc -g -o program first.o second.o third.o fourth.o fifth.o
.c.o:
gcc -c -g $<
Where the spaces before the gcc lines are a single tab not spaces. If you use spaces or forget the colon at the end, you will get "missing separator".
The
.c.o:
is the old way to do it but it still works. This creates a default rule to turn .c files into .o files. Since I include the -c option to only compile, I did not bother with the -o $# that would say where to send the output.
Observe, this addresses the "missing separator" issue and produces the one executable that was originally asked for.
Alternatively:
all: first second third fourth fifth
%.o: %.c #Suppress default rule
%: %.c
gcc -o $# $<
This is how it should be formatted:
all: first second third fourth fifth
first: first.c
gcc -o first first.c
second: second.c
gcc -o second second.c
third: third.c
gcc -o third third.c
fourth: fourth.c
gcc -o fourth fourth.c
fifth: fifth.c
gcc -o fifth fifth.c
I have just started learning about makefile files. I created a program that consists of two functions and wanted to use a makefile to put it all together. This is my file:
#Makefile
all: main
main: main.o find_root.o
clang -o main main.o find_root.o
main.o: main.c
clang -c -Wall --pedantic -std=c11 main.c -lm
find_root.o: find_root.c
clang -c -Wall --pedantic -std=c11 find_root.c -lm
clean: rm -f main *.o*
However, when I run this, I get an error - "undefined reference to cos". I am using the cosine functions in my program, but I have already linked the library to the compilation of those two files. I thought about adding "-lm" to the first clang option as well. This led to no errors, but it made a warning instead - saying that "-lm linker is unused". What should I change in my file?
The "-lm" is a linker option but you have only included it in your compilation rule (main.o: main.c). You need to include it in your linker rule (main: main.o find_root.o).
As it stand the -lm option is ignored during compilation and missing during linking.
The linker flags aren't used when compiling, but when linking, so the command for the main rule should have -lm, rather than the command for the *.o files.
Better would be just to set the appropriate variables, and let Make use its built-in rules:
#Makefile
LDLIBS += -lm
CFLAGS += -Wall --pedantic -std=c11
C = clang
all: main
main: main.o find_root.o
$(LINK.c) $^ $(LDLIBS) -o $#
clean:
$(RM) main *.o *~
This is my makefile:
all: prgrm1 prgrm2
prgrm1: prgrm1.c
gcc -o prgrm1 prgrm1.c -lrt
prgrm2: prgrm2.c
gcc -o prgrm2 prgrm2.c -lrt
When I try to compile I get the message "Nothing to be done for 'all'."
I made sure that I used tabs not spaces so that is not it. What am I doing wrong?
[Files in my directory][1]
Need help compiling in a make file.
So I have this link list assignment i'm doing and the directions were.
stringlist.h is supposed to contain the node and the function prototypes
stringlist.c is supposed to have the functions completed that are defined in stringlist.h. BUT stringlist.c is not supposed to contain main at all. Then, namelist.c is supposed to contain main and just have the I/O and its just supposed to call the command functions that are in stringlist.c.
So to compile this we are supposed to create a make file. Whenever I try to I get an error because main doesn't exit in one of the c files. Throughout the term we compiled code like this "gcc -std=gnu99 -m32 -Wall -g -o file file.c"
But it doesn't work.
How would I create the make file? Been spending hours and can't figure it out.
As stated by Jonathan Leffler, the sample Makefile I provided had a few bad ideas. Here's an improvement:
# compiler:
CC = gcc
# compiler flags:
CFLAGS = -g -Wall
# the build target executable:
TARGET = executable
# object files to build:
OBJ = namelist.o stringlist.o
all: $(TARGET)
$(TARGET): $(OBJ)
$(CC) $(CFLAGS) -o $(TARGET) $(OBJ)
Try this:
OBJ := namelist.c stringlist.c
GCC := gcc -g
CFLAGS := -std=gnu99 -m32 -Wall
compile: $(OBJ)
$(GCC) $(CFLAGS) $(OBJ) -o executable
I am trying to compile a very simple program using the -m32 flag.
If I try to do this using gcc -m32 it works just fine(I have the needed libs)
Yet, when I add this flag to my flags in a makefile, I get a weird error
This is the makefile that I have
CC=gcc
CFLAGS=-m32 -O1 -W -Wall -pedantic -std=c99
all: main.o
$(CC) -o main main.o
rm main.o
clean:
rm main
The error that I receive is the following
gcc -o main main.o
/usr/bin/ld: i386 architecture of input file `main.o' is incompatible with i386:x86-64 output
collect2: ld returned 1 exit status
make: *** [all] Error 1
Can someone please tell me what does this mean? and how can I fix it?
As for the code, the code does NOTHING except printing 'hello world'
I am using GCC 4.4.3 under Linux 2.6.35 64-bits
Your mistake is that you don't pass -m32 to the linker.
You actually need to change your Makefile to look like this:
CC=gcc
CFLAGS=-m32 -O1 -W -Wall -pedantic -std=c99
LDFLAGS = -m32
all: main.o
$(CC) $(LDFLAGS) -o main main.o
rm main.o
clean:
rm main
An even better approach would be the following Makefile:
CC=gcc
CFLAGS=-m32 -O1 -W -Wall -pedantic -std=c99
LDFLAGS=-m32
.INTERMEDIATE: main.o
all: main
main: main.o
clean:
-rm main
In the later you just say that main depends on main.o and GNU Make will invoke the linker with the LDFLAGS as arguments for you as it invokes the compiler with the CFLAGS as arguments for the main.o
"The targets which .INTERMEDIATE depends on are treated as intermediate files. See section Chains of Implicit Rules. .INTERMEDIATE with no dependencies marks all file targets mentioned in the makefile as intermediate." Special Built-in Target Names
You should inform the linker as well about the architecture being 32-bit. Try adding
LD = $(CC)
LDFLAGS = -m32
to your Makefile and change
$(CC) -o main main.o
to
$(LD) $(LDFLAGS) -o main $^
and it shoud work.
(Why it worked? If you use GCC to compile and link your code in one step, all the relevant flags and options will be passed down not only to the compiler but to the linker as well.)