CC=gcc
CFLAGS=-Wall -g -std=c11 -c
LDFLAGS = -shared
BIN = ./bin/
SRC = ./src/
SRC1 = ./src/test1.c
SRC2 = ./src/test2.c
SRC_FILES = $(wildcard ./src/*.c)
program:
$(CC) $(CFLAGS) $(LDFLAGS) $(SRC1) -Iinclude -o $(BIN)test1.so
$(CC) $(CFLAGS) $(LDFLAGS) $(SRC2) -Iinclude -o $(BIN)test2.so
test1:
$(CC) $(CFLAGS) $(LDFLAGS) $(SRC1) -Iinclude -o $(BIN)test2.so
test2:
$(CC) $(CFLAGS) $(LDFLAGS) $(SRC2) -Iinclude -o $(BIN)test2.so
cls:
clear
clean:
rm ./bin/*
so my folder set up is the root which is called temp, then inside that another folder called compile, within that is the the makefile, src, include, bin. what i need help doing is having the .so file output to temp instead of to bin but im not sure how to do that
Just use the same technique that you used with BIN.
$(CC) $(CFLAGS) $(LDFLAGS) $(SRC2) -Iinclude -o ../test2.so
Related
I am new to c programming, and I am having a problem with making Makefile for it.
I did like
CC = gcc
CFLAGS = -fsanitize=address -g -Wall -Wvla
OUTPUT = prac
all: $(OUTPUT)
mymalloc.o: mymalloc.c mymalloc.h
$(CC) $(CFLAGS) -c $# mymalloc.c
%: %.c
$(CC) $(CFLAGS) -o $# mymalloc.o $^
and I try to make file with just typing "make"
But it keep says
gcc -fsanitize=address -g -Wall -Wvla -o prac mymalloc.o prac.c
clang: error: no such file or directory: 'mymalloc.o'
make: *** [prac] Error 1
whenever I try to make it , did I do something wrong?
Thank you.
Edit)
I got it right with using this!
CC = gcc
CFLAGS = -fsanitize=address -g -Wall -Wvla
DEPS = mymalloc.h
OBJS = prac.o mymalloc.o
%.o: %.c $(DEPS)
$(CC) $(CFLAGS) -c -o $# $<
prac: $(OBJS)
$(CC) $(CFLAGS) -o $# $^
You need to make the executable dependent on mymalloc.o:
%: %.c mymalloc.o
$(CC) $(CFLAGS) -o $# mymalloc.o $^
The dependency tells make that it needs to execute the rule for creating mymalloc.o.
Also your rule for making mymalloc.o is wrong. You need -o before $#:
mymalloc.o: mymalloc.c mymalloc.h
$(CC) $(CFLAGS) -c -o $# mymalloc.c
Otherwise it's trying to use the output file as one of the input files.
My makefile is compiling write_time.o although i'm not giving it any rule. However, when I actually write a rule for it, it wouldn't compile. Any suggestion on what might cause this problem? Below is my makefile:
INCLUDES = -I../include -I/opt/local/include
CC = gcc
OBJS = image_io.o xcorr.o textfile_io.o main.o array_processing.o \
fit2d.o poly.o mattran.o matsolve.o nelder_mead.o process.o \
open_seq_file.o write_time.o close_seq_file.o
DEBUGS = -g
CFLAGS = $(INCLUDES) -Wall -O2 $(DEBUGS)
DESTDIR = ../bin
LDFLAGS = -L. -L/opt/local/lib -ltiff -lm -L../lib -lmatrix ../include/seq_io.h
DEPS = ../include/file_io.h ../include/corr.h \
../include/matrix.h /opt/local/include/tiffio.h \
/opt/local/include/tiff.h ../include/seq_io.h
#../include/nmsimplex.h
all: $(DESTDIR)/main
image_io.o: image_io.c ../include/file_io.h /opt/local/include/tiffio.h \
/opt/local/include/tiff.h
$(CC) $(CFLAGS) -o $# -c $<
xcorr.o: xcorr.c ../include/file_io.h
$(CC) $(CFLAGS) -o $# -c $<
textfile_io.o: textfile_io.c ../include/file_io.h
$(CC) $(CFLAGS) -o $# -c $<
array_processing.o: array_processing.c ../include/file_io.h
$(CC) $(CFLAGS) -o $# -c $<
fit2d.o: fit2d.c ../include/matrix.h
$(CC) $(CFLAGS) -o $# -c $<
poly.o: poly.c ../include/corr.h
$(CC) $(CFLAGS) -o $# -c $<
nelder_mead.o: nelder_mead.c ../include/corr.h
$(CC) $(CFLAGS) -o $# -c $<
# nmsimplex.o: nmsimplex.c ../include/nmsimplex.h
# $(CC) $(CFLAGS) -o $# -c $<
process.o: process.c ../include/corr.h
$(CC) $(CFLAGS) -o $# -c $<
mattran.o: mattran.c ../include/matrix.h
$(CC) $(CFLAGS) -o $# -c $<
matsolve.o: matsolve.c ../include/matrix.h
$(CC) $(CFLAGS) -o $# -c $<
open_seq_file.o: open_seq_file.c ../include/seq_io.h
$(CC) $(CFLAGS) -o $# -c $<
close_seq_file.o: close_seq_file.c ../include/seq_io.h
$(CC) $(CFLAGS) -o $# -c $<
main.o: main.c ../include/file_io.h ../include/nmsimplex.h ../include/corr.h ../include/seq_io.h
$(CC) $(CFLAGS) -o $# -fopenmp -c $<
$(DESTDIR)/main: $(OBJS)
$(CC) -o $# -fopenmp $^ $(LDFLAGS)
.PHONY: clean
clean:
rm -f *.o *~
This compiles fine. But when I add in:
write_time.o: write_time.c ../include/seq_io.h
$(CC) $(CFLAGS) -o $# -c $<
I get the error:
make: *** No rule to make target `../include/seq_io.h', needed by `write_time.o'. Stop.
That error probably means that ../include/seq_io.h doesn't exist. You've listed it as a dependency, and make insists that dependencies either exist or that there is some way to automatically create them.
I need to modify the Makefile I have to store only the object file associated with "record.c" into the bin folder. Here is what my directory structure looks like before executing Make.
bin/
include/
-hash_table.h
-history.h
-parser.h
-record.h
-shell.h
-variables.h
lib/
obj/
src/
-hash_table.c
-history.c
-parser.c
-record.c
-shutil.c
-sshell.c
-variables.c
...and here is the Makefile:
# Beginning of Makefile
SRC = src/shutil.c src/parser.c src/sshell.c src/history.c src/hash_table.c src/variables.c src/record.c
OBJS = obj/shutil.o obj/parser.o obj/sshell.o obj/history.o obj/hash_table.o obj/variables.o bin/record.o //<----
HEADER_FILES = include/shell.h include/parser.h include/history.h include/hash_table.h include/variables.h include/record.h
EXECUTABLE = sshell
LIBS = lib/libshell.so lib/libparser.so lib/libhistory.so lib/libhash_table.so lib/libvariables.so lib/librecord.so
LIBCFLAGS = $(CFLAGS) -D_REENTRANT -fPIC
CFLAGS = -Wall
CC = gcc
# End of configuration options
#What needs to be built to make all files and dependencies
all: $(EXECUTABLE)
#Create the main executable
$(EXECUTABLE): $(OBJS) $(LIBS)
$(CC) -o $(EXECUTABLE) obj/sshell.o -Llib -lparser -lshell -lhistory -lhash_table -lvariables -lrecord
#Create the library files
lib/libparser.so: obj/parser.o
$(CC) $(LIBFLAGS) -shared $^ -o $#
lib/libshell.so: obj/shutil.o
$(CC) $(LIBFLAGS) -shared $^ -o $#
lib/libhistory.so: obj/history.o
$(CC) $(LIBFLAGS) -shared $^ -o $#
lib/libhash_table.so: obj/hash_table.o
$(CC) $(LIBFLAGS) -shared $^ -o $#
lib/libvariables.so: obj/variables.o
$(CC) $(LIBFLAGS) -shared $^ -o $#
lib/librecord.so: bin/record.o //<----
$(CC) $(LIBFLAGS) -shared $^ -o $#
#Recursively build object files
obj/%.o: src/%.c //<---- I feel like this is causing the problem.
$(CC) $(CFLAGS) -I./include/ -c $< -o $#
#Define dependencies for objects based on header files
#We are overly conservative here, parser.o should depend on parser.h only
$(OBJS) : $(HEADER_FILES)
clean:
-rm -f $(EXECUTABLE) obj/*.o lib/*.so lib/*.a bin/*.o
-rm -f .sshell_history.txt
run: $(EXECUTABLE)
(export LD_LIBRARY_PATH=lib; ./$(EXECUTABLE))
# End of Makefile
With what I have done (most likely completely off) it doesn't compile record.c and says bin/record.o does not exist. I am not really experienced with Makefiles so I am wondering if I can have some help. Thanks!
Try using the rule .c.o instead of obj/%.o: src/%.c
Edit:
If that doesn't work, maybe adding the following rule will do the job:
bin/%.o: src/%.c
$(CC) $(CFLAGS) -I./include/ -c $< -o $#
I have a makefile which does what I want with the compilation but I want it also to make a library instead of only object files.
CC=gcc
CFLAGS=-g -Wall
DEPS = tree.h
OBJ = main.o tree.o
%.o: %.c $(DEPS)
$(CC) -c -o $# $< $(CFLAGS)
tree: $(OBJ)
$(CC) -o $# $^ $(CFLAGS)
clean:
rm -f *.o tree
Now I want the makefile to be something like this:
gcc -Wall -g -c tree.c
ar -r libtree.a tree.o
gcc main.c -o main -ltree -L.
./main
What I have to add to my existing makefile?
This should do what you want:
%.o: %.c $(DEPS)
$(CC) -c -o $# $< $(CFLAGS)
lib%.a: %.o
ar -r $# $^
main: $(OBJ) $(DEPS:%.h=lib%.a)
$(CC) -o $# $^ $(CFLAGS) $(DEPS:%.h=-l%) -L.
Note that this only works in GNU Make (in particular, the % in $(DEPS:%.h=lib%.a) is a GNU-specific extension).
I'm trying to build project. There are two directories:
A/
foo.c
foo.h
B/
main.c
Makefile
main.c includes "foo.h". What do i have to write in Makefile to build the project.
I did this
INCLUDE_DIR=../A
LIBS=-lm
CC = gcc
CFLAGS = -c -Wall -I$(INCLUDE_DIR)
default:
#make clean
#make main
sample: main.o foo.o
$(CC) $(LIBS) $? -o $#
main.o: main.c
$(CC) $(CFLAGS) $< -c $%
foo.o: foo.c
$(CC) $(CFLAGS) $< -c $%
clean:
#rm -rf *.o
It cant find foo.c
INCLUDE_DIR=../A
LIBS=-lm
CC = gcc
CFLAGS = -c -Wall -I$(INCLUDE_DIR)
default:
#make clean
#make main
sample: main.o $(INCLUDE_DIR)/foo.o
$(CC) $(LIBS) $? -o $#
main.o: main.c
$(CC) $(CFLAGS) $< -c $%
$(INCLUDE_DIR)/foo.o: $(INCLUDE_DIR)/foo.c
$(CC) $(CFLAGS) $< -c $%
clean:
#rm -rf *.o $(INCLUDE_DIR)/*.o
You need to tell make the relative path to the files.
IIRC you can use
foo.o: ../A/foo.c
$(CC) $(CFLAGS) $< -c $%
but I guess that's not really a solution?