I have to compile a client.c file; in this file there are macro defined in utiliy_lib.h
When I run :
gcc -Wall -c client.c utility_lib.h
The compiler doesn't find macro definitions.
I have this file in the same folder "code":
client.c
server.c
utility_lib.c //it contains generic macro using by every file
utility.c //it contains utility function, used by client and server
msg_queue.c // it contains function to manipulate message queue (this is a little project for a chatroom)
send_receive.c //it contains function to send and receive message
the makefile that I tried is:
CC = gcc -Wall -O0 -g
LDFLAGS = -lpthread
ARCH = $(shell uname -m)
all: client server
server: common.h main.c msg_queue.c send_recv.c util.c
rm -f build/*.o
$(CC) -c main.c -o build/main.o
$(CC) -c send_recv.c -o build/send_recv.o
$(CC) -c util.c -o build/util.o
$(CC) -c msg_queue.c -o build/msg_queue.o
$(CC) -o server build/*.o $(LDFLAGS)
client:
ln -s -f client-$(ARCH) client
:phony
clean:
rm -f client server build/*.o
Anyone could help me please?
Client.C needs to
#include "utility_lib.h"
Near the top of the file
That gives it the definitions
Then compile is
gcc -Wall -c client.c
Related
So I have two C files which are master.c, slave.c and then config.h and I'm trying to build a makefile for the execution of these files and I'm getting an error.
I'm using a normal terminal on MacOS and when executing make I get the following error:
ss#US3FHIM0XQ86TJG: ~/project-2[master*]$ make
gcc -o master config.h master.c -g -I -std=gnu99
clang: error: cannot specify -o when generating multiple output files
make: *** [master] Error 1
Here is what my makefile looks like:
CC = gcc
CFLAGS = -g -I -std=gnu99
all: master slave
master: config.h master.c
$(CC) -o $# $^ $(CFLAGS)
slave: config.h slave.c
$(CC) -o $# $^ $(CFLAGS)
clean:
rm master slave cstest logfile.*
Can someone spot what might be causing this issue?
Remove config.h. You can compile it on the command line and omit "config.h", ie:
gcc -o master master.c -g -I -std=gnu99
Some people like to put that -o at the end:
gcc -g -I -std=gnu99 -c master.c -o master
A more appropriate way would be:
gcc -g -I/usr/include -std=gnu99 -c master.c -o master
Generally, the -I has a path, such as -I/usr/include, but you can omit the -I as your compiler usually looks there first.
Also, you may have to tweak your Makefile and omit the config.h if it is happening when you type make.
Some little errors you can fix by compiling the object by hand (ie, as above, gcc -g -I/usr/include -std=gnu99 -c master.c -o master)
Once you edit Makefile and remove config.h, and perhaps use -I/usr/include or path to your headers, you can run:
make clean
make all
or just:
make slave
or:
make master
etc, etc
$^ is a placeholder for the list of dependencies. That is why the rule
master: config.h master.c
$(CC) -o $# $^ $(CFLAGS)
runs the command
gcc -o master config.h master.c -g -I -std=gnu99
Compiling .h produces one output, compiling .c produces another output. The compiler does not know to which of them to apply -o. The proper way is using rules
master: master.c config.h
$(CC) -o $# $< $(CFLAGS)
slave: slave.c config.h
$(CC) -o $# $< $(CFLAGS)
$< is a placeholder for the first item in the list of dependencies. These rules run gcc properly
gcc -o master master.c -g -I -std=gnu99
gcc -o slave slave.c -g -I -std=gnu99
I'm trying to compile a C program on Windows for use on a linux dev board.
When I try to compile using a makefile I get this output:
$ make
arm-linux-gnueabihf-gcc -g -Wall main.c -o filetest
process_begin: CreateProcess(NULL, arm-linux-gnueabihf-gcc -g -Wall main.c -o filetest, ...) failed.
make (e=2): The system cannot find the file specified.
make: *** [filetest] Error 2
This happens whether or not a blank file called filetest is present or not in the same directory. If it is present, I can run make clean and it will remove the file.
Here is the makefile I'm using:
#
TARGET = filetest
ALT_DEVICE_FAMILY ?= soc_cv_av
SOCEDS_ROOT ?= $(SOCEDS_DEST_ROOT)
HWLIBS_ROOT = $(SOCEDS_ROOT)/ip/altera/hps/altera_hps/hwlib
CROSS_COMPILE = arm-linux-gnueabihf-
CFLAGS = -g -Wall -D$(ALT_DEVICE_FAMILY) -I$(HWLIBS_ROOT)/include/$(ALT_DEVICE_FAMILY) -I$(HWLIBS_ROOT)/include/
LDFLAGS = -g -Wall
CC = $(CROSS_COMPILE)gcc
ARCH= arm
build: $(TARGET)
#
$(TARGET):main.c
$(CC) $(LDFLAGS) $^ -o $#
%.o : %.c
$(CC) $(CFLAGS) -c $< -o $#
.PHONY: clean
clean:
rm -f $(TARGET) *.a *.o *~
I used tabs in my actual makefile instead of spaces for the code block above ^^
Also, I'm working within Intel's FPGA SoC EDS for a Cyclone V board.
Hello i need help with makefile variables.
make build //(compiler server)
make run PORT=something //(run server on port something)
I need save this variable and post to the server.c and client.c Here is my Makefile
SERVER=server
CLIENT=client
FILES=src/server.c src/client.c
CFLAGS=-std=gnu99 -Wall -Wextra -Werror -pedantic
CC=gcc
build:
$(CC) $(CFLAGS) -o $(SERVER) src/server.c
$(CC) $(CFLAGS) -o $(CLIENT) src/client.c
run:
./server
clean:
$(RM) *.o src/$(CLIENT) src/$(SERVER
A plausible outline for a compile-time decision about port number might be:
SERVER = server
CLIENT = client
SERVER.c = src/server.c
CLIENT.c = src/client.c
CFLAGS = -std=gnu99 -Wall -Wextra -Werror -pedantic
PORT = 9823
DFLAGS = -DPORT=$(PORT)
CC = gcc
all: build
build: $(CLIENT) $(SERVER)
$(CLIENT): $(CLIENT.c)
$(CC) $(CFLAGS) $(DFLAGS) -o $(CLIENT) $(CLIENT.c)
$(SERVER): $(SERVER.c)
$(CC) $(CFLAGS) $(DFLAGS) -o $(SERVER) $(SERVER.c)
run: $(CLIENT) $(SERVER)
./$(SERVER)
clean:
$(RM) *.o $(CLIENT) $(SERVER)
The code for the client and the server contains code such as this, preferably in a common header:
#ifndef PORT
#define PORT 1234
#endif
and references PORT where the port number is needed.
If it is strictly a run-time decision, then maybe you use:
SERVER = server
CLIENT = client
SERVER.c = src/server.c
CLIENT.c = src/client.c
CFLAGS = -std=gnu99 -Wall -Wextra -Werror -pedantic
PORT = 9823
CC = gcc
all: build
build: $(CLIENT) $(SERVER)
$(CLIENT): $(CLIENT.c)
$(CC) $(CFLAGS) -o $(CLIENT) $(CLIENT.c)
$(SERVER): $(SERVER.c)
$(CC) $(CFLAGS) -o $(SERVER) $(SERVER.c)
run: $(CLIENT) $(SERVER)
./$(SERVER) -p $(PORT)
clean:
$(RM) *.o $(CLIENT) $(SERVER)
You'd also need to tell the client to connect to the given port number, of course. You should still have a default port number that is shared by both client and server in some common header.
You might use a hybrid of these solutions, where you define the default port number in the build process and use it in the run rule too.
Here is my my makefile. I know there is a shorter way to write it out, but I have a question on how to run it. My hw says I have to use the command: make run --- this command should cause the executable file to run using file redirection to read the input file data.
How would I go about setting that up?
Also i know the gcc is supposed to be tabbed.
test: main.o sum.o stack.o bSearch.o database.o db.o set.o parse.o bubble.o
gcc -o object main.o sum.o stack.o bSearch.o db.o set.o parse.o bubble.o
main.o: main.c sum.h
gcc -c main.c
sum.o: sum.c sum.h
gcc -c sum.c
stack.o: stack.c stack.h
gcc -c stack.c
bSearch.o: bSearch.c defs.h sortAndsearch.h
gcc -c bSearch.c
database.o: database.c defs.h parse.h
gcc -c database.c
db.o: db.c defs.h
gcc -c db.c
set.o: set.c set.h db.h
gcc -c set.c
parse.o: parse.c parse.h
gcc -c parse.c
bubble.o: bubble.c defs.h
gcc -c bubble.c
sortAndsearch.h: db.h
defs.h: set.h sortAndsearch.h
stack.h: set.h
clean:
rm *.o object
"run" is just like any other target in your Makefile such as "test" or "set.o" - but you have to add the rule to the Makefile for make to know what to do with it.
run:
./test < input.txt
I have a project that contains 4 source files :
RTP.c, RTCP.c RTSP.c main.c
and 3 header files :
RTP.h RTCP.h RTSP.h
I have to include all the header files in the main and the RTCP.h in the RTP.c after I included the header files in the source files I linked them in a make file please help me understand the problem.
the RTP.c
#include "RTP.h"
#include "RTCP.h"
the RTCP.c
#include "RTCP.h"
The RTSP.c
#include "RTSP.h"
The main.c
#include "RTP.h"
#include "RTSP.h"
The make file:
OBJS = main.o RTPfunctions.o RTCPfunctions.o RTSPfunctions.o
CC = gcc
CCFLAGS = -g
Client : $(OBJS)
$(CC) $(OBJS) -o -pthread client
RTCPfunctions.o : RTCPfunctions.c RTCPfunctions.h
$(CC) -c -g -pthread RTCPfunctions.c
RTSPfunctions.o : RTSPfunctions.c RTSPfunctions.h
$(CC) -c -g -pthread RTSPfunctions.c
RTPfunctions.o : RTPfunctions.c RTPfunctions.h RTCPfunctions.h
$(CC) -c -g -o -pthread RTPfunctions.c RTCPfunctions.o
main.o : main.c RTPfunctions.h RTSPfunctions.h
$(CC) -c -g -o -pthread main.c RTPfunctions.o RTSPfunctions.o
clean:
\rm *.o *~ client
Your question is not very verbose, however, from a quick glance at your makefile, we can say, as per the online gcc manual,
-o file
Place output in file file. This applies to whatever sort of output is being produced, whether it be an executable file, an object file, an assembler file or preprocessed C code.
Basically, this says, the immidiate next argument to -o should be the output file name.
Also, to follow the order of linking, the pthread library should be placed at the end, like
$(CC) $(OBJS) -o client -pthread